初版
This commit is contained in:
commit
e41cfe8a80
3
.gitignore
vendored
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3
.gitignore
vendored
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@ -0,0 +1,3 @@
|
||||
/app_code/Objects
|
||||
/app_code/Listings
|
||||
*.uvgui.*
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||||
209
app_code/PowerAdj_STC8.uvopt
Normal file
209
app_code/PowerAdj_STC8.uvopt
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|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>Target 1</TargetName>
|
||||
<ToolsetNumber>0x0</ToolsetNumber>
|
||||
<ToolsetName>MCS-51</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLK51>11059200</CLK51>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>0</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>120</PageWidth>
|
||||
<PageLength>65</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>0</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>12</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\STCMON51.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTP51</Key>
|
||||
<Name>(98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>STCMON51</Key>
|
||||
<Name>-S8 -B115200 -O0 -U0</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>1</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\STARTUP.A51</PathWithFileName>
|
||||
<FilenameWithoutPath>STARTUP.A51</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
395
app_code/PowerAdj_STC8.uvproj
Normal file
395
app_code/PowerAdj_STC8.uvproj
Normal file
@ -0,0 +1,395 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Target 1</TargetName>
|
||||
<ToolsetNumber>0x0</ToolsetNumber>
|
||||
<ToolsetName>MCS-51</ToolsetName>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STC8A8K64S4A12</Device>
|
||||
<Vendor>STC</Vendor>
|
||||
<Cpu>IRAM(0-0xFF) XRAM(0-0x1FFF) IROM(0-0xFFF8) CLOCK(35000000) MODP2</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>"LIB\STARTUP.A51" ("Standard 8051 Startup Code")</StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId>63016</DeviceId>
|
||||
<RegisterFile>STC8.H</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile></SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath>STC\</RegisterFilePath>
|
||||
<DBRegisterFilePath>STC\</DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||
<OutputName>PowerAdj_STC8</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
<HexFormatSelection>0</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
<BankNo>65535</BankNo>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>S8051.DLL</SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDll>DP51.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pDP8051</SimDlgDllArguments>
|
||||
<TargetDllName>S8051.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TP51.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-p51</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>0</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>0</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>12</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>BIN\STCMON51.DLL</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>0</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||
<Capability>0</Capability>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2></Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<Target51>
|
||||
<Target51Misc>
|
||||
<MemoryModel>0</MemoryModel>
|
||||
<RTOS>0</RTOS>
|
||||
<RomSize>2</RomSize>
|
||||
<DataHold>0</DataHold>
|
||||
<XDataHold>0</XDataHold>
|
||||
<UseOnchipRom>0</UseOnchipRom>
|
||||
<UseOnchipArithmetic>0</UseOnchipArithmetic>
|
||||
<UseMultipleDPTR>0</UseMultipleDPTR>
|
||||
<UseOnchipXram>0</UseOnchipXram>
|
||||
<HadIRAM>1</HadIRAM>
|
||||
<HadXRAM>1</HadXRAM>
|
||||
<HadIROM>1</HadIROM>
|
||||
<Moda2>0</Moda2>
|
||||
<Moddp2>0</Moddp2>
|
||||
<Modp2>1</Modp2>
|
||||
<Mod517dp>0</Mod517dp>
|
||||
<Mod517au>0</Mod517au>
|
||||
<Mode2>0</Mode2>
|
||||
<useCB>0</useCB>
|
||||
<useXB>0</useXB>
|
||||
<useL251>0</useL251>
|
||||
<useA251>0</useA251>
|
||||
<Mx51>0</Mx51>
|
||||
<ModC812>0</ModC812>
|
||||
<ModCont>0</ModCont>
|
||||
<Lp51>0</Lp51>
|
||||
<useXBS>0</useXBS>
|
||||
<ModDA>0</ModDA>
|
||||
<ModAB2>0</ModAB2>
|
||||
<Mx51P>0</Mx51P>
|
||||
<hadXRAM2>0</hadXRAM2>
|
||||
<uocXram2>0</uocXram2>
|
||||
<hadXRAM3>0</hadXRAM3>
|
||||
<ModC2>0</ModC2>
|
||||
<ModH2>0</ModH2>
|
||||
<Mdu_R515>0</Mdu_R515>
|
||||
<Mdu_F120>0</Mdu_F120>
|
||||
<Psoc>0</Psoc>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<hadIROM3>0</hadIROM3>
|
||||
<ModSmx2>0</ModSmx2>
|
||||
<cBanks>0</cBanks>
|
||||
<xBanks>0</xBanks>
|
||||
<OnChipMemories>
|
||||
<RCB>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0xffff</Size>
|
||||
</RCB>
|
||||
<RXB>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</RXB>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocr1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocr1>
|
||||
<Ocr2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocr2>
|
||||
<Ocr3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocr3>
|
||||
<IRO>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0xfff9</Size>
|
||||
</IRO>
|
||||
<IRA>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x100</Size>
|
||||
</IRA>
|
||||
<XRA>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x2000</Size>
|
||||
</XRA>
|
||||
<XRA512>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRA512>
|
||||
<IROM512>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</IROM512>
|
||||
<XRA513>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRA513>
|
||||
<IROM513>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</IROM513>
|
||||
</OnChipMemories>
|
||||
</Target51Misc>
|
||||
<C51>
|
||||
<RegisterColoring>0</RegisterColoring>
|
||||
<VariablesInOrder>0</VariablesInOrder>
|
||||
<IntegerPromotion>1</IntegerPromotion>
|
||||
<uAregs>0</uAregs>
|
||||
<UseInterruptVector>1</UseInterruptVector>
|
||||
<Fuzzy>3</Fuzzy>
|
||||
<Optimize>8</Optimize>
|
||||
<WarningLevel>2</WarningLevel>
|
||||
<SizeSpeed>1</SizeSpeed>
|
||||
<ObjectExtend>1</ObjectExtend>
|
||||
<ACallAJmp>0</ACallAJmp>
|
||||
<InterruptVectorAddress>0</InterruptVectorAddress>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</C51>
|
||||
<Ax51>
|
||||
<UseMpl>0</UseMpl>
|
||||
<UseStandard>1</UseStandard>
|
||||
<UseCase>0</UseCase>
|
||||
<UseMod51>0</UseMod51>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Ax51>
|
||||
<Lx51>
|
||||
<useFile>0</useFile>
|
||||
<linkonly>0</linkonly>
|
||||
<UseMemoryFromTarget>1</UseMemoryFromTarget>
|
||||
<CaseSensitiveSymbols>0</CaseSensitiveSymbols>
|
||||
<WarningLevel>2</WarningLevel>
|
||||
<DataOverlaying>1</DataOverlaying>
|
||||
<OverlayString></OverlayString>
|
||||
<MiscControls></MiscControls>
|
||||
<DisableWarningNumbers></DisableWarningNumbers>
|
||||
<LinkerCmdFile></LinkerCmdFile>
|
||||
<Assign></Assign>
|
||||
<ReserveString></ReserveString>
|
||||
<CClasses></CClasses>
|
||||
<UserClasses></UserClasses>
|
||||
<CSection></CSection>
|
||||
<UserSection></UserSection>
|
||||
<CodeBaseAddress></CodeBaseAddress>
|
||||
<XDataBaseAddress></XDataBaseAddress>
|
||||
<PDataBaseAddress></PDataBaseAddress>
|
||||
<BitBaseAddress></BitBaseAddress>
|
||||
<DataBaseAddress></DataBaseAddress>
|
||||
<IDataBaseAddress></IDataBaseAddress>
|
||||
<Precede></Precede>
|
||||
<Stack></Stack>
|
||||
<CodeSegmentName></CodeSegmentName>
|
||||
<XDataSegmentName></XDataSegmentName>
|
||||
<BitSegmentName></BitSegmentName>
|
||||
<DataSegmentName></DataSegmentName>
|
||||
<IDataSegmentName></IDataSegmentName>
|
||||
</Lx51>
|
||||
</Target51>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>STARTUP.A51</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\STARTUP.A51</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
198
app_code/STARTUP.A51
Normal file
198
app_code/STARTUP.A51
Normal file
@ -0,0 +1,198 @@
|
||||
$NOMOD51
|
||||
;------------------------------------------------------------------------------
|
||||
; This file is part of the C51 Compiler package
|
||||
; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc.
|
||||
; Version 8.01
|
||||
;
|
||||
; *** <<< Use Configuration Wizard in Context Menu >>> ***
|
||||
;------------------------------------------------------------------------------
|
||||
; STARTUP.A51: This code is executed after processor reset.
|
||||
;
|
||||
; To translate this file use A51 with the following invocation:
|
||||
;
|
||||
; A51 STARTUP.A51
|
||||
;
|
||||
; To link the modified STARTUP.OBJ file to your application use the following
|
||||
; Lx51 invocation:
|
||||
;
|
||||
; Lx51 your object file list, STARTUP.OBJ controls
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; User-defined <h> Power-On Initialization of Memory
|
||||
;
|
||||
; With the following EQU statements the initialization of memory
|
||||
; at processor reset can be defined:
|
||||
;
|
||||
; <o> IDATALEN: IDATA memory size <0x0-0x100>
|
||||
; <i> Note: The absolute start-address of IDATA memory is always 0
|
||||
; <i> The IDATA space overlaps physically the DATA and BIT areas.
|
||||
IDATALEN EQU 80H
|
||||
;
|
||||
; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF>
|
||||
; <i> The absolute start address of XDATA memory
|
||||
XDATASTART EQU 0
|
||||
;
|
||||
; <o> XDATALEN: XDATA memory size <0x0-0xFFFF>
|
||||
; <i> The length of XDATA memory in bytes.
|
||||
XDATALEN EQU 0
|
||||
;
|
||||
; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF>
|
||||
; <i> The absolute start address of PDATA memory
|
||||
PDATASTART EQU 0H
|
||||
;
|
||||
; <o> PDATALEN: PDATA memory size <0x0-0xFF>
|
||||
; <i> The length of PDATA memory in bytes.
|
||||
PDATALEN EQU 0H
|
||||
;
|
||||
;</h>
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
;<h> Reentrant Stack Initialization
|
||||
;
|
||||
; The following EQU statements define the stack pointer for reentrant
|
||||
; functions and initialized it:
|
||||
;
|
||||
; <h> Stack Space for reentrant functions in the SMALL model.
|
||||
; <q> IBPSTACK: Enable SMALL model reentrant stack
|
||||
; <i> Stack space for reentrant functions in the SMALL model.
|
||||
IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
|
||||
; <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF>
|
||||
; <i> Set the top of the stack to the highest location.
|
||||
IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
|
||||
; </h>
|
||||
;
|
||||
; <h> Stack Space for reentrant functions in the LARGE model.
|
||||
; <q> XBPSTACK: Enable LARGE model reentrant stack
|
||||
; <i> Stack space for reentrant functions in the LARGE model.
|
||||
XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
|
||||
; <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF>
|
||||
; <i> Set the top of the stack to the highest location.
|
||||
XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1
|
||||
; </h>
|
||||
;
|
||||
; <h> Stack Space for reentrant functions in the COMPACT model.
|
||||
; <q> PBPSTACK: Enable COMPACT model reentrant stack
|
||||
; <i> Stack space for reentrant functions in the COMPACT model.
|
||||
PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
|
||||
;
|
||||
; <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF>
|
||||
; <i> Set the top of the stack to the highest location.
|
||||
PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
|
||||
; </h>
|
||||
;</h>
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Memory Page for Using the Compact Model with 64 KByte xdata RAM
|
||||
; <e>Compact Model Page Definition
|
||||
;
|
||||
; <i>Define the XDATA page used for PDATA variables.
|
||||
; <i>PPAGE must conform with the PPAGE set in the linker invocation.
|
||||
;
|
||||
; Enable pdata memory page initalization
|
||||
PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
|
||||
;
|
||||
; <o> PPAGE number <0x0-0xFF>
|
||||
; <i> uppermost 256-byte address of the page used for PDATA variables.
|
||||
PPAGE EQU 0
|
||||
;
|
||||
; <o> SFR address which supplies uppermost address byte <0x0-0xFF>
|
||||
; <i> most 8051 variants use P2 as uppermost address byte
|
||||
PPAGE_SFR DATA 0A0H
|
||||
;
|
||||
; </e>
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
; Standard SFR Symbols
|
||||
ACC DATA 0E0H
|
||||
B DATA 0F0H
|
||||
SP DATA 81H
|
||||
DPL DATA 82H
|
||||
DPH DATA 83H
|
||||
|
||||
NAME ?C_STARTUP
|
||||
|
||||
|
||||
?C_C51STARTUP SEGMENT CODE
|
||||
?STACK SEGMENT IDATA
|
||||
|
||||
RSEG ?STACK
|
||||
DS 1
|
||||
|
||||
EXTRN CODE (?C_START)
|
||||
PUBLIC ?C_STARTUP
|
||||
|
||||
CSEG AT 0
|
||||
?C_STARTUP: LJMP STARTUP1
|
||||
|
||||
RSEG ?C_C51STARTUP
|
||||
|
||||
STARTUP1:
|
||||
|
||||
IF IDATALEN <> 0
|
||||
MOV R0,#IDATALEN - 1
|
||||
CLR A
|
||||
IDATALOOP: MOV @R0,A
|
||||
DJNZ R0,IDATALOOP
|
||||
ENDIF
|
||||
|
||||
IF XDATALEN <> 0
|
||||
MOV DPTR,#XDATASTART
|
||||
MOV R7,#LOW (XDATALEN)
|
||||
IF (LOW (XDATALEN)) <> 0
|
||||
MOV R6,#(HIGH (XDATALEN)) +1
|
||||
ELSE
|
||||
MOV R6,#HIGH (XDATALEN)
|
||||
ENDIF
|
||||
CLR A
|
||||
XDATALOOP: MOVX @DPTR,A
|
||||
INC DPTR
|
||||
DJNZ R7,XDATALOOP
|
||||
DJNZ R6,XDATALOOP
|
||||
ENDIF
|
||||
|
||||
IF PPAGEENABLE <> 0
|
||||
MOV PPAGE_SFR,#PPAGE
|
||||
ENDIF
|
||||
|
||||
IF PDATALEN <> 0
|
||||
MOV R0,#LOW (PDATASTART)
|
||||
MOV R7,#LOW (PDATALEN)
|
||||
CLR A
|
||||
PDATALOOP: MOVX @R0,A
|
||||
INC R0
|
||||
DJNZ R7,PDATALOOP
|
||||
ENDIF
|
||||
|
||||
IF IBPSTACK <> 0
|
||||
EXTRN DATA (?C_IBP)
|
||||
|
||||
MOV ?C_IBP,#LOW IBPSTACKTOP
|
||||
ENDIF
|
||||
|
||||
IF XBPSTACK <> 0
|
||||
EXTRN DATA (?C_XBP)
|
||||
|
||||
MOV ?C_XBP,#HIGH XBPSTACKTOP
|
||||
MOV ?C_XBP+1,#LOW XBPSTACKTOP
|
||||
ENDIF
|
||||
|
||||
IF PBPSTACK <> 0
|
||||
EXTRN DATA (?C_PBP)
|
||||
MOV ?C_PBP,#LOW PBPSTACKTOP
|
||||
ENDIF
|
||||
|
||||
MOV SP,#?STACK-1
|
||||
|
||||
; This code is required if you use L51_BANK.A51 with Banking Mode 4
|
||||
;<h> Code Banking
|
||||
; <q> Select Bank 0 for L51_BANK.A51 Mode 4
|
||||
#if 0
|
||||
; <i> Initialize bank mechanism to code bank 0 when using L51_BANK.A51 with Banking Mode 4.
|
||||
EXTRN CODE (?B_SWITCH0)
|
||||
CALL ?B_SWITCH0 ; init bank mechanism to code bank 0
|
||||
#endif
|
||||
;</h>
|
||||
LJMP ?C_START
|
||||
|
||||
END
|
||||
1835
app_code/main.c
Normal file
1835
app_code/main.c
Normal file
File diff suppressed because it is too large
Load Diff
414
app_code/stc8.h
Normal file
414
app_code/stc8.h
Normal file
@ -0,0 +1,414 @@
|
||||
#ifndef __STC8F_H__
|
||||
#define __STC8F_H__
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
|
||||
//包含本头文件后,不用另外再包含"REG51.H"
|
||||
|
||||
#include "stdio.h"
|
||||
#include "intrins.h"
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
|
||||
sfr P0 = 0x80;
|
||||
sbit P00 = P0^0;
|
||||
sbit P01 = P0^1;
|
||||
sbit P02 = P0^2;
|
||||
sbit P03 = P0^3;
|
||||
sbit P04 = P0^4;
|
||||
sbit P05 = P0^5;
|
||||
sbit P06 = P0^6;
|
||||
sbit P07 = P0^7;
|
||||
|
||||
sfr SP = 0x81;
|
||||
sfr DPL = 0x82;
|
||||
sfr DPH = 0x83;
|
||||
sfr S4CON = 0x84;
|
||||
sfr S4BUF = 0x85;
|
||||
sfr PCON = 0x87;
|
||||
|
||||
sfr TCON = 0x88;
|
||||
sbit TF1 = TCON^7;
|
||||
sbit TR1 = TCON^6;
|
||||
sbit TF0 = TCON^5;
|
||||
sbit TR0 = TCON^4;
|
||||
sbit IE1 = TCON^3;
|
||||
sbit IT1 = TCON^2;
|
||||
sbit IE0 = TCON^1;
|
||||
sbit IT0 = TCON^0;
|
||||
|
||||
sfr TMOD = 0x89;
|
||||
sfr TL0 = 0x8a;
|
||||
sfr TL1 = 0x8b;
|
||||
sfr TH0 = 0x8c;
|
||||
sfr TH1 = 0x8d;
|
||||
sfr AUXR = 0x8e;
|
||||
sfr INTCLKO = 0x8f;
|
||||
|
||||
sfr P1 = 0x90;
|
||||
sbit P10 = P1^0;
|
||||
sbit P11 = P1^1;
|
||||
sbit P12 = P1^2;
|
||||
sbit P13 = P1^3;
|
||||
sbit P14 = P1^4;
|
||||
sbit P15 = P1^5;
|
||||
sbit P16 = P1^6;
|
||||
sbit P17 = P1^7;
|
||||
|
||||
sfr P1M1 = 0x91;
|
||||
sfr P1M0 = 0x92;
|
||||
sfr P0M1 = 0x93;
|
||||
sfr P0M0 = 0x94;
|
||||
sfr P2M1 = 0x95;
|
||||
sfr P2M0 = 0x96;
|
||||
sfr AUXR2 = 0x97;
|
||||
|
||||
sfr SCON = 0x98;
|
||||
sbit SM0 = SCON^7;
|
||||
sbit SM1 = SCON^6;
|
||||
sbit SM2 = SCON^5;
|
||||
sbit REN = SCON^4;
|
||||
sbit TB8 = SCON^3;
|
||||
sbit RB8 = SCON^2;
|
||||
sbit TI = SCON^1;
|
||||
sbit RI = SCON^0;
|
||||
|
||||
sfr SBUF = 0x99;
|
||||
sfr S2CON = 0x9a;
|
||||
sfr S2BUF = 0x9b;
|
||||
|
||||
sfr P2 = 0xa0;
|
||||
sbit P20 = P2^0;
|
||||
sbit P21 = P2^1;
|
||||
sbit P22 = P2^2;
|
||||
sbit P23 = P2^3;
|
||||
sbit P24 = P2^4;
|
||||
sbit P25 = P2^5;
|
||||
sbit P26 = P2^6;
|
||||
sbit P27 = P2^7;
|
||||
|
||||
sfr BUS_SPEED = 0xa1;
|
||||
sfr P_SW1 = 0xa2;
|
||||
|
||||
sfr IE = 0xa8;
|
||||
sbit EA = IE^7;
|
||||
sbit ELVD = IE^6;
|
||||
sbit EADC = IE^5;
|
||||
sbit ES = IE^4;
|
||||
sbit ET1 = IE^3;
|
||||
sbit EX1 = IE^2;
|
||||
sbit ET0 = IE^1;
|
||||
sbit EX0 = IE^0;
|
||||
|
||||
sfr SADDR = 0xa9;
|
||||
sfr WKTCL = 0xaa;
|
||||
sfr WKTCH = 0xab;
|
||||
sfr S3CON = 0xac;
|
||||
sfr S3BUF = 0xad;
|
||||
sfr TA = 0xae;
|
||||
sfr IE2 = 0xaf;
|
||||
|
||||
sfr P3 = 0xb0;
|
||||
sbit P30 = P3^0;
|
||||
sbit P31 = P3^1;
|
||||
sbit P32 = P3^2;
|
||||
sbit P33 = P3^3;
|
||||
sbit P34 = P3^4;
|
||||
sbit P35 = P3^5;
|
||||
sbit P36 = P3^6;
|
||||
sbit P37 = P3^7;
|
||||
|
||||
sbit RD = P3^7;
|
||||
sbit WR = P3^6;
|
||||
sbit T1 = P3^5;
|
||||
sbit T0 = P3^4;
|
||||
sbit INT1 = P3^3;
|
||||
sbit INT0 = P3^2;
|
||||
sbit TXD = P3^1;
|
||||
sbit RXD = P3^0;
|
||||
|
||||
sfr P3M1 = 0xb1;
|
||||
sfr P3M0 = 0xb2;
|
||||
sfr P4M1 = 0xb3;
|
||||
sfr P4M0 = 0xb4;
|
||||
sfr IP2 = 0xb5;
|
||||
sfr IP2H = 0xb6;
|
||||
sfr IPH = 0xb7;
|
||||
|
||||
sfr IP = 0xb8;
|
||||
sbit PPCA = IP^7;
|
||||
sbit PLVD = IP^6;
|
||||
sbit PADC = IP^5;
|
||||
sbit PS = IP^4;
|
||||
sbit PT1 = IP^3;
|
||||
sbit PX1 = IP^2;
|
||||
sbit PT0 = IP^1;
|
||||
sbit PX0 = IP^0;
|
||||
|
||||
sfr SADEN = 0xb9;
|
||||
sfr P_SW2 = 0xba;
|
||||
sfr VOCTRL = 0xbb;
|
||||
sfr ADC_CONTR = 0xbc;
|
||||
sfr ADC_RES = 0xbd;
|
||||
sfr ADC_RESL = 0xbe;
|
||||
|
||||
sfr P4 = 0xc0;
|
||||
sbit P40 = P4^0;
|
||||
sbit P41 = P4^1;
|
||||
sbit P42 = P4^2;
|
||||
sbit P43 = P4^3;
|
||||
sbit P44 = P4^4;
|
||||
sbit P45 = P4^5;
|
||||
sbit P46 = P4^6;
|
||||
sbit P47 = P4^7;
|
||||
|
||||
sfr WDT_CONTR = 0xc1;
|
||||
sfr IAP_DATA = 0xc2;
|
||||
sfr IAP_ADDRH = 0xc3;
|
||||
sfr IAP_ADDRL = 0xc4;
|
||||
sfr IAP_CMD = 0xc5;
|
||||
sfr IAP_TRIG = 0xc6;
|
||||
sfr IAP_CONTR = 0xc7;
|
||||
|
||||
sfr P5 = 0xc8;
|
||||
sbit P50 = P5^0;
|
||||
sbit P51 = P5^1;
|
||||
sbit P52 = P5^2;
|
||||
sbit P53 = P5^3;
|
||||
sbit P54 = P5^4;
|
||||
sbit P55 = P5^5;
|
||||
sbit P56 = P5^6;
|
||||
sbit P57 = P5^7;
|
||||
|
||||
sfr P5M1 = 0xc9;
|
||||
sfr P5M0 = 0xca;
|
||||
sfr P6M1 = 0xcb;
|
||||
sfr P6M0 = 0xcc;
|
||||
sfr SPSTAT = 0xcd;
|
||||
sfr SPCTL = 0xce;
|
||||
sfr SPDAT = 0xcf;
|
||||
|
||||
sfr PSW = 0xd0;
|
||||
sbit CY = PSW^7;
|
||||
sbit AC = PSW^6;
|
||||
sbit F0 = PSW^5;
|
||||
sbit RS1 = PSW^4;
|
||||
sbit RS0 = PSW^3;
|
||||
sbit OV = PSW^2;
|
||||
sbit F1 = PSW^1;
|
||||
sbit P = PSW^0;
|
||||
|
||||
sfr T4T3M = 0xd1;
|
||||
sfr T4H = 0xd2;
|
||||
sfr T4L = 0xd3;
|
||||
sfr T3H = 0xd4;
|
||||
sfr T3L = 0xd5;
|
||||
sfr T2H = 0xd6;
|
||||
sfr T2L = 0xd7;
|
||||
|
||||
sfr T3T4M = 0xd1;
|
||||
sfr TH4 = 0xd2;
|
||||
sfr TL4 = 0xd3;
|
||||
sfr TH3 = 0xd4;
|
||||
sfr TL3 = 0xd5;
|
||||
sfr TH2 = 0xd6;
|
||||
sfr TL2 = 0xd7;
|
||||
|
||||
sfr CCON = 0xd8;
|
||||
sbit CF = CCON^7;
|
||||
sbit CR = CCON^6;
|
||||
sbit CCF3 = CCON^3;
|
||||
sbit CCF2 = CCON^2;
|
||||
sbit CCF1 = CCON^1;
|
||||
sbit CCF0 = CCON^0;
|
||||
|
||||
sfr CMOD = 0xd9;
|
||||
sfr CCAPM0 = 0xda;
|
||||
sfr CCAPM1 = 0xdb;
|
||||
sfr CCAPM2 = 0xdc;
|
||||
sfr CCAPM3 = 0xdd;
|
||||
sfr ADCCFG = 0xde;
|
||||
|
||||
sfr ACC = 0xE0;
|
||||
sbit ACC0 = ACC^0;
|
||||
sbit ACC1 = ACC^1;
|
||||
sbit ACC2 = ACC^2;
|
||||
sbit ACC3 = ACC^3;
|
||||
sbit ACC4 = ACC^4;
|
||||
sbit ACC5 = ACC^5;
|
||||
sbit ACC6 = ACC^6;
|
||||
sbit ACC7 = ACC^7;
|
||||
|
||||
sfr P7M1 = 0xe1;
|
||||
sfr P7M0 = 0xe2;
|
||||
sfr DPS = 0xe3;
|
||||
sfr DPL1 = 0xe4;
|
||||
sfr DPH1 = 0xe5;
|
||||
sfr CMPCR1 = 0xe6;
|
||||
sfr CMPCR2 = 0xe7;
|
||||
|
||||
sfr P6 = 0xe8;
|
||||
sbit P60 = P6^0;
|
||||
sbit P61 = P6^1;
|
||||
sbit P62 = P6^2;
|
||||
sbit P63 = P6^3;
|
||||
sbit P64 = P6^4;
|
||||
sbit P65 = P6^5;
|
||||
sbit P66 = P6^6;
|
||||
sbit P67 = P6^7;
|
||||
|
||||
sfr CL = 0xe9;
|
||||
sfr CCAP0L = 0xea;
|
||||
sfr CCAP1L = 0xeb;
|
||||
sfr CCAP2L = 0xec;
|
||||
sfr CCAP3L = 0xed;
|
||||
sfr AUXINTIF = 0xef;
|
||||
|
||||
sfr B = 0xF0;
|
||||
sbit B0 = B^0;
|
||||
sbit B1 = B^1;
|
||||
sbit B2 = B^2;
|
||||
sbit B3 = B^3;
|
||||
sbit B4 = B^4;
|
||||
sbit B5 = B^5;
|
||||
sbit B6 = B^6;
|
||||
sbit B7 = B^7;
|
||||
|
||||
sfr PWMCFG = 0xf1;
|
||||
sfr PCA_PWM0 = 0xf2;
|
||||
sfr PCA_PWM1 = 0xf3;
|
||||
sfr PCA_PWM2 = 0xf4;
|
||||
sfr PCA_PWM3 = 0xf5;
|
||||
sfr PWMIF = 0xf6;
|
||||
sfr PWMFDCR = 0xf7;
|
||||
|
||||
sfr P7 = 0xf8;
|
||||
sbit P70 = P7^0;
|
||||
sbit P71 = P7^1;
|
||||
sbit P72 = P7^2;
|
||||
sbit P73 = P7^3;
|
||||
sbit P74 = P7^4;
|
||||
sbit P75 = P7^5;
|
||||
sbit P76 = P7^6;
|
||||
sbit P77 = P7^7;
|
||||
|
||||
sfr CH = 0xf9;
|
||||
sfr CCAP0H = 0xfa;
|
||||
sfr CCAP1H = 0xfb;
|
||||
sfr CCAP2H = 0xfc;
|
||||
sfr CCAP3H = 0xfd;
|
||||
sfr PWMCR = 0xfe;
|
||||
sfr RSTCFG = 0xff;
|
||||
|
||||
|
||||
//如下特殊功能寄存器位于扩展RAM区域
|
||||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
||||
|
||||
#define PWMC (*(unsigned int volatile xdata *)0xfff0)
|
||||
#define PWMCH (*(unsigned char volatile xdata *)0xfff0)
|
||||
#define PWMCL (*(unsigned char volatile xdata *)0xfff1)
|
||||
#define PWMCKS (*(unsigned char volatile xdata *)0xfff2)
|
||||
#define TADCP (*(unsigned char volatile xdata *)0xfff3)
|
||||
#define TADCPH (*(unsigned char volatile xdata *)0xfff3)
|
||||
#define TADCPL (*(unsigned char volatile xdata *)0xfff4)
|
||||
#define PWM0T1 (*(unsigned int volatile xdata *)0xff00)
|
||||
#define PWM0T1H (*(unsigned char volatile xdata *)0xff00)
|
||||
#define PWM0T1L (*(unsigned char volatile xdata *)0xff01)
|
||||
#define PWM0T2 (*(unsigned int volatile xdata *)0xff02)
|
||||
#define PWM0T2H (*(unsigned char volatile xdata *)0xff02)
|
||||
#define PWM0T2L (*(unsigned char volatile xdata *)0xff03)
|
||||
#define PWM0CR (*(unsigned char volatile xdata *)0xff04)
|
||||
#define PWM0HLD (*(unsigned char volatile xdata *)0xff05)
|
||||
#define PWM1T1 (*(unsigned int volatile xdata *)0xff10)
|
||||
#define PWM1T1H (*(unsigned char volatile xdata *)0xff10)
|
||||
#define PWM1T1L (*(unsigned char volatile xdata *)0xff11)
|
||||
#define PWM1T2 (*(unsigned int volatile xdata *)0xff12)
|
||||
#define PWM1T2H (*(unsigned char volatile xdata *)0xff12)
|
||||
#define PWM1T2L (*(unsigned char volatile xdata *)0xff13)
|
||||
#define PWM1CR (*(unsigned char volatile xdata *)0xff14)
|
||||
#define PWM1HLD (*(unsigned char volatile xdata *)0xff15)
|
||||
#define PWM2T1 (*(unsigned int volatile xdata *)0xff20)
|
||||
#define PWM2T1H (*(unsigned char volatile xdata *)0xff20)
|
||||
#define PWM2T1L (*(unsigned char volatile xdata *)0xff21)
|
||||
#define PWM2T2 (*(unsigned int volatile xdata *)0xff22)
|
||||
#define PWM2T2H (*(unsigned char volatile xdata *)0xff22)
|
||||
#define PWM2T2L (*(unsigned char volatile xdata *)0xff23)
|
||||
#define PWM2CR (*(unsigned char volatile xdata *)0xff24)
|
||||
#define PWM2HLD (*(unsigned char volatile xdata *)0xff25)
|
||||
#define PWM3T1 (*(unsigned int volatile xdata *)0xff30)
|
||||
#define PWM3T1H (*(unsigned char volatile xdata *)0xff30)
|
||||
#define PWM3T1L (*(unsigned char volatile xdata *)0xff31)
|
||||
#define PWM3T2 (*(unsigned int volatile xdata *)0xff32)
|
||||
#define PWM3T2H (*(unsigned char volatile xdata *)0xff32)
|
||||
#define PWM3T2L (*(unsigned char volatile xdata *)0xff33)
|
||||
#define PWM3CR (*(unsigned char volatile xdata *)0xff34)
|
||||
#define PWM3HLD (*(unsigned char volatile xdata *)0xff35)
|
||||
#define PWM4T1 (*(unsigned int volatile xdata *)0xff40)
|
||||
#define PWM4T1H (*(unsigned char volatile xdata *)0xff40)
|
||||
#define PWM4T1L (*(unsigned char volatile xdata *)0xff41)
|
||||
#define PWM4T2 (*(unsigned int volatile xdata *)0xff42)
|
||||
#define PWM4T2H (*(unsigned char volatile xdata *)0xff42)
|
||||
#define PWM4T2L (*(unsigned char volatile xdata *)0xff43)
|
||||
#define PWM4CR (*(unsigned char volatile xdata *)0xff44)
|
||||
#define PWM4HLD (*(unsigned char volatile xdata *)0xff45)
|
||||
#define PWM5T1 (*(unsigned int volatile xdata *)0xff50)
|
||||
#define PWM5T1H (*(unsigned char volatile xdata *)0xff50)
|
||||
#define PWM5T1L (*(unsigned char volatile xdata *)0xff51)
|
||||
#define PWM5T2 (*(unsigned int volatile xdata *)0xff52)
|
||||
#define PWM5T2H (*(unsigned char volatile xdata *)0xff52)
|
||||
#define PWM5T2L (*(unsigned char volatile xdata *)0xff53)
|
||||
#define PWM5CR (*(unsigned char volatile xdata *)0xff54)
|
||||
#define PWM5HLD (*(unsigned char volatile xdata *)0xff55)
|
||||
#define PWM6T1 (*(unsigned int volatile xdata *)0xff60)
|
||||
#define PWM6T1H (*(unsigned char volatile xdata *)0xff60)
|
||||
#define PWM6T1L (*(unsigned char volatile xdata *)0xff61)
|
||||
#define PWM6T2 (*(unsigned int volatile xdata *)0xff62)
|
||||
#define PWM6T2H (*(unsigned char volatile xdata *)0xff62)
|
||||
#define PWM6T2L (*(unsigned char volatile xdata *)0xff63)
|
||||
#define PWM6CR (*(unsigned char volatile xdata *)0xff64)
|
||||
#define PWM6HLD (*(unsigned char volatile xdata *)0xff65)
|
||||
#define PWM7T1 (*(unsigned int volatile xdata *)0xff70)
|
||||
#define PWM7T1H (*(unsigned char volatile xdata *)0xff70)
|
||||
#define PWM7T1L (*(unsigned char volatile xdata *)0xff71)
|
||||
#define PWM7T2 (*(unsigned int volatile xdata *)0xff72)
|
||||
#define PWM7T2H (*(unsigned char volatile xdata *)0xff72)
|
||||
#define PWM7T2L (*(unsigned char volatile xdata *)0xff73)
|
||||
#define PWM7CR (*(unsigned char volatile xdata *)0xff74)
|
||||
#define PWM7HLD (*(unsigned char volatile xdata *)0xff75)
|
||||
|
||||
#define CLKSEL (*(unsigned char volatile xdata *)0xfe00)
|
||||
#define CLKDIV (*(unsigned char volatile xdata *)0xfe01)
|
||||
#define IRC24MCR (*(unsigned char volatile xdata *)0xfe02)
|
||||
#define XOSCCR (*(unsigned char volatile xdata *)0xfe03)
|
||||
#define IRC32KCR (*(unsigned char volatile xdata *)0xfe04)
|
||||
|
||||
#define P0PU (*(unsigned char volatile xdata *)0xfe10)
|
||||
#define P1PU (*(unsigned char volatile xdata *)0xfe11)
|
||||
#define P2PU (*(unsigned char volatile xdata *)0xfe12)
|
||||
#define P3PU (*(unsigned char volatile xdata *)0xfe13)
|
||||
#define P4PU (*(unsigned char volatile xdata *)0xfe14)
|
||||
#define P5PU (*(unsigned char volatile xdata *)0xfe15)
|
||||
#define P6PU (*(unsigned char volatile xdata *)0xfe16)
|
||||
#define P7PU (*(unsigned char volatile xdata *)0xfe17)
|
||||
#define P0NCS (*(unsigned char volatile xdata *)0xfe18)
|
||||
#define P1NCS (*(unsigned char volatile xdata *)0xfe19)
|
||||
#define P2NCS (*(unsigned char volatile xdata *)0xfe1a)
|
||||
#define P3NCS (*(unsigned char volatile xdata *)0xfe1b)
|
||||
#define P4NCS (*(unsigned char volatile xdata *)0xfe1c)
|
||||
#define P5NCS (*(unsigned char volatile xdata *)0xfe1d)
|
||||
#define P6NCS (*(unsigned char volatile xdata *)0xfe1e)
|
||||
#define P7NCS (*(unsigned char volatile xdata *)0xfe1f)
|
||||
|
||||
#define I2CCFG (*(unsigned char volatile xdata *)0xfe80)
|
||||
#define I2CMSCR (*(unsigned char volatile xdata *)0xfe81)
|
||||
#define I2CMSST (*(unsigned char volatile xdata *)0xfe82)
|
||||
#define I2CSLCR (*(unsigned char volatile xdata *)0xfe83)
|
||||
#define I2CSLST (*(unsigned char volatile xdata *)0xfe84)
|
||||
#define I2CSLADR (*(unsigned char volatile xdata *)0xfe85)
|
||||
#define I2CTXD (*(unsigned char volatile xdata *)0xfe86)
|
||||
#define I2CRXD (*(unsigned char volatile xdata *)0xfe87)
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user