/* ** ################################################################### ** Processor: CVM0128 ** Compiler: IAR ANSI C/C++ Compiler for ARM ** ** Abstract: ** Linker file for the IAR ANSI C/C++ Compiler for ARM ** ** Copyright (c) 2022, Shenzhen CVA Innovation CO.,LTD ** All rights reserved. ** ** Shenzhen CVA Innovation CO.,LTD (CVA chip) is supplying this file for use ** exclusively with CVA's microcontroller products. This file can be freely ** distributed within development tools that are supporting such microcontroller ** products. ** ** THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ** OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ** CVA SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, ** OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ** ** http: www.cvachip.com ** ** ################################################################### */ /* If symbol __flash_vector_table__=1 is defined at link time * the interrupt vector will not be copied to RAM. * Warning: Using the interrupt vector from FLASH will not allow * INT_SYS_InstallHandler because the section is Read Only. */ define symbol __flash_vector_table__ = 0x00000001; define symbol __ram_vector_table_size__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000c0; define symbol __ram_vector_table_offset__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000BF; /* Flash */ define symbol m_interrupts_start = 0x00000000; define symbol m_interrupts_end = 0x000000BF; define symbol m_bootinformation_start = 0x000000C0; define symbol m_bootinformation_end = 0x000000C3; define symbol m_text_start = 0x00000C4; define symbol m_text_end = 0x0000FFFF; /* .data space */ define symbol m_interrupts_ram_start = 0x20000000; define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__; define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__; define symbol m_data_end = m_data_start + 0x000015FF; /* .bss stack ... */ define symbol m_data_2_start = m_data_end + 0x00000001; define symbol m_data_2_end = m_data_2_start + 0x00001DEF; /* Flash driver space: 2K Bytes */ define symbol m_ram_flash_driver_map_start = m_data_2_end + 0x00000001; define symbol m_ram_flash_driver_map_end = m_ram_flash_driver_map_start + 0x00000013; define symbol m_ram_flash_driver_start = m_ram_flash_driver_map_end + 0x00000001; define symbol m_ram_flash_driver_end = 0x20003FEF; /* No initial Ram space: 16 Bytes */ define symbol m_data_noinit_start = m_ram_flash_driver_end + 0x00000001; define symbol m_data_noinit_end = 0x20003FFF; /* Stack space: 512 Bytes */ /* Stack & Heap Sizes */ if (isdefinedsymbol(__stack_size__)) { define symbol __size_cstack__ = __stack_size__; } else { define symbol __size_cstack__ = 0x00000200; } if (isdefinedsymbol(__heap_size__)) { define symbol __size_heap__ = __heap_size__; } else { define symbol __size_heap__ = 0x00000000; } define exported symbol __VECTOR_TABLE = m_interrupts_start; define exported symbol __VECTOR_RAM = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start; define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__; define exported symbol __RAM_START = m_interrupts_ram_start; define exported symbol __RAM_END = m_data_2_end; define memory mem with size = 4G; define region BootInfo_region = mem:[from m_bootinformation_start to m_bootinformation_end]; define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] | mem:[from m_text_start to m_text_end]; define region DATA_region = mem:[from m_data_start to m_data_end]; define region DATA_flash_driver_map_region = mem:[from m_ram_flash_driver_map_start to m_ram_flash_driver_map_end]; define region DATA_flash_driver_region = mem:[from m_ram_flash_driver_start to m_ram_flash_driver_end]; define region DATA_noinit_region = mem:[from m_data_noinit_start to m_data_noinit_end]; define region DATA_region_2 = mem:[from m_data_2_start to m_data_2_end]; define region CSTACK_region = mem:[from m_data_2_end + 1 - __size_cstack__ to m_data_2_end]; define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; define block RW { readwrite }; define block ZI { zi }; define block __CODE_ROM { section .textrw_init }; define block __CODE_RAM { section .textrw }; initialize manually { section .textrw }; initialize manually { section .bss}; initialize manually { section .data, section .code_ram }; initialize manually { section __DLIB_PERTHREAD }; do not initialize { section .no_init, section .bss, section .data, section __DLIB_PERTHREAD}; place at address mem: m_interrupts_start { readonly section .intvec }; place in TEXT_region { readonly }; place in TEXT_region { block __CODE_ROM }; place in DATA_region { block RW }; place in DATA_region { block __CODE_RAM }; place in DATA_region_2 { block ZI }; place in DATA_region_2 { last block HEAP }; place in CSTACK_region { block CSTACK }; place in m_interrupts_ram_region { section m_interrupts_ram }; place in DATA_noinit_region { readwrite section .no_init }; place in DATA_flash_driver_map_region { readwrite section .ram_flash_driver_map}; place in DATA_flash_driver_region { readonly section .ram_flash_driver}; place in BootInfo_region { readonly section .bootloaderInfo};