141 lines
6.2 KiB
Plaintext
141 lines
6.2 KiB
Plaintext
/*
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** ###################################################################
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** Processor: M0144A
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** Compiler: IAR ANSI C/C++ Compiler for ARM
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**
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** Abstract:
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** Linker file for the IAR ANSI C/C++ Compiler for ARM
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**
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** Copyright (c) 2022, Shenzhen CVA Innovation CO.,LTD
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** All rights reserved.
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**
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** Shenzhen CVA Innovation CO.,LTD (CVA chip) is supplying this file for use
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** exclusively with CVA's microcontroller products. This file can be freely
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** distributed within development tools that are supporting such microcontroller
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** products.
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**
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** THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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** OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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** CVA SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
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** OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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**
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** http: www.cvachip.com
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**
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** ###################################################################
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*/
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/* If symbol __flash_vector_table__=1 is defined at link time
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* the interrupt vector will not be copied to RAM.
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* Warning: Using the interrupt vector from FLASH will not allow
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* INT_SYS_InstallHandler because the section is Read Only.
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*/
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/* If want to debug the asw code without bootloader, please enable the define */
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//define symbol __asw_debug_en__ = 0x00000001;
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//define symbol __flash_vector_table__ = 0x00000001;
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define symbol __ram_vector_table_size__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x00000400;
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define symbol __ram_vector_table_offset__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000003FF;
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/* Flash */
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define symbol m_interrupts_start = isdefinedsymbol(__asw_debug_en__) ? 0 : 0x00010000;
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define symbol m_interrupts_end = isdefinedsymbol(__asw_debug_en__) ? 0 : 0x000103FF;
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define symbol m_asw_header_start = 0x00010400;
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define symbol m_asw_header_end = 0x0001043f;
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define symbol m_asw_code_start = 0x00010440;
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define symbol m_asw_code_end = 0x0007FFFB;
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define symbol m_asw_crc_start = 0x0007FFFC;
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define symbol m_asw_crc_end = 0x0007FFFF;
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/* SRAM_L */
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define symbol m_interrupts_ram_start = 0x1FFF0000;
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define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;
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define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
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define symbol m_data_end = 0x1FFFEFFF;
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/* SRAM_U */
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define symbol m_data_2_start = 0x20000000;
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define symbol m_data_2_end = 0x2000EFEF;
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define symbol m_data_2_noinit_start = 0x2000EFF0;
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define symbol m_data_2_noinit_end = 0x2000EFFF;
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/* Sizes */
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if (isdefinedsymbol(__stack_size__)) {
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define symbol __size_cstack__ = __stack_size__;
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} else {
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define symbol __size_cstack__ = 0x00002000;
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}
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if (isdefinedsymbol(__heap_size__)) {
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define symbol __size_heap__ = __heap_size__;
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} else {
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define symbol __size_heap__ = 0x00001000;
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}
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define exported symbol __VECTOR_TABLE = m_interrupts_start;
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define exported symbol __VECTOR_RAM = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start;
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define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
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define exported symbol __RAM_START = m_interrupts_ram_start;
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define exported symbol __RAM_END = m_data_2_noinit_end;
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define memory mem with size = 4G;
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define region m_asw_header_region = mem:[from m_asw_header_start to m_asw_header_end];
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define region m_asw_code_region = mem:[from m_interrupts_start to m_interrupts_end]
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| mem:[from m_asw_code_start to m_asw_code_end];
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define region m_asw_crc_region = mem:[from m_asw_crc_start to m_asw_crc_end];
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define region DATA_region = mem:[from m_data_start to m_data_end];
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define region DATA_noinit_region = mem:[from m_data_2_noinit_start to m_data_2_noinit_end];
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define region DATA_region_2 = mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
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define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
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define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
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define block CSTACK with alignment = 8, size = __size_cstack__ { };
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define block HEAP with alignment = 8, size = __size_heap__ { };
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define block RW { readwrite };
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define block ZI { zi };
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/* Custom Section Block that can be used to place data at absolute address. */
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/* Use __attribute__((section (".customSection"))) to place data here. */
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define block customSectionBlock { section .customSection };
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define block __CODE_ROM { section .textrw_init };
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define block __CODE_RAM { section .textrw };
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initialize manually { section .textrw };
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initialize manually { section .bss, section .bss.no_init};
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initialize manually { section .customSection, section .code_ram};
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initialize manually { section .data, section .code_ram };
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initialize manually { section __DLIB_PERTHREAD };
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do not initialize { section .no_init, section .bss, section .data, section __DLIB_PERTHREAD, section .customSection};
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place at address mem: m_interrupts_start { readonly section .intvec };
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place in m_asw_code_region { readonly };
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place in m_asw_code_region { block __CODE_ROM };
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place in DATA_region { block RW };
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place in DATA_region { block __CODE_RAM };
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place in DATA_region_2 { first block customSectionBlock };
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place in DATA_region_2 { block ZI };
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place in DATA_region_2 { last block HEAP };
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place in CSTACK_region { block CSTACK };
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place in m_interrupts_ram_region { section m_interrupts_ram };
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place in DATA_noinit_region { readwrite section .bss.no_init };
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place in m_asw_header_region { readonly section .asw_header};
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place in m_asw_crc_region { readonly section .checksum};
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