#include "hwctrl.h" #include "clock_drv.h" #include "SEGGER_RTT.h" #include "appTask.h" #include "TLE94x1.h" #include "string.h" #include "irq_drv.h" #include "canuser.h" /******************************************************************************* * the defines ******************************************************************************/ /******************************************************************************* * the typedefs ******************************************************************************/ /******************************************************************************* * the globals ******************************************************************************/ /******************************************************************************* * the const ******************************************************************************/ /******************************************************************************* * the function prototypes ******************************************************************************/ static void hw_IO_Init(McuType *obj); static void hw_clock_init(McuType *obj) { /* Setup the clock */ ClockDrv_ModuleClkConfigType clockConfig; uint32_t tTcr = 0; WdgDrv_Disable(&(obj->wdgDrv)); SEGGER_RTT_printf(0,"-----clock_INIT-----\n"); /* Enable the clock for all ports */ clockConfig.gating = true; ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTA, &clockConfig); ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTB, &clockConfig); ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTC, &clockConfig); ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTD, &clockConfig); ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTE, &clockConfig); /* Setup the Pll div2 clock */ clockConfig.gating = true; clockConfig.source = CLOCKDRV_PLL; clockConfig.div = 1; ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig); /* Setup the FIRC2 div2 clock */ clockConfig.gating = true; clockConfig.source = CLOCKDRV_FIRC; clockConfig.div = 1; ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_FIRC_DIV2, &clockConfig); /* Setup the SPI clock */ clockConfig.gating = true; clockConfig.source = CLOCKDRV_PLL_DIV2; ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_SPI2, &clockConfig); tTcr = SpiReg_GetTcr((const SpiRegType *)&obj->spiDrv2.reg); SpiDrv_SetPrescaler(&tTcr,0x03); } void hw_init(McuType *obj) { uint32_t gCpuClockFrequency = 0; hw_clock_init(obj); SEGGER_RTT_printf(0,"-----SPI_INIT-----\n"); SBC_SPI_INIT(); FlexCanBoot_Init(obj); hw_IO_Init(obj); /* Set system tick clock, 1ms event */ ClockDrv_GetFreq(&obj->clockDrv, CLOCKDRV_CORE, &gCpuClockFrequency); SysTick_Config(gCpuClockFrequency / 1000u); IrqDrv_EnableIrq(SysTick_IRQn); SBC_Init(); } #define PINSDRV_DIR_OUTPUT 1 #define PINSDRV_DIR_INPUT 0 static void hw_IO_Init(McuType *obj) { //1 PinsDrv_SetMuxModeSel(&obj->ptd, 1, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 1, 1); PortReg_SetPcrSr(obj->ptd.port, 1, 1); PinsDrv_SetPinDirection(&obj->ptd, 1, PINSDRV_DIR_OUTPUT); //2 PinsDrv_SetMuxModeSel(&obj->ptd, 0, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 0, 1); PortReg_SetPcrSr(obj->ptd.port, 0, 1); PinsDrv_SetPinDirection(&obj->ptd, 0, PINSDRV_DIR_OUTPUT); //3 PinsDrv_SetMuxModeSel(&obj->pte, 11, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 11, 1); PortReg_SetPcrSr(obj->pte.port, 11, 1); PinsDrv_SetPinDirection(&obj->pte, 11, PINSDRV_DIR_OUTPUT); //4 PinsDrv_SetMuxModeSel(&obj->pte, 10, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 10, 1); PortReg_SetPcrSr(obj->pte.port, 10, 1); PinsDrv_SetPinDirection(&obj->pte, 10, PINSDRV_DIR_OUTPUT); //5 PinsDrv_SetMuxModeSel(&obj->pte, 5, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 5, 1); PortReg_SetPcrSr(obj->pte.port, 5, 1); PinsDrv_SetPinDirection(&obj->pte, 5, PINSDRV_DIR_OUTPUT); //6 PinsDrv_SetMuxModeSel(&obj->pte, 4, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 4, 1); PortReg_SetPcrSr(obj->pte.port, 4, 1); PinsDrv_SetPinDirection(&obj->pte, 4, PINSDRV_DIR_OUTPUT); //7-12电源 //13 PinsDrv_SetMuxModeSel(&obj->pte, 3, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 3, 1); PortReg_SetPcrSr(obj->pte.port, 3, 1); PinsDrv_SetPinDirection(&obj->pte, 3, PINSDRV_DIR_OUTPUT); //14 PinsDrv_SetMuxModeSel(&obj->ptd, 16, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 16, 1); PortReg_SetPcrSr(obj->ptd.port, 16, 1); PinsDrv_SetPinDirection(&obj->ptd, 16, PINSDRV_DIR_OUTPUT); //15 PinsDrv_SetMuxModeSel(&obj->ptd, 15, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 15, 1); PortReg_SetPcrSr(obj->ptd.port, 15, 1); PinsDrv_SetPinDirection(&obj->ptd, 15, PINSDRV_DIR_OUTPUT); //16 PinsDrv_SetMuxModeSel(&obj->pte, 9, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 9, 1); PortReg_SetPcrSr(obj->pte.port, 9, 1); PinsDrv_SetPinDirection(&obj->pte, 9, PINSDRV_DIR_OUTPUT); //17 PinsDrv_SetMuxModeSel(&obj->pte, 8, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 8, 1); PortReg_SetPcrSr(obj->pte.port, 8, 1); PinsDrv_SetPinDirection(&obj->pte, 8, PINSDRV_DIR_OUTPUT); //18 PinsDrv_SetMuxModeSel(&obj->ptb, 5, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptb.port, 5, 1); PortReg_SetPcrSr(obj->ptb.port, 5, 1); PinsDrv_SetPinDirection(&obj->ptb, 5, PINSDRV_DIR_OUTPUT); //19 PinsDrv_SetMuxModeSel(&obj->ptb, 4, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptb.port, 4, 1); PortReg_SetPcrSr(obj->ptb.port, 4, 1); PinsDrv_SetPinDirection(&obj->ptb, 4, PINSDRV_DIR_OUTPUT); //20-22预留 //23 PinsDrv_SetMuxModeSel(&obj->ptd, 6, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 6, 1); PortReg_SetPcrSr(obj->ptd.port, 6, 1); PinsDrv_SetPinDirection(&obj->ptd, 6, PINSDRV_DIR_OUTPUT); //24 PinsDrv_SetMuxModeSel(&obj->ptd, 5, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 5, 1); PortReg_SetPcrSr(obj->ptd.port, 5, 1); PinsDrv_SetPinDirection(&obj->ptd, 5, PINSDRV_DIR_OUTPUT); //25-26 SPI //27 PinsDrv_SetMuxModeSel(&obj->ptc, 17, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->ptc.port, 17, 1); PortReg_SetPcrSr(obj->ptc.port, 17, 1); //28 PinsDrv_SetMuxModeSel(&obj->ptc, 16, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptc.port, 16, 1); PortReg_SetPcrSr(obj->ptc.port, 16, 1); PinsDrv_SetPinDirection(&obj->ptc, 16,PINSDRV_DIR_OUTPUT); //29 30 SPI //31 PinsDrv_SetMuxModeSel(&obj->ptb, 3, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->ptb.port, 3, 1); PortReg_SetPcrSr(obj->ptb.port, 3, 1); //32 PinsDrv_SetMuxModeSel(&obj->ptb, 2, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptb.port, 2, 1); PortReg_SetPcrSr(obj->ptb.port, 2, 1); //33 34 CAN //35 PinsDrv_SetMuxModeSel(&obj->ptc, 9, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptc.port, 9, 1); PortReg_SetPcrSr(obj->ptc.port, 9, 1); PinsDrv_SetPinDirection(&obj->ptc, 9,PINSDRV_DIR_OUTPUT); //36 PinsDrv_SetMuxModeSel(&obj->ptc, 8, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptc.port, 8, 1); PortReg_SetPcrSr(obj->ptc.port, 8, 1); //37 PinsDrv_SetMuxModeSel(&obj->pta, 7, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->pta.port, 7, 1); PortReg_SetPcrSr(obj->pta.port, 7, 1); //38 PinsDrv_SetMuxModeSel(&obj->pta, 6, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 6, 1); PortReg_SetPcrSr(obj->pta.port, 6, 1); //39 PinsDrv_SetMuxModeSel(&obj->pte, 7, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 7, 1); PortReg_SetPcrSr(obj->pte.port, 7, 1); //40 41 VDD //42 NC //43 PinsDrv_SetMuxModeSel(&obj->ptb, 12, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->ptb.port, 12, 1); PortReg_SetPcrSr(obj->ptb.port, 12, 1); //44 PinsDrv_SetMuxModeSel(&obj->ptd, 4, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 4, 1); PortReg_SetPcrSr(obj->ptd.port, 4, 1); //45 PinsDrv_SetMuxModeSel(&obj->ptd, 3, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptd.port, 3, 1); PortReg_SetPcrSr(obj->ptd.port, 3, 1); //46 PinsDrv_SetMuxModeSel(&obj->ptd, 2, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->ptd.port, 2, 1); PortReg_SetPcrSr(obj->ptd.port, 2, 1); //47 PinsDrv_SetMuxModeSel(&obj->pta, 3, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 3, 1); PortReg_SetPcrSr(obj->pta.port, 3, 1); PinsDrv_SetPinDirection(&obj->pta, 3, PINSDRV_DIR_OUTPUT); //48 PinsDrv_SetMuxModeSel(&obj->pta, 2, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 2, 1); PortReg_SetPcrSr(obj->pta.port, 2, 1); PinsDrv_SetPinDirection(&obj->pta, 2, PINSDRV_DIR_OUTPUT); //49 PinsDrv_SetMuxModeSel(&obj->pta, 1, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->pta.port, 1, 1); PortReg_SetPcrSr(obj->pta.port, 1, 1); //50 PinsDrv_SetMuxModeSel(&obj->pta, 0, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->pta.port, 0, 1); PortReg_SetPcrSr(obj->pta.port, 0, 1); //51 PinsDrv_SetMuxModeSel(&obj->ptc, 7, PINSDRV_PIN_DISABLED); PortReg_SetPcrDrvStr(obj->ptc.port, 7, 1); PortReg_SetPcrSr(obj->ptc.port, 7, 1); //52 PinsDrv_SetMuxModeSel(&obj->ptc, 6, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->ptc.port, 6, 1); PortReg_SetPcrSr(obj->ptc.port, 6, 1); PinsDrv_SetPinDirection(&obj->ptc, 6, PINSDRV_DIR_OUTPUT); //53 PinsDrv_SetMuxModeSel(&obj->pte, 6, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 6, 1); PortReg_SetPcrSr(obj->pte.port, 6, 1); PinsDrv_SetPinDirection(&obj->pte, 6, PINSDRV_DIR_OUTPUT); //54 PinsDrv_SetMuxModeSel(&obj->pte, 2, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 2, 1); PortReg_SetPcrSr(obj->pte.port, 2, 1); PinsDrv_SetPinDirection(&obj->pte, 2, PINSDRV_DIR_OUTPUT); //55 PinsDrv_SetMuxModeSel(&obj->pta, 13, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 13, 1); PortReg_SetPcrSr(obj->pta.port, 13, 1); PinsDrv_SetPinDirection(&obj->pta, 12, PINSDRV_DIR_OUTPUT); //56 PinsDrv_SetMuxModeSel(&obj->pta, 12, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 12, 1); PortReg_SetPcrSr(obj->pta.port, 12, 1); PinsDrv_SetPinDirection(&obj->pta, 11, PINSDRV_DIR_OUTPUT); //57 PinsDrv_SetMuxModeSel(&obj->pta, 11, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 11, 1); PortReg_SetPcrSr(obj->pta.port, 11, 1); //58 PinsDrv_SetMuxModeSel(&obj->pta, 10, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pta.port, 10, 1); PortReg_SetPcrSr(obj->pta.port, 10, 1); PinsDrv_SetPinDirection(&obj->pta, 10, PINSDRV_DIR_OUTPUT); //59 PinsDrv_SetMuxModeSel(&obj->pte, 1, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 1, 1); PortReg_SetPcrSr(obj->pte.port, 1, 1); PinsDrv_SetPinDirection(&obj->pte, 1, PINSDRV_DIR_OUTPUT); //60 PinsDrv_SetMuxModeSel(&obj->pte, 0, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 0, 1); PortReg_SetPcrSr(obj->pte.port, 0, 1); PinsDrv_SetPinDirection(&obj->pte, 0, PINSDRV_DIR_OUTPUT); //61 PinsDrv_SetMuxModeSel(&obj->pte, 5, PINSDRV_MUX_AS_GPIO); PortReg_SetPcrDrvStr(obj->pte.port, 5, 1); PortReg_SetPcrSr(obj->pte.port, 5, 1); //62-64 SWD } /*************************************motor driver *****************************************/ void hw_MotorCtrl(McuType *obj,Motor_ID_Type motorid,Motor_ACT_Type dir) { switch(motorid) { case Motor1: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->ptd, 0); PinsDrv_ClearPin(&obj->ptd, 1); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->ptd, 0); PinsDrv_ClearPin(&obj->ptd, 1); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->ptd, 1); PinsDrv_ClearPin(&obj->ptd, 0); break; } break; case Motor2: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->pte, 10); PinsDrv_ClearPin(&obj->pte, 11); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->pte, 10); PinsDrv_ClearPin(&obj->pte, 11); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->pte, 11); PinsDrv_ClearPin(&obj->pte, 10); break; } break; case Motor3: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->pte, 4); PinsDrv_ClearPin(&obj->pte, 5); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->pte, 4); PinsDrv_ClearPin(&obj->pte, 5); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->pte, 5); PinsDrv_ClearPin(&obj->pte, 4); break; } break; case Motor4: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->pte, 3); PinsDrv_ClearPin(&obj->ptd, 16); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->pte, 3); PinsDrv_ClearPin(&obj->ptd, 16); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->ptd, 16); PinsDrv_ClearPin(&obj->pte, 3); break; } break; case Motor5: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->pte, 9); PinsDrv_ClearPin(&obj->ptd, 15); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->pte, 9); PinsDrv_ClearPin(&obj->ptd, 15); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->ptd, 15); PinsDrv_ClearPin(&obj->pte, 9); break; } break; case Motor6: switch(dir) { case Motor_ACT_NOACT: PinsDrv_ClearPin(&obj->ptd, 0); PinsDrv_ClearPin(&obj->ptd, 1); break; case Motor_ACT_CW: PinsDrv_SetPin(&obj->ptd, 0); PinsDrv_ClearPin(&obj->ptd, 1); break; case Motor_ACT_CCW: PinsDrv_SetPin(&obj->ptd, 1); PinsDrv_ClearPin(&obj->ptd, 0); break; } break; } }