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This commit is contained in:
sunbeam 2024-12-13 15:12:15 +08:00
parent 32a6c33afe
commit 3353e0f792
9 changed files with 120 additions and 71 deletions
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4
cva_bootloader_m0146/SDK/platform/devices/CVM014x/drivers/cpu/startup/system_M014x.c
View File

@ -50,7 +50,7 @@ void SystemInit(void)
#if defined (_USE_EXT_OSC_)
/* Use External oscillator */
AcgReg_SetOscRange(ACG, 2); /* set SOSC frequency range(use max value when SOSC as the clock source of the PLL) */
AcgReg_SetOscRange(ACG, 1); /* set SOSC frequency range(use max value when SOSC as the clock source of the PLL) */
AcgReg_SetEnSosc(ACG, 1); /* enable SOSC */
while(AcgReg_GetStSoscRdy(ACG) == 0); /* wait until SOSC is ready */
@ -62,7 +62,7 @@ void SystemInit(void)
* - feedback divider : 45
* - PLL Feedback clock divider pre-scaler : 1
* - PLL post-divider setting : 3
* Final PLL output frequency is 16M(SOSC) * 45 / 3 / 2 = 120M
* Final PLL output frequency is 8M(SOSC) * 90 / 3 / 2 = 120M
*/
AcgReg_SetPllClkIn(ACG, 2);
AcgReg_SetPllPreDiv(ACG, 0);

4
cva_bootloader_m0146/linker/bootloader_m0146_flash.icf
View File

@ -68,13 +68,13 @@ define symbol m_data_2_noinit_end = 0x2000EFFF;
if (isdefinedsymbol(__stack_size__)) {
define symbol __size_cstack__ = __stack_size__;
} else {
define symbol __size_cstack__ = 0x00001000;
define symbol __size_cstack__ = 0x00002000;
}
if (isdefinedsymbol(__heap_size__)) {
define symbol __size_heap__ = __heap_size__;
} else {
define symbol __size_heap__ = 0x00000400;
define symbol __size_heap__ = 0x00001000;
}
define exported symbol __VECTOR_TABLE = m_interrupts_start;

26
cva_bootloader_m0146/settings/cva_bootloader_m0146.dnx
View File

@ -15,16 +15,16 @@
<WatchCond>_ 0</WatchCond>
<Watch0>_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0</Watch0>
<Watch1>_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0</Watch1>
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
<CStepIntDis>_ 0</CStepIntDis>
<jlinkResetStyle>12</jlinkResetStyle>
<jlinkResetStrategy>0</jlinkResetStrategy>
<TraceBufferSize>0x10000</TraceBufferSize>
<TraceStallIfFIFOFull>0x0</TraceStallIfFIFOFull>
<TracePortSize>0x4</TracePortSize>
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
<CStepIntDis>_ 0</CStepIntDis>
</JLinkDriver>
<DebugChecksum>
<Checksum>968150740</Checksum>
<Checksum>3131505811</Checksum>
</DebugChecksum>
<Trace1>
<Enabled>0</Enabled>
@ -80,8 +80,8 @@
<MemConfigValue>E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\config\debugger\CVAChip\CVM0144.ddf</MemConfigValue>
</PlDriver>
<ArmDriver>
<EnableCache>0</EnableCache>
<EnforceMemoryConfiguration>1</EnforceMemoryConfiguration>
<EnableCache>0</EnableCache>
</ArmDriver>
<TerminalIO>
<InputSource>1</InputSource>
@ -155,15 +155,6 @@
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</EventLog>
<PowerProbe>
<Frequency>10000</Frequency>
<Probe0>I0</Probe0>
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
</PowerProbe>
<TermIOLog>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<DisassembleMode>
<mode>0</mode>
</DisassembleMode>
@ -172,8 +163,17 @@
<Bp1>_ 1 "EMUL_CODE" "{$PROJ_DIR$\SDK\middleware\uds\user\uds_service37.c}.67.13" 0 0 1 "" 0 "" 0</Bp1>
<Count>2</Count>
</Breakpoints2>
<TermIOLog>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<Aliases>
<Count>0</Count>
<SuppressDialog>0</SuppressDialog>
</Aliases>
<PowerProbe>
<Frequency>10000</Frequency>
<Probe0>I0</Probe0>
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
</PowerProbe>
</settings>

43
cva_bootloader_m0146/settings/cva_bootloader_m0146.wsdt
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File diff suppressed because one or more lines are too long

6
cva_bootloader_m0146/src/bootloader/bootloader_cfg.h
View File

@ -33,9 +33,9 @@ extern "C" {
* the defines
******************************************************************************/
/* If want to Generate flash driver code in ram, enable the configuration; if not, disable the configuration */
#define BOOTLOADER_CFG_FLS_CODE_GENERATE_EN (0u)
#define BOOTLOADER_CFG_FLS_CODE_GENERATE_EN (1u)
/* Copy flash driver from flash to ram to run if don't get flash driver from out side, only just for debug the flash driver */
#define BOOTLOADER_CFG_FLS_COPY_AUTO_EN (0u)
#define BOOTLOADER_CFG_FLS_COPY_AUTO_EN (1u)
/* Indication value with boot loader request from asw */
#define BOOTLOADER_CFG_REQ_ACTIVE (0x55AAAA55ul)
@ -66,7 +66,7 @@ extern "C" {
#define BOOTLOADER_CFG_FLS_DRV_RAM_CODE_SIZE (BOOTLOADER_CFG_FLS_DRV_RAM_CRC_ADDR - BOOTLOADER_CFG_FLS_DRV_RAM_START_ADDR)
/* The max time stay in boot before can jump to App, unit: ms */
#define BOOTLOADER_CFG_BOOT_DURATION_MS (50u)
#define BOOTLOADER_CFG_BOOT_DURATION_MS (10u)
/* Erased all sector */
#define BOOTLOADER_CFG_ERASE_ALL (0xFFFFFFFF)

103
cva_bootloader_m0146/src/main.c
View File

@ -98,6 +98,8 @@ typedef struct
#pragma location = ".no_init"
static uint32_t sBootloader_Req;
#pragma location = ".no_init"
static uint32_t reboot_times;
#pragma location = ".bootloaderInfo"
__root const Bootloade_CfgInfoType sBootloader_Version = {
@ -439,6 +441,8 @@ void SysTick_Handler(void)
Uds_Tick(&udsObj);
}
void CAN0_ERxFIFO_Handler(void)
{
if(FlexCanDrv_GetEnhanceRxFFIsrFlag(flexCanDrv_DemoObj, FLEXCANDRV_ENHANCERXFF_ISR_SRC_DAIE) == true)
@ -750,6 +754,36 @@ static void ResetS3Timer(UdsType *obj)
{
obj->s3ServerTimer.counter = 0;
}
uint8_t ExtraBootInitFlag,ExtraBootInitDelay;
static void ExtraBootInit(void)
{
uint32_t tTcr = 0;
ClockDrv_ModuleClkConfigType clockConfig;
/* Setup the Pll div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
/* Setup the SPI clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL_DIV2;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI2, &clockConfig);
tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv2.reg);
SpiDrv_SetPrescaler(&tTcr,0x03);
//SEGGER_RTT_printf(0,"ret = %d\n",ret);
//SEGGER_RTT_printf(0,"-----SBC_SPI_INIT-----\n");
SBC_SPI_INIT();
SBC_Init();
}
int main(void)
{
FlexCan_FrameStructureType rxMsg;
@ -757,8 +791,19 @@ int main(void)
ClockDrv_ModuleClkConfigType clockConfig;
uint32_t ret;
uint32_t rollingcounter,temp;
uint32_t tTcr = 0;
if((reboot_times>>16) != 0x55AA)
{
reboot_times = 0x55AA0000;
}
else
{
reboot_times++;
}
ExtraBootInitFlag = 0;
ExtraBootInitDelay = 0;
IrqDrv_DisableGlobalInterrupt();
/* Initialize all MCU drivers: flash drv included */
@ -781,29 +826,7 @@ int main(void)
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTD, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTE, &clockConfig);
/* Setup the Pll div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
/* Setup the SPI clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL_DIV2;
ret = ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI2, &clockConfig);
tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv2.reg);
SpiDrv_SetPrescaler(&tTcr,0x03);
//SEGGER_RTT_printf(0,"ret = %d\n",ret);
//SEGGER_RTT_printf(0,"-----SBC_SPI_INIT-----\n");
SBC_SPI_INIT();
SBC_Init();
//SBC_Mode_Normal();
/* get CAN controller default configuration */
@ -836,23 +859,47 @@ int main(void)
IrqDrv_EnableGlobalInterrupt();
SEGGER_RTT_printf(0,"gCpuClockFrequency = %d\n",gCpuClockFrequency);
//SEGGER_RTT_printf(0,"gCpuClockFrequency = %d\n",gCpuClockFrequency);
SEGGER_RTT_printf(0,"reboot_times = %d\n",(reboot_times&0xff));
uint32_t reset_src = mcu.resetDrv.rcmReg->RST_FLAG;
SEGGER_RTT_printf(0,"reset_src = %08x\n",reset_src);
if ((reboot_times&0xff) > 5)
{
Bootloader_EventEmergeBootRequest(true);
}
while(1)
{
if(gSystick1msEvent > 0u)
{
gSystick1msEvent = 0;
gSystick1msCnt++;
if (ExtraBootInitFlag == 0)
{
if (ExtraBootInitDelay < BOOTLOADER_CFG_BOOT_DURATION_MS)
{
ExtraBootInitDelay++;
}
else
{
ExtraBootInitDelay = 0;
ExtraBootInitFlag = 1;
ExtraBootInit();
}
}
if (gSystick1msCnt % 10 == 0)
{
SBC_WD_Trigger();
if (ExtraBootInitFlag == 1)
{
SBC_WD_Trigger();
}
}
if (PinsDrv_ReadPin(&mcu.ptc, 2) == 0)
{
Bootloader_EventEmergeBootRequest(true);
}
if (gSystick1msCnt % 500 == 0)
if (gSystick1msCnt % 1000 == 0)
{
ret = SBC_Read_Command(SBC_WD_CTRL);
SEGGER_RTT_printf(0,"%04d : SBC_WD_CTRL = %x\n",rollingcounter++,ret);

1
cva_bootloader_m0146/src/private_driver/isotp/isotp.c
View File

@ -637,6 +637,7 @@ void IsoTp_HandleIncomingCanMsg(IsoTpType *obj, uint32_t id, const uint8_t *data
/* If wrong SN */
if(ISOTP_RET_WRONG_SN == ret)
{
TxTestMsg(&msg.byte);
obj->receiveProtocolResult = ISOTP_PROTOCOL_RESULT_WRONG_SN;
obj->receiveStatus = ISOTP_RECEIVE_STATUS_IDLE;
break;

2
cva_bootloader_m0146/src/private_driver/uds/stack/uds.h
View File

@ -85,7 +85,7 @@ extern "C" {
#define BYTES_OF(x) (sizeof(x) / sizeof(uint8_t))
#define UDS_RSP_LEN_MAX (512)
#define UDS_RSP_LEN_MAX (64)
/* DID type */
#define UDS_VAR_TYPE_NONVOL_STORAGE (1 << 0) /* set if non-volatile data */

2
cva_bootloader_m0146/src/private_driver/uds/user/uds_service36.c
View File

@ -136,7 +136,7 @@ void UdsService36_TransferData(UdsType *obj, const uint8_t msgBuf[], uint16_t ms
rspBuffer[0] = UDS_GET_POSITIVE_RSP(0x36);
rspBuffer[1] = s_curRcvSequence;
Uds_PositiveResponse(obj, rspBuffer, 2);
//Uds_PositiveResponse(obj, rspBuffer, 2);
}
break;
case UDS_TRANSFER_DIR_UPLOAD: