2025-04-26 16:03:23 +08:00

111 lines
3.9 KiB
C

/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20230602- --V1.0-- --mingyea--- --修改--
** #########################################################################*/
#ifndef CLK_H___
#define CLK_H___
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
/* Include inherited beans */
#include "common_types.h"
#include "clk_cfg.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
//自己手動加的
typedef enum
{
CLK_SYS_SRC_NULL=0,
CLK_SYS_SRC_OSC=1,
CLK_SYS_SRC_SIRC=2,
CLK_SYS_SRC_FIRC=3,
CLK_SYS_SRC_SPLL=6
}clk_sys_source_e;
typedef struct
{
u8 error;
//clk_work_mode_e mode;
//clk_sys_source_e sys_src;
u32 osc_freq;
u32 firc_freq;
u32 sirc_freq;
u32 vco_freq; /*!< returns SYSCLK clock frequency expressed in Hz */
u32 spll_freq; /*!< returns SYSCLK clock frequency expressed in Hz */
u32 core_freq; /*!< returns SYSCLK clock frequency expressed in Hz */
u32 sysclk_freq; /*!< returns SYSCLK clock frequency expressed in Hz */
u32 bus_freq; /*!< returns HCLK clock frequency expressed in Hz */
u32 flash_freq; /*!< returns PCLK1 clock frequency expressed in Hz */
u32 spll1_freq; /*!< returns PCLK2 clock frequency expressed in Hz */
u32 spll2_freq; /*!< returns PCLK2 clock frequency expressed in Hz */
u32 firc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 firc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 sirc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 sirc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 sosc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 sosc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 rtc_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 lpo_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
u32 rtc_out_freq; /*!< returns ADCCLK clock frequency expressed in Hz */
}clk_clocks_freq_s;
/*---------------------------------------------------------------------------
- G L O B A L V A R I A B L E S
- only configuration table allowed here,variables are not allowed!
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void clk_init(void);
void clk_get_clock_frequence(clk_clocks_freq_s* clk_freq);
void clk_update_clock_frequence(void);
void SystemDeInit (void);
void FDET_IRQHandler(void);
void CMU_PLL_ConfigDomain_SYSTEM(uint32_t Source, uint32_t PLL_REFPSC, uint32_t PLL_DB, uint32_t PLL_OSEL);
void SelRCHFToPLL(uint32_t rchf, uint32_t clock);
void SelXTHFToPLL(uint32_t div, uint32_t clock);
void RCHFInit(uint32_t clock);
void XTHFInit(void);
#endif
/* ifndef CLK_H___ */