354 lines
10 KiB
C
354 lines
10 KiB
C
|
/** ##########################################################################
|
||
|
** Filename :
|
||
|
** Project :
|
||
|
** Module :
|
||
|
** Processor :
|
||
|
** Version : 1.0
|
||
|
** Compiler :
|
||
|
** Date/Time :
|
||
|
** Abstract :
|
||
|
** Contents :
|
||
|
** Note :
|
||
|
**
|
||
|
** (c) Copyright dmdz Co.,Ltd
|
||
|
** --------------------------------------------------------------------------
|
||
|
** R E V I S I O N H I S T O R Y
|
||
|
** --------------------------------------------------------------------------
|
||
|
** Date Ver Author Description
|
||
|
|
||
|
** -20191106- --V01-- --LYJ--- --初版--
|
||
|
** -20230602- --V1.0-- --mingyea--- --修改--
|
||
|
|
||
|
** #########################################################################*/
|
||
|
#ifndef GPIO_CFG_H__
|
||
|
#define GPIO_CFG_H__
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- I N C L U D E F I L E S
|
||
|
----------------------------------------------------------------------------*/
|
||
|
#include "common_types.h"
|
||
|
#include "common_cfg.h"
|
||
|
#include "cpu.h"
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- D E F I N E S / M A C R O S
|
||
|
----------------------------------------------------------------------------*/
|
||
|
#define gpio_read_pin_input FL_GPIO_GetInputPin //
|
||
|
|
||
|
|
||
|
//NTC AD
|
||
|
#define ADC_CHANNEL_0_PIN_ID GPIO_PIN8
|
||
|
#define ADC_CHANNEL_0_PIN_MASK GPIO_PIN8_MASK
|
||
|
#define ADC_CHANNEL_0_GPIO GPIOC
|
||
|
#define ADC_CHANNEL_0_PHY_ID FL_ADC_EXTERNAL_CH13
|
||
|
#define ADC_CHANNEL_0_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//ad1
|
||
|
#define ADC_CHANNEL_1_PIN_ID GPIO_PIN1
|
||
|
#define ADC_CHANNEL_1_PIN_MASK GPIO_PIN1_MASK
|
||
|
#define ADC_CHANNEL_1_GPIO GPIOA
|
||
|
#define ADC_CHANNEL_1_PHY_ID FL_ADC_EXTERNAL_CH12
|
||
|
#define ADC_CHANNEL_1_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//ad3
|
||
|
#define ADC_CHANNEL_2_PIN_ID GPIO_PIN0
|
||
|
#define ADC_CHANNEL_2_PIN_MASK GPIO_PIN0_MASK
|
||
|
#define ADC_CHANNEL_2_GPIO GPIOA
|
||
|
#define ADC_CHANNEL_2_PHY_ID FL_ADC_EXTERNAL_CH5
|
||
|
#define ADC_CHANNEL_2_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
#if 0
|
||
|
//ad3
|
||
|
#define ADC_CHANNEL_3_PIN_ID GPIO_PIN9
|
||
|
#define ADC_CHANNEL_3_PIN_MASK GPIO_PIN9_MASK
|
||
|
#define ADC_CHANNEL_3_GPIO GPIOC
|
||
|
#define ADC_CHANNEL_3_PHY_ID FL_ADC_EXTERNAL_CH14
|
||
|
#define ADC_CHANNEL_3_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//ad4
|
||
|
#define ADC_CHANNEL_4_PIN_ID GPIO_PIN10
|
||
|
#define ADC_CHANNEL_4_PIN_MASK GPIO_PIN10_MASK
|
||
|
#define ADC_CHANNEL_4_GPIO GPIOC
|
||
|
#define ADC_CHANNEL_4_PHY_ID FL_ADC_EXTERNAL_CH15
|
||
|
#define ADC_CHANNEL_4_FUNC_SEL GPIO_FUN2
|
||
|
#endif
|
||
|
|
||
|
//ad2
|
||
|
#define ADC_CHANNEL_5_PIN_ID GPIO_PIN0
|
||
|
#define ADC_CHANNEL_5_PIN_MASK GPIO_PIN0_MASK
|
||
|
#define ADC_CHANNEL_5_GPIO GPIOD
|
||
|
#define ADC_CHANNEL_5_PHY_ID FL_ADC_EXTERNAL_CH7
|
||
|
#define ADC_CHANNEL_5_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//ad 12v
|
||
|
#define ADC_CHANNEL_6_PIN_ID GPIO_PIN1
|
||
|
#define ADC_CHANNEL_6_PIN_MASK GPIO_PIN1_MASK
|
||
|
#define ADC_CHANNEL_6_GPIO GPIOD
|
||
|
#define ADC_CHANNEL_6_PHY_ID FL_ADC_EXTERNAL_CH1
|
||
|
#define ADC_CHANNEL_6_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//ad rh
|
||
|
#define ADC_CHANNEL_7_PIN_ID GPIO_PIN11
|
||
|
#define ADC_CHANNEL_7_PIN_MASK GPIO_PIN11_MASK
|
||
|
#define ADC_CHANNEL_7_GPIO GPIOD
|
||
|
#define ADC_CHANNEL_7_PHY_ID FL_ADC_EXTERNAL_CH0
|
||
|
#define ADC_CHANNEL_7_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
//sns ad
|
||
|
#define ADC_CHANNEL_8_PIN_ID GPIO_PIN7
|
||
|
#define ADC_CHANNEL_8_PIN_MASK GPIO_PIN7_MASK
|
||
|
#define ADC_CHANNEL_8_GPIO GPIOC
|
||
|
#define ADC_CHANNEL_8_PHY_ID FL_ADC_EXTERNAL_CH6
|
||
|
#define ADC_CHANNEL_8_FUNC_SEL GPIO_FUN2
|
||
|
|
||
|
|
||
|
#define CAN0_TX_PIN_ID GPIO_PIN7
|
||
|
#define CAN0_TX_PIN_MASK GPIO_PIN7_MASK
|
||
|
#define CAN0_TX_GPIO GPIOA
|
||
|
#define CAN0_TX_FUNC_SEL GPIO_FUN1
|
||
|
|
||
|
|
||
|
#define CAN0_RX_PIN_ID GPIO_PIN6
|
||
|
#define CAN0_RX_PIN_MASK GPIO_PIN6_MASK
|
||
|
#define CAN0_RX_GPIO GPIOA
|
||
|
#define CAN0_RX_FUNC_SEL GPIO_FUN1
|
||
|
|
||
|
|
||
|
|
||
|
#define CAN0_STB_PIN_ID GPIO_PIN2
|
||
|
#define CAN0_STB_PIN_MASK GPIO_PIN2_MASK
|
||
|
#define CAN0_STB_GPIO GPIOA
|
||
|
#define CAN0_STB_FUNC_SEL GPIO_FUN0
|
||
|
|
||
|
|
||
|
#define CAN0_RX_EXIT_LINE FL_GPIO_EXTI_LINE_1
|
||
|
#define CAN0_RX_EXIT_GROUP FL_GPIO_EXTI_INPUT_GROUP2
|
||
|
#define CAN0_RX_PIN_VALID GPIO_LEVEL_LOW
|
||
|
|
||
|
|
||
|
#define KEY_1_ENCODE_PIN_ID GPIO_PIN11
|
||
|
#define KEY_1_ENCODE_PIN_MASK GPIO_PIN11_MASK
|
||
|
#define KEY_1_ENCODE_GPIO GPIOA
|
||
|
|
||
|
#define KEY_2_ENCODE_PIN_ID GPIO_PIN12
|
||
|
#define KEY_2_ENCODE_PIN_MASK GPIO_PIN12_MASK
|
||
|
#define KEY_2_ENCODE_GPIO GPIOA
|
||
|
|
||
|
#define KEY_1_PIN_ID GPIO_PIN3
|
||
|
#define KEY_1_PIN_MASK GPIO_PIN3_MASK
|
||
|
#define KEY_1_GPIO GPIOB
|
||
|
|
||
|
#define KEY_2_PIN_ID GPIO_PIN9
|
||
|
#define KEY_2_PIN_MASK GPIO_PIN9_MASK
|
||
|
#define KEY_2_GPIO GPIOC
|
||
|
|
||
|
#define KEY_3_PIN_ID GPIO_PIN11
|
||
|
#define KEY_3_PIN_MASK GPIO_PIN11_MASK
|
||
|
#define KEY_3_GPIO GPIOB
|
||
|
|
||
|
#define KEY_4_PIN_ID GPIO_PIN2
|
||
|
#define KEY_4_PIN_MASK GPIO_PIN2_MASK
|
||
|
#define KEY_4_GPIO GPIOB
|
||
|
|
||
|
#define KEY_5_PIN_ID GPIO_PIN10
|
||
|
#define KEY_5_PIN_MASK GPIO_PIN10_MASK
|
||
|
#define KEY_5_GPIO GPIOC
|
||
|
|
||
|
#define KEY_6_PIN_ID GPIO_PIN6
|
||
|
#define KEY_6_PIN_MASK GPIO_PIN6_MASK
|
||
|
#define KEY_6_GPIO GPIOC
|
||
|
|
||
|
#define O_MDT_CTR_PIN_ID GPIO_PIN10
|
||
|
#define O_MDT_CTR_PIN_MASK GPIO_PIN10_MASK
|
||
|
#define O_MDT_CTR_GPIO GPIOB
|
||
|
|
||
|
#define O_12V_CTR_PIN_ID GPIO_PIN15
|
||
|
#define O_12V_CTR_PIN_MASK GPIO_PIN15_MASK
|
||
|
#define O_12V_CTR_GPIO GPIOA
|
||
|
|
||
|
#define O_5V_CTR_PIN_ID GPIO_PIN8
|
||
|
#define O_5V_CTR_PIN_MASK GPIO_PIN8_MASK
|
||
|
#define O_5V_CTR_GPIO GPIOB
|
||
|
|
||
|
#define O_DEN_CTR_PIN_ID GPIO_PIN3
|
||
|
#define O_DEN_CTR_PIN_MASK GPIO_PIN3_MASK
|
||
|
#define O_DEN_CTR_GPIO GPIOA
|
||
|
|
||
|
#define O_KIT_CTR_PIN_ID GPIO_PIN9
|
||
|
#define O_KIT_CTR_PIN_MASK GPIO_PIN9_MASK
|
||
|
#define O_KIT_CTR_GPIO GPIOA
|
||
|
|
||
|
//这个不确定
|
||
|
#if 0
|
||
|
#define O_MD_PWM_PIN_ID GPIO_PIN10
|
||
|
#define O_MD_PWM_PIN_MASK GPIO_PIN10_MASK
|
||
|
#define O_MD_PWM_GPIO GPIOB
|
||
|
//#define O_MD_PWM_CHANNEL FL_GPTIM_CHANNEL_2
|
||
|
#endif
|
||
|
|
||
|
//gptim1_ch3
|
||
|
#define PWM_LED_PIN_ID GPIO_PIN4
|
||
|
#define PWM_LED_PIN_MASK GPIO_PIN4_MASK
|
||
|
#define PWM_LED_GPIO GPIOA
|
||
|
#define PWM_LED_REPIN FL_DISABLE
|
||
|
|
||
|
//gptim0_ch1
|
||
|
#define PWM_HS_PIN_ID GPIO_PIN10
|
||
|
#define PWM_HS_PIN_MASK GPIO_PIN10_MASK
|
||
|
#define PWM_HS_GPIO GPIOB
|
||
|
#define PWM_HS_REPIN FL_ENABLE
|
||
|
|
||
|
|
||
|
//ATIM_ch1
|
||
|
#define PWM_L1_PIN_ID GPIO_PIN4
|
||
|
#define PWM_L1_PIN_MASK GPIO_PIN4_MASK
|
||
|
#define PWM_L1_GPIO GPIOB
|
||
|
#define PWM_L1_REPIN FL_ENABLE
|
||
|
|
||
|
//ATIM_ch2
|
||
|
#define PWM_L2_PIN_ID GPIO_PIN5
|
||
|
#define PWM_L2_PIN_MASK GPIO_PIN5_MASK
|
||
|
#define PWM_L2_GPIO GPIOB
|
||
|
#define PWM_L2_REPIN FL_ENABLE
|
||
|
|
||
|
//ATIM_ch3
|
||
|
#define PWM_R2_PIN_ID GPIO_PIN6
|
||
|
#define PWM_R2_PIN_MASK GPIO_PIN6_MASK
|
||
|
#define PWM_R2_GPIO GPIOB
|
||
|
#define PWM_R2_REPIN FL_ENABLE
|
||
|
|
||
|
//ATIM_ch4
|
||
|
#define PWM_R1_PIN_ID GPIO_PIN7
|
||
|
#define PWM_R1_PIN_MASK GPIO_PIN7_MASK
|
||
|
#define PWM_R1_GPIO GPIOB
|
||
|
#define PWM_R1_REPIN FL_ENABLE
|
||
|
|
||
|
|
||
|
//gptim1_ch1
|
||
|
#define PWM_LH_PIN_ID GPIO_PIN0
|
||
|
#define PWM_LH_PIN_MASK GPIO_PIN0_MASK
|
||
|
#define PWM_LH_GPIO GPIOC
|
||
|
#define PWM_LH_REPIN FL_DISABLE
|
||
|
|
||
|
//gptim1_ch1
|
||
|
#define PWM_RH_PIN_ID GPIO_PIN1
|
||
|
#define PWM_RH_PIN_MASK GPIO_PIN1_MASK
|
||
|
#define PWM_RH_GPIO GPIOC
|
||
|
#define PWM_RH_REPIN FL_DISABLE
|
||
|
|
||
|
|
||
|
|
||
|
#define TEST1_PIN_ID GPIO_PIN8
|
||
|
#define TEST1_PIN_MASK GPIO_PIN8_MASK
|
||
|
#define TEST1_GPIO GPIOB
|
||
|
|
||
|
#define TEST2_PIN_ID GPIO_PIN6_MASK
|
||
|
#define TEST2_PIN_MASK GPIO_PIN6_MASK
|
||
|
#define TEST2_GPIO GPIOB
|
||
|
|
||
|
#if 0
|
||
|
#define I2C0_SCL_PIN_ID GPIO_PIN11
|
||
|
#define I2C0_SCL_PIN_MASK GPIO_PIN11_MASK
|
||
|
#define I2C0_SCL_GPIO GPIOA
|
||
|
|
||
|
#define I2C0_SDA_PIN_ID GPIO_PIN12
|
||
|
#define I2C0_SDA_PIN_MASK GPIO_PIN12_MASK
|
||
|
#define I2C0_SDA_GPIO GPIOA
|
||
|
|
||
|
#define LIN_TX_PIN_ID GPIO_PIN1
|
||
|
#define LIN_TX_PIN_MASK GPIO_PIN1_MASK
|
||
|
#define LIN_TX_GPIO GPIOD
|
||
|
|
||
|
#define LIN_RX_PIN_ID GPIO_PIN0
|
||
|
#define LIN_RX_PIN_MASK GPIO_PIN0_MASK
|
||
|
#define LIN_RX_GPIO GPIOD
|
||
|
|
||
|
#define LIN_SLP_PIN_ID GPIO_PIN4
|
||
|
#define LIN_SLP_PIN_MASK GPIO_PIN4_MASK
|
||
|
#define LIN_SLP_GPIO GPIOA
|
||
|
|
||
|
#endif
|
||
|
|
||
|
|
||
|
|
||
|
#define TEST2_ON() //FL_GPIO_SetOutputPin(TEST2_GPIO,TEST2_PIN_MASK)
|
||
|
#define TEST2_OFF() //FL_GPIO_ResetOutputPin(TEST2_GPIO,TEST2_PIN_MASK)
|
||
|
#define TEST2_TOGGLE() //FL_GPIO_ToggleOutputPin(TEST2_GPIO,TEST2_PIN_MASK);
|
||
|
|
||
|
#define TEST1_ON() //FL_GPIO_SetOutputPin(TEST1_GPIO,TEST1_PIN_MASK)
|
||
|
#define TEST1_OFF() //FL_GPIO_ResetOutputPin(TEST1_GPIO,TEST1_PIN_MASK)
|
||
|
#define TEST1_TOGGLE() //FL_GPIO_ToggleOutputPin(TEST1_GPIO,TEST1_PIN_MASK);
|
||
|
|
||
|
|
||
|
|
||
|
#define CAN0_STB_ON() FL_GPIO_ResetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK)
|
||
|
#define CAN0_STB_OFF() FL_GPIO_SetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK)
|
||
|
|
||
|
//#define CAN0_STB_INIT_VALUE GPIO_LEVEL_HIGH
|
||
|
//#define CAN0_STB_EN_VALUE GPIO_LEVEL_LOW
|
||
|
|
||
|
#define O_MDT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK)
|
||
|
#define O_MDT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK)
|
||
|
|
||
|
#define O_12V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK)
|
||
|
#define O_12V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK)
|
||
|
|
||
|
#define O_5V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK)
|
||
|
#define O_5V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK)
|
||
|
|
||
|
#define O_KIT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK)
|
||
|
#define O_KIT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK)
|
||
|
|
||
|
#define O_DEN_CTR_ENABLE() FL_GPIO_SetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK)
|
||
|
#define O_DEN_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK)
|
||
|
|
||
|
#define O_MDT_PWM_ENABLE() //FL_GPIO_SetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK)
|
||
|
#define O_MDT_PWM_DISABLE() //FL_GPIO_ResetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK)
|
||
|
|
||
|
#define GPIO_HEAT_IN_EN_INVALID 0u
|
||
|
#define GPIO_HEAT_IN_EN_VALID 1u
|
||
|
|
||
|
#if 0
|
||
|
//TJA1027
|
||
|
#define LIN_SLP_ENABLE() FL_GPIO_SetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK)
|
||
|
#define LIN_SLP_DISABLE() FL_GPIO_ResetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK)
|
||
|
|
||
|
#define LIN_SLP_INIT_VALUE GPIO_LEVEL_LOW
|
||
|
#define LIN_SLP_EN_VALUE GPIO_LEVEL_HIGH
|
||
|
#endif
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- T Y P E D E F I N I T I O N S
|
||
|
----------------------------------------------------------------------------*/
|
||
|
|
||
|
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- G L O B A L V A R I A B L E S
|
||
|
- only configuration table allowed here,variables are not allowed!
|
||
|
----------------------------------------------------------------------------*/
|
||
|
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- C O N S T A N T S
|
||
|
----------------------------------------------------------------------------*/
|
||
|
|
||
|
/*---------------------------------------------------------------------------
|
||
|
- F U N C T I O N P R O T O T Y P E
|
||
|
----------------------------------------------------------------------------*/
|
||
|
void gpio_cfg_init(void);
|
||
|
void gpio_goto_sleep(void);
|
||
|
void gpio_goto_wakeup(void);
|
||
|
void gpio_cfg_re_init(void);
|
||
|
|
||
|
|
||
|
|
||
|
|
||
|
void lpt32_ch1_set_gpio(void);
|
||
|
void lpt32_ch1_set_pwm(void);
|
||
|
void lpt32_ch2_set_gpio(void);
|
||
|
void lpt32_ch2_set_pwm(void);
|
||
|
|
||
|
|
||
|
#endif /* __CLK_CFG_H__ */
|