This commit is contained in:
sunbeam 2025-05-20 14:02:07 +08:00
parent 4f66758b3d
commit cb7fda4eb3
31 changed files with 5872 additions and 62 deletions

20
.vscode/c_cpp_properties.json vendored Normal file
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@ -0,0 +1,20 @@
{
"configurations": [
{
"name": "Win32",
"includePath": [
"${workspaceFolder}/**",
"D:\\Program Files\\IAR Systems\\Embedded Workbench 9.2\\arm\\inc\\c\\"
],
"defines": [
"_DEBUG",
"UNICODE",
"_UNICODE",
"USE_HAL_DRIVER",
"STM32L431xx",
"__ICCARM__"
]
}
],
"version": 4
}

14
.vscode/settings.json vendored Normal file
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@ -0,0 +1,14 @@
{
"commentTranslate.source": "naomi233.comment-translate-transmart-transmart",
"files.associations": {
"norflash.h": "c",
"uartapp.h": "c",
"stm32l4xx_hal.h": "c",
"stm32l4xx_hal_conf.h": "c",
"stdio.h": "c",
"cmsis_iccarm.h": "c",
"stm32l431xx.h": "c",
"core_cm4.h": "c",
"system_stm32l4xx.h": "c"
}
}

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@ -41,7 +41,7 @@
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
#define HAL_CRC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_DCMI_MODULE_ENABLED */
@ -68,7 +68,7 @@
/*#define HAL_PKA_MODULE_ENABLED */
/*#define HAL_QSPI_MODULE_ENABLED */
#define HAL_QSPI_MODULE_ENABLED
/*#define HAL_RNG_MODULE_ENABLED */
#define HAL_RNG_MODULE_ENABLED
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SAI_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */

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@ -21,7 +21,9 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "appTask.h"
#include "norflash.h"
#include "uartapp.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -40,8 +42,12 @@
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
CRC_HandleTypeDef hcrc;
QSPI_HandleTypeDef hqspi;
RNG_HandleTypeDef hrng;
UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_usart1_rx;
@ -55,6 +61,8 @@ static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
static void MX_QUADSPI_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_CRC_Init(void);
static void MX_RNG_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -88,15 +96,21 @@ int main(void)
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_USART1_UART_Init();
MX_CRC_Init();
MX_RNG_Init();
/* USER CODE BEGIN 2 */
uartapp_init();
MX_QUADSPI_Init();
NORFLASH_Init();
apptask_init();
/* USER CODE END 2 */
/* Infinite loop */
@ -104,7 +118,7 @@ int main(void)
while (1)
{
/* USER CODE END WHILE */
apptask_maintask();
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
@ -158,6 +172,37 @@ void SystemClock_Config(void)
}
}
/**
* @brief CRC Initialization Function
* @param None
* @retval None
*/
static void MX_CRC_Init(void)
{
/* USER CODE BEGIN CRC_Init 0 */
/* USER CODE END CRC_Init 0 */
/* USER CODE BEGIN CRC_Init 1 */
/* USER CODE END CRC_Init 1 */
hcrc.Instance = CRC;
hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_WORD;
hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_WORDS;
if (HAL_CRC_Init(&hcrc) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN CRC_Init 2 */
/* USER CODE END CRC_Init 2 */
}
/**
* @brief QUADSPI Initialization Function
* @param None
@ -193,6 +238,32 @@ static void MX_QUADSPI_Init(void)
}
/**
* @brief RNG Initialization Function
* @param None
* @retval None
*/
static void MX_RNG_Init(void)
{
/* USER CODE BEGIN RNG_Init 0 */
/* USER CODE END RNG_Init 0 */
/* USER CODE BEGIN RNG_Init 1 */
/* USER CODE END RNG_Init 1 */
hrng.Instance = RNG;
if (HAL_RNG_Init(&hrng) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN RNG_Init 2 */
/* USER CODE END RNG_Init 2 */
}
/**
* @brief USART1 Initialization Function
* @param None
@ -212,7 +283,7 @@ static void MX_USART1_UART_Init(void)
huart1.Init.BaudRate = 1000000;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_EVEN;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
@ -251,15 +322,33 @@ static void MX_DMA_Init(void)
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pin : PH3 */
GPIO_InitStruct.Pin = GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */

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@ -78,6 +78,51 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
/**
* @brief CRC MSP Initialization
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
if(hcrc->Instance==CRC)
{
/* USER CODE BEGIN CRC_MspInit 0 */
/* USER CODE END CRC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_CRC_CLK_ENABLE();
/* USER CODE BEGIN CRC_MspInit 1 */
/* USER CODE END CRC_MspInit 1 */
}
}
/**
* @brief CRC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
{
if(hcrc->Instance==CRC)
{
/* USER CODE BEGIN CRC_MspDeInit 0 */
/* USER CODE END CRC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_CRC_CLK_DISABLE();
/* USER CODE BEGIN CRC_MspDeInit 1 */
/* USER CODE END CRC_MspDeInit 1 */
}
}
/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example
@ -98,21 +143,21 @@ void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**QUADSPI GPIO Configuration
PA2 ------> QUADSPI_BK1_NCS
PA3 ------> QUADSPI_CLK
PA6 ------> QUADSPI_BK1_IO3
PA7 ------> QUADSPI_BK1_IO2
PB0 ------> QUADSPI_BK1_IO1
PB1 ------> QUADSPI_BK1_IO0
PB10 ------> QUADSPI_CLK
PB11 ------> QUADSPI_BK1_NCS
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -144,16 +189,16 @@ void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
__HAL_RCC_QSPI_CLK_DISABLE();
/**QUADSPI GPIO Configuration
PA2 ------> QUADSPI_BK1_NCS
PA3 ------> QUADSPI_CLK
PA6 ------> QUADSPI_BK1_IO3
PA7 ------> QUADSPI_BK1_IO2
PB0 ------> QUADSPI_BK1_IO1
PB1 ------> QUADSPI_BK1_IO0
PB10 ------> QUADSPI_CLK
PB11 ------> QUADSPI_BK1_NCS
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_11);
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
@ -162,6 +207,69 @@ void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
}
/**
* @brief RNG MSP Initialization
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hrng->Instance==RNG)
{
/* USER CODE BEGIN RNG_MspInit 0 */
/* USER CODE END RNG_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RNG;
PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_PLLSAI1;
PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
PeriphClkInit.PLLSAI1.PLLSAI1N = 10;
PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_RNG_CLK_ENABLE();
/* USER CODE BEGIN RNG_MspInit 1 */
/* USER CODE END RNG_MspInit 1 */
}
}
/**
* @brief RNG MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
{
if(hrng->Instance==RNG)
{
/* USER CODE BEGIN RNG_MspDeInit 0 */
/* USER CODE END RNG_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RNG_CLK_DISABLE();
/* USER CODE BEGIN RNG_MspDeInit 1 */
/* USER CODE END RNG_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
@ -220,6 +328,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
__HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
@ -252,6 +363,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USART1 DMA DeInit */
HAL_DMA_DeInit(huart->hdmarx);
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */

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@ -22,6 +22,7 @@
#include "stm32l4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "appTask.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -56,6 +57,7 @@
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_usart1_rx;
extern UART_HandleTypeDef huart1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@ -187,7 +189,7 @@ void SysTick_Handler(void)
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
appTask_TimebaseCallback();
/* USER CODE END SysTick_IRQn 1 */
}
@ -212,6 +214,20 @@ void DMA1_Channel5_IRQHandler(void)
/* USER CODE END DMA1_Channel5_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

395
Drivers/Norflash/norflash.c Normal file
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@ -0,0 +1,395 @@
#include "norflash.h"
#include "qspi.h"
#include "stdio.h"
u16 NORFLASH_TYPE = W25Q64; // 默认是W25Q128
u8 NORFLASH_QPI_MODE = 0; // QSPI模式标志:0,SPI模式;1,QPI模式.
extern QSPI_HandleTypeDef hqspi;
uint8_t mapModeFlag = 0;
// 4Kbytes为一个Sector
// 16个扇区为1个Block
// W25Q64
// 容量为8M字节,共有128个Block,2048个Sector
// 初始化SPI FLASH的IO口
void NORFLASH_Init(void)
{
u8 temp;
QSPI_Init(); // 初始化QSPI
NORFLASH_Qspi_Enable(); // 使能QSPI模式
NORFLASH_TYPE = NORFLASH_ReadID(); // 读取FLASH ID.
printf("nor flash id:%x\r\n", NORFLASH_TYPE);
if (NORFLASH_TYPE == W25Q64) // SPI W25Q128
{
// if not send data here, the comming write-data command will loss the first four bytes
NORFLASH_Write_Enable(); // 写使能
QSPI_Send_CMD(W25X_SetReadParam, 0, (3 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,设置读参数指令,地址为0,4线传数据_8位地址_无地址_4线传输指令,无空周期,1个字节数据
temp = 3 << 4; // 设置P4&P5=11,8个dummy clocks,104M
QSPI_Transmit(&temp, 1); // 发送1个字节
}
// if not use memery map mode, commment the following code;
// MemroyMap 模式设置
#if 0
NORFLASH_MemroyMapMode();
#endif
}
void NORFLASH_MemroyMapMode(void)
{
uint32_t tempreg;
while (QUADSPI->SR & (1 << 5))
; // 等待BUSY位清零
QUADSPI->ABR = 0; // 交替字节设置为0实际上就是W25Q 0XEB指令的,M0~M7=0
tempreg = 0XEB; // INSTRUCTION[7:0]=0XEB,发送0XEB指令Fast Read QUAD I/O
tempreg |= 3 << 8; // IMODE[1:0]=3,四线传输指令
tempreg |= 3 << 10; // ADDRESS[1:0]=3,四线传输地址
tempreg |= 2 << 12; // ADSIZE[1:0]=2,24位地址长度
tempreg |= 3 << 14; // ABMODE[1:0]=3,四线传输交替字节
tempreg |= 0 << 16; // ABSIZE[1:0]=0,8位交替字节(M0~M7)
tempreg |= 6 << 18; // DCYC[4:0]=6,6个dummy周期
tempreg |= 3 << 24; // DMODE[1:0]=3,四线传输数据
tempreg |= 3 << 26; // FMODE[1:0]=3,内存映射模式
QUADSPI->CCR = tempreg; // 设置CCR寄存器
mapModeFlag = 1;
}
void NORFLASH_QuitMemroyMapMode(void)
{
if (mapModeFlag == 1)
{
HAL_QSPI_DeInit(&hqspi);
HAL_Delay(2);
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
{
printf("qspi reset err\n");
}
else
{
mapModeFlag = 0;
NORFLASH_Init();
printf("quit map mode\n");
}
}
}
// W25QXX进入QSPI模式
void NORFLASH_Qspi_Enable(void)
{
u8 stareg2 = 0;
stareg2 = NORFLASH_ReadSR(2); // 先读出状态寄存器2的原始值
// printf("stareg2:%x\r\n",stareg2);
if ((stareg2 & 0X02) == 0) // QE位未使能
{
NORFLASH_Write_Enable(); // 写使能
stareg2 |= 1 << 1; // 使能QE位
NORFLASH_Write_SR(2, stareg2); // 写状态寄存器2
}
QSPI_Send_CMD(W25X_EnterQPIMode, 0, (0 << 6) | (0 << 4) | (0 << 2) | (1 << 0), 0); // 写command指令,地址为0,无数据_8位地址_无地址_单线传输指令,无空周期,0个字节数据
NORFLASH_QPI_MODE = 1; // 标记QSPI模式
}
// W25QXX退出QSPI模式
void NORFLASH_Qspi_Disable(void)
{
QSPI_Send_CMD(W25X_ExitQPIMode, 0, (0 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // 写command指令,地址为0,无数据_8位地址_无地址_4线传输指令,无空周期,0个字节数据
NORFLASH_QPI_MODE = 0; // 标记SPI模式
}
// 读取W25QXX的状态寄存器W25QXX一共有3个状态寄存器
// 状态寄存器1
// BIT7 6 5 4 3 2 1 0
// SPR RV TB BP2 BP1 BP0 WEL BUSY
// SPR:默认0,状态寄存器保护位,配合WP使用
// TB,BP2,BP1,BP0:FLASH区域写保护设置
// WEL:写使能锁定
// BUSY:忙标记位(1,忙;0,空闲)
// 默认:0x00
// 状态寄存器2
// BIT7 6 5 4 3 2 1 0
// SUS CMP LB3 LB2 LB1 (R) QE SRP1
// 状态寄存器3
// BIT7 6 5 4 3 2 1 0
// HOLD/RST DRV1 DRV0 (R) (R) WPS ADP ADS
// regno:状态寄存器号,范:1~3
// 返回值:状态寄存器值
u8 NORFLASH_ReadSR(u8 regno)
{
u8 byte = 0, command = 0;
switch (regno)
{
case 1:
command = W25X_ReadStatusReg1; // 读状态寄存器1指令
break;
case 2:
command = W25X_ReadStatusReg2; // 读状态寄存器2指令
break;
case 3:
command = W25X_ReadStatusReg3; // 读状态寄存器3指令
break;
default:
command = W25X_ReadStatusReg1;
break;
}
if (NORFLASH_QPI_MODE)
QSPI_Send_CMD(command, 0, (3 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,写command指令,地址为0,4线传数据_8位地址_无地址_4线传输指令,无空周期,1个字节数据
else
QSPI_Send_CMD(command, 0, (1 << 6) | (0 << 4) | (0 << 2) | (1 << 0), 0); // SPI,写command指令,地址为0,单线传数据_8位地址_无地址_单线传输指令,无空周期,1个字节数据
QSPI_Receive(&byte, 1);
return byte;
}
// 写W25QXX状态寄存器
void NORFLASH_Write_SR(u8 regno, u8 sr)
{
u8 command = 0;
switch (regno)
{
case 1:
command = W25X_WriteStatusReg1; // 写状态寄存器1指令
break;
case 2:
command = W25X_WriteStatusReg2; // 写状态寄存器2指令
break;
case 3:
command = W25X_WriteStatusReg3; // 写状态寄存器3指令
break;
default:
command = W25X_WriteStatusReg1;
break;
}
if (NORFLASH_QPI_MODE)
QSPI_Send_CMD(command, 0, (3 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,写command指令,地址为0,4线传数据_8位地址_无地址_4线传输指令,无空周期,1个字节数据
else
QSPI_Send_CMD(command, 0, (1 << 6) | (0 << 4) | (0 << 2) | (1 << 0), 0); // SPI,写command指令,地址为0,单线传数据_8位地址_无地址_单线传输指令,无空周期,1个字节数据
QSPI_Transmit(&sr, 1);
}
// W25QXX写使能
// 将S1寄存器的WEL置位
void NORFLASH_Write_Enable(void)
{
if (NORFLASH_QPI_MODE)
QSPI_Send_CMD(W25X_WriteEnable, 0, (0 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,写使能指令,地址为0,无数据_8位地址_无地址_4线传输指令,无空周期,0个字节数据
else
QSPI_Send_CMD(W25X_WriteEnable, 0, (0 << 6) | (0 << 4) | (0 << 2) | (1 << 0), 0); // SPI,写使能指令,地址为0,无数据_8位地址_无地址_单线传输指令,无空周期,0个字节数据
}
// W25QXX写禁止
// 将WEL清零
void NORFLASH_Write_Disable(void)
{
if (NORFLASH_QPI_MODE)
QSPI_Send_CMD(W25X_WriteDisable, 0, (0 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,写禁止指令,地址为0,无数据_8位地址_无地址_4线传输指令,无空周期,0个字节数据
else
QSPI_Send_CMD(W25X_WriteDisable, 0, (0 << 6) | (0 << 4) | (0 << 2) | (1 << 0), 0); // SPI,写禁止指令,地址为0,无数据_8位地址_无地址_单线传输指令,无空周期,0个字节数据
}
// 返回值如下:
// 0XEF13,表示芯片型号为W25Q80
// 0XEF14,表示芯片型号为W25Q16
// 0XEF15,表示芯片型号为W25Q32
// 0XEF16,表示芯片型号为W25Q64
// 0XEF17,表示芯片型号为W25Q128
// 0XEF18,表示芯片型号为W25Q256
u16 NORFLASH_ReadID(void)
{
u8 temp[2];
u16 deviceid;
if (NORFLASH_QPI_MODE)
QSPI_Send_CMD(W25X_ManufactDeviceID, 0, (3 << 6) | (2 << 4) | (3 << 2) | (3 << 0), 0); // QPI,读id,地址为0,4线传输数据_24位地址_4线传输地址_4线传输指令,无空周期,2个字节数据
else
QSPI_Send_CMD(W25X_ManufactDeviceID, 0, (1 << 6) | (2 << 4) | (1 << 2) | (1 << 0), 0); // SPI,读id,地址为0,单线传输数据_24位地址_单线传输地址_单线传输指令,无空周期,2个字节数据
QSPI_Receive(temp, 2);
deviceid = (temp[0] << 8) | temp[1];
return deviceid;
}
// 读取SPI FLASH,仅支持QPI模式
// 在指定地址开始读取指定长度的数据
// pBuffer:数据存储区
// ReadAddr:开始读取的地址(最大32bit)
// NumByteToRead:要读取的字节数(最大65535)
void NORFLASH_Read(u8 *pBuffer, u32 ReadAddr, u16 NumByteToRead)
{
QSPI_Send_CMD(W25X_FastReadData, ReadAddr, (3 << 6) | (2 << 4) | (3 << 2) | (3 << 0), 8); // QPI,快速读数据,地址为ReadAddr,4线传输数据_24位地址_4线传输地址_4线传输指令,8空周期,NumByteToRead个数据
QSPI_Receive(pBuffer, NumByteToRead);
}
// SPI在一页(0~65535)内写入少于256个字节的数据
// 在指定地址开始写入最大256字节的数据
// pBuffer:数据存储区
// WriteAddr:开始写入的地址(最大32bit)
// NumByteToWrite:要写入的字节数(最大256),该数不应该超过该页的剩余字节数!!!
void NORFLASH_Write_Page(u8 *pBuffer, u32 WriteAddr, u16 NumByteToWrite)
{
NORFLASH_Write_Enable(); // 写使能
QSPI_Send_CMD(W25X_PageProgram, WriteAddr, (3 << 6) | (2 << 4) | (3 << 2) | (3 << 0), 0); // QPI,页写指令,地址为WriteAddr,4线传输数据_24位地址_4线传输地址_4线传输指令,无空周期,NumByteToWrite个数据
QSPI_Transmit(pBuffer, NumByteToWrite);
NORFLASH_Wait_Busy(); // 等待写入结束
}
// 无检验写SPI FLASH
// 必须确保所写的地址范围内的数据全部为0XFF,否则在非0XFF处写入的数据将失败!
// 具有自动换页功能
// 在指定地址开始写入指定长度的数据,但是要确保地址不越界!
// pBuffer:数据存储区
// WriteAddr:开始写入的地址(最大32bit)
// NumByteToWrite:要写入的字节数(最大65535)
// CHECK OK
void NORFLASH_Write_NoCheck(u8 *pBuffer, u32 WriteAddr, u16 NumByteToWrite)
{
u16 pageremain;
pageremain = 256 - WriteAddr % 256; // 单页剩余的字节数
if (NumByteToWrite <= pageremain)
pageremain = NumByteToWrite; // 不大于256个字节
while (1)
{
NORFLASH_Write_Page(pBuffer, WriteAddr, pageremain);
if (NumByteToWrite == pageremain)
break; // 写入结束了
else // NumByteToWrite>pageremain
{
pBuffer += pageremain;
WriteAddr += pageremain;
NumByteToWrite -= pageremain; // 减去已经写入了的字节数
if (NumByteToWrite > 256)
pageremain = 256; // 一次可以写入256个字节
else
pageremain = NumByteToWrite; // 不够256个字节了
}
}
}
// 写SPI FLASH
// 在指定地址开始写入指定长度的数据
// 该函数带擦除操作!
// pBuffer:数据存储区
// WriteAddr:开始写入的地址(最大32bit)
// NumByteToWrite:要写入的字节数(最大65535)
u8 NORFLASH_BUFFER[4096];
void NORFLASH_Write(u8 *pBuffer, u32 WriteAddr, u16 NumByteToWrite)
{
u32 secpos;
u16 secoff;
u16 secremain;
u16 i;
u8 *NORFLASH_BUF;
NORFLASH_BUF = NORFLASH_BUFFER;
secpos = WriteAddr / 4096; // 扇区地址
secoff = WriteAddr % 4096; // 在扇区内的偏移
secremain = 4096 - secoff; // 扇区剩余空间大小
// printf("ad:%X,nb:%X\r\n",WriteAddr,NumByteToWrite);//测试用
if (NumByteToWrite <= secremain)
secremain = NumByteToWrite; // 不大于4096个字节
while (1)
{
NORFLASH_Read(NORFLASH_BUF, secpos * 4096, 4096); // 读出整个扇区的内容
for (i = 0; i < secremain; i++) // 校验数据
{
if (NORFLASH_BUF[secoff + i] != 0XFF)
break; // 需要擦除
}
if (i < secremain) // 需要擦除
{
NORFLASH_Erase_Sector(secpos); // 擦除这个扇区
for (i = 0; i < secremain; i++) // 复制
{
NORFLASH_BUF[i + secoff] = pBuffer[i];
}
NORFLASH_Write_NoCheck(NORFLASH_BUF, secpos * 4096, 4096); // 写入整个扇区
}
else
NORFLASH_Write_NoCheck(pBuffer, WriteAddr, secremain); // 写已经擦除了的,直接写入扇区剩余区间.
if (NumByteToWrite == secremain)
break; // 写入结束了
else // 写入未结束
{
secpos++; // 扇区地址增1
secoff = 0; // 偏移位置为0
pBuffer += secremain; // 指针偏移
WriteAddr += secremain; // 写地址偏移
NumByteToWrite -= secremain; // 字节数递减
if (NumByteToWrite > 4096)
secremain = 4096; // 下一个扇区还是写不完
else
secremain = NumByteToWrite; // 下一个扇区可以写完了
}
};
}
// 擦除整个芯片
// 等待时间超长...
void NORFLASH_Erase_Chip(void)
{
NORFLASH_Write_Enable(); // SET WEL
NORFLASH_Wait_Busy();
QSPI_Send_CMD(W25X_ChipErase, 0, (0 << 6) | (0 << 4) | (0 << 2) | (3 << 0), 0); // QPI,写全片擦除指令,地址为0,无数据_8位地址_无地址_4线传输指令,无空周期,0个字节数据
// NORFLASH_Wait_Busy(); // 等待芯片擦除结束
}
// 擦除一个扇区
// Dst_Addr:扇区地址 根据实际容量设置
// 擦除一个扇区的最少时间:150ms
void NORFLASH_Erase_Sector(u32 Dst_Addr)
{
// printf("fe:%x\r\n",Dst_Addr); //监视falsh擦除情况,测试用
Dst_Addr *= 4096;
NORFLASH_Write_Enable(); // SET WEL
NORFLASH_Wait_Busy();
QSPI_Send_CMD(W25X_SectorErase, Dst_Addr, (0 << 6) | (2 << 4) | (3 << 2) | (3 << 0), 0); // QPI,写扇区擦除指令,地址为0,无数据_24位地址_4线传输地址_4线传输指令,无空周期,0个字节数据
NORFLASH_Wait_Busy(); // 等待擦除完成
}
// 等待空闲
void NORFLASH_Wait_Busy(void)
{
while ((NORFLASH_ReadSR(1) & 0x01) == 0x01)
; // 等待BUSY位清空
}
uint8_t NORFLASH_Check_Busy(void)
{
return ((NORFLASH_ReadSR(1) & 0x01) == 0x01);
}
// static uint8_t isReceivingData=0;
// void DataReader_WaitForReceiveDone(void)
//{
// while(isReceivingData);
// }
// void DataReader_ReadData(uint32_t address24, uint8_t* buffer, uint32_t length)
//{
// uint8_t * qspi_addr=(uint8_t *)address24;
// isReceivingData=1;
// for(int i=0;i<length;i++)
// buffer[i]=qspi_addr[i];
// isReceivingData=0;
// }
// void DataReader_StartDMAReadData(uint32_t address24, uint8_t* buffer, uint32_t length)
//{
// isReceivingData=0;
// }
uint32_t *aspi_addr = (uint32_t *)(EX_FLASH_START_ADDR);
void norflash_test(void)
{
if (mapModeFlag == 0)
{
printf("not map mode\r\n");
return;
}
printf("\r\ndata read from norflash:\r\n");
for (int i = 0; i < 256; i++)
{
printf("%x\t", *(aspi_addr++));
}
printf("\r\n");
}

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#ifndef __NORFLASH_H
#define __NORFLASH_H
#ifdef __cplusplus
extern "C"{
#endif // __cplusplus
#include "sys.h"
//W25X系列/Q系列芯片列表
//W25Q80 ID 0XEF13
//W25Q16 ID 0XEF14
//W25Q32 ID 0XEF15
//W25Q64 ID 0XEF16
//W25Q128 ID 0XEF17
//W25Q256 ID 0XEF18
#define W25Q80 0XEF13
#define W25Q16 0XEF14
#define W25Q32 0XEF15
#define W25Q64 0XEF16
#define W25Q128 0XEF17
#define W25Q256 0XEF18
#define EX_FLASH_START_ADDR 0x90000000
#define EX_FLASH_SIZE 0x00800000
#define EX_FLASH_END_ADDR (EX_FLASH_START_ADDR+EX_FLASH_SIZE)
extern u16 NORFLASH_TYPE; //定义W25QXX芯片型号
//////////////////////////////////////////////////////////////////////////////////
//指令表
#define W25X_WriteEnable 0x06
#define W25X_WriteDisable 0x04
#define W25X_ReadStatusReg1 0x05
#define W25X_ReadStatusReg2 0x35
#define W25X_ReadStatusReg3 0x15
#define W25X_WriteStatusReg1 0x01
#define W25X_WriteStatusReg2 0x31
#define W25X_WriteStatusReg3 0x11
#define W25X_ReadData 0x03
#define W25X_FastReadData 0x0B
#define W25X_FastReadDual 0x3B
#define W25X_PageProgram 0x02
#define W25X_BlockErase 0xD8
#define W25X_SectorErase 0x20
#define W25X_ChipErase 0xC7
#define W25X_PowerDown 0xB9
#define W25X_ReleasePowerDown 0xAB
#define W25X_DeviceID 0xAB
#define W25X_ManufactDeviceID 0x90
#define W25X_JedecDeviceID 0x9F
#define W25X_Enable4ByteAddr 0xB7
#define W25X_Exit4ByteAddr 0xE9
#define W25X_SetReadParam 0xC0
#define W25X_EnterQPIMode 0x38
#define W25X_ExitQPIMode 0xFF
void NORFLASH_Init(void); //初始化W25QXX
void NORFLASH_Qspi_Enable(void); //使能QSPI模式
void NORFLASH_Qspi_Disable(void); //关闭QSPI模式
u16 NORFLASH_ReadID(void); //读取FLASH ID
u8 NORFLASH_ReadSR(u8 regno); //读取状态寄存器
void NORFLASH_Write_SR(u8 regno,u8 sr); //写状态寄存器
void NORFLASH_Write_Enable(void); //写使能
void NORFLASH_Write_Disable(void); //写保护
void NORFLASH_Write_NoCheck(u8* pBuffer,u32 WriteAddr,u16 NumByteToWrite); //写flash,不校验
void NORFLASH_Read(u8* pBuffer,u32 ReadAddr,u16 NumByteToRead); //读取flash
void NORFLASH_Write(u8* pBuffer,u32 WriteAddr,u16 NumByteToWrite); //写入flash
void NORFLASH_Erase_Chip(void); //整片擦除
void NORFLASH_Erase_Sector(u32 Dst_Addr); //扇区擦除
void NORFLASH_Wait_Busy(void); //等待空闲
//void DataReader_WaitForReceiveDone(void);
//void DataReader_ReadData(uint32_t address24, uint8_t* buffer, uint32_t length);
//void DataReader_StartDMAReadData(uint32_t address24, uint8_t* buffer, uint32_t length);
//void DataReader_StartDMAReadData(uint32_t address24, uint8_t* buffer, uint32_t length);
void NORFLASH_MemroyMapMode(void);
void NORFLASH_QuitMemroyMapMode(void);
void norflash_test(void);
uint8_t NORFLASH_Check_Busy(void);
#ifdef __cplusplus
}
#endif // __cplusplus
#endif

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#include "qspi.h"
//等待状态标志
//flag:需要等待的标志位
//sta:需要等待的状态
//wtime:等待时间
//返回值:0,等待成功.
// 1,等待失败.
u8 QSPI_Wait_Flag(u32 flag,u8 sta,u32 wtime)
{
u8 flagsta=0;
while(wtime)
{
flagsta=(QUADSPI->SR&flag)?1:0;
if(flagsta==sta)break;
wtime--;
}
if(wtime)return 0;
else return 1;
}
//初始化QSPI接口
//返回值:0,成功;
// 1,失败;
void QSPI_Init(void)
{
}
//QSPI发送命令
//cmd:要发送的指令
//addr:发送到的目的地址
//mode:模式,详细位定义如下:
// mode[1:0]:指令模式;00,无指令;01,单线传输指令;10,双线传输指令;11,四线传输指令.
// mode[3:2]:地址模式;00,无地址;01,单线传输地址;10,双线传输地址;11,四线传输地址.
// mode[5:4]:地址长度;00,8位地址;01,16位地址;10,24位地址;11,32位地址.
// mode[7:6]:数据模式;00,无数据;01,单线传输数据;10,双线传输数据;11,四线传输数据.
//dmcycle:空指令周期数
void QSPI_Send_CMD(u8 cmd,u32 addr,u8 mode,u8 dmcycle)
{
u32 tempreg=0;
u8 status;
if(QSPI_Wait_Flag(1<<5,0,0XFFFF)==0) //等待BUSY空闲
{
tempreg=0<<31; //禁止DDR模式
tempreg|=0<<28; //每次都发送指令
tempreg|=0<<26; //间接写模式
tempreg|=((u32)mode>>6)<<24; //设置数据模式
tempreg|=(u32)dmcycle<<18; //设置空指令周期数
tempreg|=((u32)(mode>>4)&0X03)<<12; //设置地址长度
tempreg|=((u32)(mode>>2)&0X03)<<10; //设置地址模式
tempreg|=((u32)(mode>>0)&0X03)<<8; //设置指令模式
tempreg|=cmd; //设置指令
QUADSPI->CCR=tempreg; //设置CCR寄存器
if(mode&0X0C) //有指令+地址要发送
{
QUADSPI->AR=addr; //设置地址寄存器
}
if((mode&0XC0)==0) //无数据传输,等待指令发送完成
{
status=QSPI_Wait_Flag(1<<1,1,0XFFFF);//等待TCF,即传输完成
if(status==0)
{
QUADSPI->FCR|=1<<1; //清除TCF标志位
}
}
}
}
//QSPI接收指定长度的数据
//buf:接收数据缓冲区首地址
//datalen:要传输的数据长度
//返回值:0,正常
// 其他,错误代码
u8 QSPI_Receive(u8* buf,u32 datalen)
{
u32 tempreg=QUADSPI->CCR;
u32 addrreg=QUADSPI->AR;
u8 status;
vu32 *data_reg=&QUADSPI->DR;
QUADSPI->DLR=datalen-1; //设置数据传输长度
tempreg&=~(3<<26); //清除FMODE原来的设置
tempreg|=1<<26; //设置FMODE为间接读取模式
QUADSPI->FCR|=1<<1; //清除TCF标志位
QUADSPI->CCR=tempreg; //回写CCR寄存器
QUADSPI->AR=addrreg; //回写AR寄存器,触发传输
while(datalen)
{
status=QSPI_Wait_Flag(3<<1,1,0XFFFF);//等到FTF和TCF,即接收到了数据
if(status==0) //等待成功
{
*buf++=*(vu8 *)data_reg;
datalen--;
}else break;
}
if(status==0)
{
QUADSPI->CR|=1<<2; //终止传输
status=QSPI_Wait_Flag(1<<1,1,0XFFFF); //等待TCF,即数据传输完成
if(status==0)
{
QUADSPI->FCR|=1<<1; //清除TCF标志位
status=QSPI_Wait_Flag(1<<5,0,0XFFFF); //等待BUSY位清零
}
}
return status;
}
//QSPI发送指定长度的数据
//buf:发送数据缓冲区首地址
//datalen:要传输的数据长度
//返回值:0,正常
// 其他,错误代码
u8 QSPI_Transmit(u8* buf,u32 datalen)
{
u32 tempreg=QUADSPI->CCR;
u32 addrreg=QUADSPI->AR;
u8 status;
vu32 *data_reg=&QUADSPI->DR;
QUADSPI->DLR=datalen-1; //设置数据传输长度
tempreg&=~(3<<26); //清除FMODE原来的设置
tempreg|=0<<26; //设置FMODE为间接写入模式
QUADSPI->FCR|=1<<1; //清除TCF标志位
QUADSPI->CCR=tempreg; //回写CCR寄存器
while(datalen)
{
status=QSPI_Wait_Flag(1<<2,1,0XFFFF);//等到FTF
if(status!=0) //等待成功
{
break;
}
*(vu8 *)data_reg=*buf++;
datalen--;
}
if(status==0)
{
QUADSPI->CR|=1<<2; //终止传输
status=QSPI_Wait_Flag(1<<1,1,0XFFFF); //等待TCF,即数据传输完成
if(status==0)
{
QUADSPI->FCR|=1<<1; //清除TCF标志位
status=QSPI_Wait_Flag(1<<5,0,0XFFFF); //等待BUSY位清零
}
}
return status;
}

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#ifndef __QSPI_H
#define __QSPI_H
#include "sys.h"
u8 QSPI_Wait_Flag(u32 flag,u8 sta,u32 wtime); //QSPI等待某个状态
void QSPI_Init(void); //初始化QSPI
void QSPI_Send_CMD(u8 cmd,u32 addr,u8 mode,u8 dmcycle); //QSPI发送命令
u8 QSPI_Receive(u8* buf,u32 datalen); //QSPI接收数据
u8 QSPI_Transmit(u8* buf,u32 datalen); //QSPI发送数据
#endif

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#ifndef __SYS_H
#define __SYS_H
//#include "stm32l4xx.h"
#include "stm32l4xx_hal.h"
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
typedef volatile uint32_t vu32;
typedef volatile uint16_t vu16;
typedef volatile uint8_t vu8;
#endif

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/**
******************************************************************************
* @file stm32l4xx_hal_crc.h
* @author MCD Application Team
* @brief Header file of CRC HAL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_CRC_H
#define STM32L4xx_HAL_CRC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @addtogroup CRC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup CRC_Exported_Types CRC Exported Types
* @{
*/
/**
* @brief CRC HAL State Structure definition
*/
typedef enum
{
HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
} HAL_CRC_StateTypeDef;
/**
* @brief CRC Init Structure definition
*/
typedef struct
{
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 +
X^4 + X^2+ X +1.
In that case, there is no need to set GeneratingPolynomial field.
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and
CRCLength fields must be set. */
uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
0xFFFFFFFF value. In that case, there is no need to set InitValue field. If
otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree
respectively equal to 7, 8, 16 or 32. This field is written in normal,
representation e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1
is written 0x65. No need to specify it if DefaultPolynomialUse is set to
DEFAULT_POLYNOMIAL_ENABLE. */
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
Value can be either one of
@arg @ref CRC_POLYLENGTH_32B (32-bit CRC),
@arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
@arg @ref CRC_POLYLENGTH_8B (8-bit CRC),
@arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
is set to DEFAULT_INIT_VALUE_ENABLE. */
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
Can be either one of the following values
@arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion
@arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D
becomes 0x58D43CB2
@arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion,
0x1A2B3C4D becomes 0xD458B23C
@arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D
becomes 0xB23CD458 */
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
Can be either
@arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
@arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted
into 0x22CC4488 */
} CRC_InitTypeDef;
/**
* @brief CRC Handle Structure definition
*/
typedef struct
{
CRC_TypeDef *Instance; /*!< Register base address */
CRC_InitTypeDef Init; /*!< CRC configuration parameters */
HAL_LockTypeDef Lock; /*!< CRC Locking object */
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
Can be either
@arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes
(8-bit data)
@arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of
half-words (16-bit data)
@arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words
(32-bit data)
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization
error must occur if InputBufferFormat is not one of the three values listed
above */
} CRC_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CRC_Exported_Constants CRC Exported Constants
* @{
*/
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
* @{
*/
#define DEFAULT_CRC32_POLY 0x04C11DB7U /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */
/**
* @}
*/
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
* @{
*/
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */
/**
* @}
*/
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
* @{
*/
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7 */
/**
* @}
*/
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
* @{
*/
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */
/**
* @}
*/
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the peripheral
* @{
*/
#define CRC_POLYLENGTH_32B 0x00000000U /*!< Resort to a 32-bit long generating polynomial */
#define CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< Resort to a 16-bit long generating polynomial */
#define CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< Resort to a 8-bit long generating polynomial */
#define CRC_POLYLENGTH_7B CRC_CR_POLYSIZE /*!< Resort to a 7-bit long generating polynomial */
/**
* @}
*/
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
* @{
*/
#define HAL_CRC_LENGTH_32B 32U /*!< 32-bit long CRC */
#define HAL_CRC_LENGTH_16B 16U /*!< 16-bit long CRC */
#define HAL_CRC_LENGTH_8B 8U /*!< 8-bit long CRC */
#define HAL_CRC_LENGTH_7B 7U /*!< 7-bit long CRC */
/**
* @}
*/
/** @defgroup CRC_Input_Buffer_Format Input Buffer Format
* @{
*/
/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
* the CRC APIs to provide a correct result */
#define CRC_INPUTDATA_FORMAT_UNDEFINED 0x00000000U /*!< Undefined input data format */
#define CRC_INPUTDATA_FORMAT_BYTES 0x00000001U /*!< Input data in byte format */
#define CRC_INPUTDATA_FORMAT_HALFWORDS 0x00000002U /*!< Input data in half-word format */
#define CRC_INPUTDATA_FORMAT_WORDS 0x00000003U /*!< Input data in word format */
/**
* @}
*/
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup CRC_Exported_Macros CRC Exported Macros
* @{
*/
/** @brief Reset CRC handle state.
* @param __HANDLE__ CRC handle.
* @retval None
*/
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
/**
* @brief Reset CRC Data Register.
* @param __HANDLE__ CRC handle
* @retval None
*/
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
/**
* @brief Set CRC INIT non-default value
* @param __HANDLE__ CRC handle
* @param __INIT__ 32-bit initial value
* @retval None
*/
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
/**
* @brief Store data in the Independent Data (ID) register.
* @param __HANDLE__ CRC handle
* @param __VALUE__ Value to be stored in the ID register
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
* @retval None
*/
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
/**
* @brief Return the data stored in the Independent Data (ID) register.
* @param __HANDLE__ CRC handle
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
* @retval Value of the ID register
*/
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
/**
* @}
*/
/* Private macros --------------------------------------------------------*/
/** @defgroup CRC_Private_Macros CRC Private Macros
* @{
*/
#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
#define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
#define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \
((LENGTH) == CRC_POLYLENGTH_16B) || \
((LENGTH) == CRC_POLYLENGTH_8B) || \
((LENGTH) == CRC_POLYLENGTH_7B))
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
/**
* @}
*/
/* Include CRC HAL Extended module */
#include "stm32l4xx_hal_crc_ex.h"
/* Exported functions --------------------------------------------------------*/
/** @defgroup CRC_Exported_Functions CRC Exported Functions
* @{
*/
/* Initialization and de-initialization functions ****************************/
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
/**
* @}
*/
/* Peripheral Control functions ***********************************************/
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
* @{
*/
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
/**
* @}
*/
/* Peripheral State and Error functions ***************************************/
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @{
*/
HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_HAL_CRC_H */

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/**
******************************************************************************
* @file stm32l4xx_hal_crc_ex.h
* @author MCD Application Team
* @brief Header file of CRC HAL extended module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_CRC_EX_H
#define STM32L4xx_HAL_CRC_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @addtogroup CRCEx
* @{
*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants
* @{
*/
/** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes
* @{
*/
#define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */
#define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */
#define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */
#define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */
/**
* @}
*/
/** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes
* @{
*/
#define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */
#define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros
* @{
*/
/**
* @brief Set CRC output reversal
* @param __HANDLE__ CRC handle
* @retval None
*/
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
/**
* @brief Unset CRC output reversal
* @param __HANDLE__ CRC handle
* @retval None
*/
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
/**
* @brief Set CRC non-default polynomial
* @param __HANDLE__ CRC handle
* @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial
* @retval None
*/
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
/**
* @}
*/
/* Private macros --------------------------------------------------------*/
/** @defgroup CRCEx_Private_Macros CRC Extended Private Macros
* @{
*/
#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
((MODE) == CRC_INPUTDATA_INVERSION_WORD))
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup CRCEx_Exported_Functions
* @{
*/
/** @addtogroup CRCEx_Exported_Functions_Group1
* @{
*/
/* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_HAL_CRC_EX_H */

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/**
******************************************************************************
* @file stm32l4xx_hal_rng.h
* @author MCD Application Team
* @brief Header file of RNG HAL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_RNG_H
#define STM32L4xx_HAL_RNG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
#if defined (RNG)
/** @defgroup RNG RNG
* @brief RNG HAL module driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup RNG_Exported_Types RNG Exported Types
* @{
*/
/** @defgroup RNG_Exported_Types_Group1 RNG Init Structure definition
* @{
*/
#if defined(RNG_CR_CED)
typedef struct
{
uint32_t ClockErrorDetection; /*!< CED Clock error detection */
} RNG_InitTypeDef;
#endif /* RNG_CR_CED */
/**
* @}
*/
/** @defgroup RNG_Exported_Types_Group2 RNG State Structure definition
* @{
*/
typedef enum
{
HAL_RNG_STATE_RESET = 0x00U, /*!< RNG not yet initialized or disabled */
HAL_RNG_STATE_READY = 0x01U, /*!< RNG initialized and ready for use */
HAL_RNG_STATE_BUSY = 0x02U, /*!< RNG internal process is ongoing */
HAL_RNG_STATE_TIMEOUT = 0x03U, /*!< RNG timeout state */
HAL_RNG_STATE_ERROR = 0x04U /*!< RNG error state */
} HAL_RNG_StateTypeDef;
/**
* @}
*/
/** @defgroup RNG_Exported_Types_Group3 RNG Handle Structure definition
* @{
*/
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
typedef struct __RNG_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
{
RNG_TypeDef *Instance; /*!< Register base address */
#if defined(RNG_CR_CED)
RNG_InitTypeDef Init; /*!< RNG configuration parameters */
#endif /* RNG_CR_CED */
HAL_LockTypeDef Lock; /*!< RNG locking object */
__IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */
__IO uint32_t ErrorCode; /*!< RNG Error code */
uint32_t RandomNumber; /*!< Last Generated RNG Data */
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
void (* ReadyDataCallback)(struct __RNG_HandleTypeDef *hrng, uint32_t random32bit); /*!< RNG Data Ready Callback */
void (* ErrorCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Error Callback */
void (* MspInitCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Msp Init callback */
void (* MspDeInitCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Msp DeInit callback */
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
} RNG_HandleTypeDef;
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
/**
* @brief HAL RNG Callback ID enumeration definition
*/
typedef enum
{
HAL_RNG_ERROR_CB_ID = 0x00U, /*!< RNG Error Callback ID */
HAL_RNG_MSPINIT_CB_ID = 0x01U, /*!< RNG MspInit callback ID */
HAL_RNG_MSPDEINIT_CB_ID = 0x02U /*!< RNG MspDeInit callback ID */
} HAL_RNG_CallbackIDTypeDef;
/**
* @brief HAL RNG Callback pointer definition
*/
typedef void (*pRNG_CallbackTypeDef)(RNG_HandleTypeDef *hrng); /*!< pointer to a common RNG callback function */
typedef void (*pRNG_ReadyDataCallbackTypeDef)(RNG_HandleTypeDef *hrng, uint32_t random32bit); /*!< pointer to an RNG Data Ready specific callback function */
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/**
* @}
*/
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup RNG_Exported_Constants RNG Exported Constants
* @{
*/
/** @defgroup RNG_Exported_Constants_Group1 RNG Interrupt definition
* @{
*/
#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */
#define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */
#define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */
/**
* @}
*/
/** @defgroup RNG_Exported_Constants_Group2 RNG Flag definition
* @{
*/
#define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */
#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */
#define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */
/**
* @}
*/
#if defined(RNG_CR_CED)
/** @defgroup RNG_Exported_Constants_Group3 RNG Clock Error Detection
* @{
*/
#define RNG_CED_ENABLE 0x00000000U /*!< Clock error detection Enabled */
#define RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection Disabled */
/**
* @}
*/
#endif /* RNG_CR_CED */
/** @defgroup RNG_Error_Definition RNG Error Definition
* @{
*/
#define HAL_RNG_ERROR_NONE 0x00000000U /*!< No error */
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
#define HAL_RNG_ERROR_INVALID_CALLBACK 0x00000001U /*!< Invalid Callback error */
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
#define HAL_RNG_ERROR_TIMEOUT 0x00000002U /*!< Timeout error */
#define HAL_RNG_ERROR_BUSY 0x00000004U /*!< Busy error */
#define HAL_RNG_ERROR_SEED 0x00000008U /*!< Seed error */
#define HAL_RNG_ERROR_CLOCK 0x00000010U /*!< Clock error */
/**
* @}
*/
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup RNG_Exported_Macros RNG Exported Macros
* @{
*/
/** @brief Reset RNG handle state
* @param __HANDLE__ RNG Handle
* @retval None
*/
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) do{ \
(__HANDLE__)->State = HAL_RNG_STATE_RESET; \
(__HANDLE__)->MspInitCallback = NULL; \
(__HANDLE__)->MspDeInitCallback = NULL; \
} while(0U)
#else
#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET)
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/**
* @brief Enables the RNG peripheral.
* @param __HANDLE__ RNG Handle
* @retval None
*/
#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN)
/**
* @brief Disables the RNG peripheral.
* @param __HANDLE__ RNG Handle
* @retval None
*/
#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN)
/**
* @brief Check the selected RNG flag status.
* @param __HANDLE__ RNG Handle
* @param __FLAG__ RNG flag
* This parameter can be one of the following values:
* @arg RNG_FLAG_DRDY: Data ready
* @arg RNG_FLAG_CECS: Clock error current status
* @arg RNG_FLAG_SECS: Seed error current status
* @retval The new state of __FLAG__ (SET or RESET).
*/
#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
/**
* @brief Clears the selected RNG flag status.
* @param __HANDLE__ RNG handle
* @param __FLAG__ RNG flag to clear
* @note WARNING: This is a dummy macro for HAL code alignment,
* flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only.
* @retval None
*/
#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */
/**
* @brief Enables the RNG interrupts.
* @param __HANDLE__ RNG Handle
* @retval None
*/
#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE)
/**
* @brief Disables the RNG interrupts.
* @param __HANDLE__ RNG Handle
* @retval None
*/
#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE)
/**
* @brief Checks whether the specified RNG interrupt has occurred or not.
* @param __HANDLE__ RNG Handle
* @param __INTERRUPT__ specifies the RNG interrupt status flag to check.
* This parameter can be one of the following values:
* @arg RNG_IT_DRDY: Data ready interrupt
* @arg RNG_IT_CEI: Clock error interrupt
* @arg RNG_IT_SEI: Seed error interrupt
* @retval The new state of __INTERRUPT__ (SET or RESET).
*/
#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))
/**
* @brief Clear the RNG interrupt status flags.
* @param __HANDLE__ RNG Handle
* @param __INTERRUPT__ specifies the RNG interrupt status flag to clear.
* This parameter can be one of the following values:
* @arg RNG_IT_CEI: Clock error interrupt
* @arg RNG_IT_SEI: Seed error interrupt
* @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY.
* @retval None
*/
#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__))
/**
* @}
*/
#if defined (RNG_CR_CONDRST)
/* Include RNG HAL Extended module */
#include "stm32l4xx_hal_rng_ex.h"
#endif /* RNG_CR_CONDRST */
/* Exported functions --------------------------------------------------------*/
/** @defgroup RNG_Exported_Functions RNG Exported Functions
* @{
*/
/** @defgroup RNG_Exported_Functions_Group1 Initialization and configuration functions
* @{
*/
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng);
HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng);
void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng);
void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID,
pRNG_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_RNG_RegisterReadyDataCallback(RNG_HandleTypeDef *hrng, pRNG_ReadyDataCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng);
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions
* @{
*/
uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef
*hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */
uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef
*hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit);
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng);
uint32_t HAL_RNG_ReadLastRandomNumber(const RNG_HandleTypeDef *hrng);
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit);
/**
* @}
*/
/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions
* @{
*/
HAL_RNG_StateTypeDef HAL_RNG_GetState(const RNG_HandleTypeDef *hrng);
uint32_t HAL_RNG_GetError(const RNG_HandleTypeDef *hrng);
/**
* @}
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup RNG_Private_Macros RNG Private Macros
* @{
*/
#define IS_RNG_IT(IT) (((IT) == RNG_IT_CEI) || \
((IT) == RNG_IT_SEI))
#define IS_RNG_FLAG(FLAG) (((FLAG) == RNG_FLAG_DRDY) || \
((FLAG) == RNG_FLAG_CECS) || \
((FLAG) == RNG_FLAG_SECS))
#if defined(RNG_CR_CED)
/**
* @brief Verify the RNG Clock Error Detection mode.
* @param __MODE__ RNG Clock Error Detection mode
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
*/
#define IS_RNG_CED(__MODE__) (((__MODE__) == RNG_CED_ENABLE) || \
((__MODE__) == RNG_CED_DISABLE))
#endif /* RNG_CR_CED */
/**
* @}
*/
#if defined(RNG_CR_CONDRST)
/* Private functions ---------------------------------------------------------*/
/** @defgroup RNG_Private_Functions RNG Private functions
* @{
*/
HAL_StatusTypeDef RNG_RecoverSeedError(RNG_HandleTypeDef *hrng);
/**
* @}
*/
#endif /* RNG_CR_CONDRST */
/**
* @}
*/
#endif /* RNG */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_HAL_RNG_H */

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/**
******************************************************************************
* @file stm32l4xx_ll_crc.h
* @author MCD Application Team
* @brief Header file of CRC LL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_LL_CRC_H
#define STM32L4xx_LL_CRC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver
* @{
*/
#if defined(CRC)
/** @defgroup CRC_LL CRC
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
* @{
*/
/** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length
* @{
*/
#define LL_CRC_POLYLENGTH_32B 0x00000000U /*!< 32 bits Polynomial size */
#define LL_CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< 16 bits Polynomial size */
#define LL_CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< 8 bits Polynomial size */
#define LL_CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0) /*!< 7 bits Polynomial size */
/**
* @}
*/
/** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse
* @{
*/
#define LL_CRC_INDATA_REVERSE_NONE 0x00000000U /*!< Input Data bit order not affected */
#define LL_CRC_INDATA_REVERSE_BYTE CRC_CR_REV_IN_0 /*!< Input Data bit reversal done by byte */
#define LL_CRC_INDATA_REVERSE_HALFWORD CRC_CR_REV_IN_1 /*!< Input Data bit reversal done by half-word */
#define LL_CRC_INDATA_REVERSE_WORD (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0) /*!< Input Data bit reversal done by word */
/**
* @}
*/
/** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse
* @{
*/
#define LL_CRC_OUTDATA_REVERSE_NONE 0x00000000U /*!< Output Data bit order not affected */
#define LL_CRC_OUTDATA_REVERSE_BIT CRC_CR_REV_OUT /*!< Output Data bit reversal done by bit */
/**
* @}
*/
/** @defgroup CRC_LL_EC_Default_Polynomial_Value Default CRC generating polynomial value
* @brief Normal representation of this polynomial value is
* X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 .
* @{
*/
#define LL_CRC_DEFAULT_CRC32_POLY 0x04C11DB7U /*!< Default CRC generating polynomial value */
/**
* @}
*/
/** @defgroup CRC_LL_EC_Default_InitValue Default CRC computation initialization value
* @{
*/
#define LL_CRC_DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Default CRC computation initialization value */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
* @{
*/
/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
* @{
*/
/**
* @brief Write a value in CRC register
* @param __INSTANCE__ CRC Instance
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__)
/**
* @brief Read a value in CRC register
* @param __INSTANCE__ CRC Instance
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
* @{
*/
/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
* @{
*/
/**
* @brief Reset the CRC calculation unit.
* @note If Programmable Initial CRC value feature
* is available, also set the Data Register to the value stored in the
* CRC_INIT register, otherwise, reset Data Register to its default value.
* @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit
* @param CRCx CRC Instance
* @retval None
*/
__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx)
{
SET_BIT(CRCx->CR, CRC_CR_RESET);
}
/**
* @brief Configure size of the polynomial.
* @rmtoll CR POLYSIZE LL_CRC_SetPolynomialSize
* @param CRCx CRC Instance
* @param PolySize This parameter can be one of the following values:
* @arg @ref LL_CRC_POLYLENGTH_32B
* @arg @ref LL_CRC_POLYLENGTH_16B
* @arg @ref LL_CRC_POLYLENGTH_8B
* @arg @ref LL_CRC_POLYLENGTH_7B
* @retval None
*/
__STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize)
{
MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize);
}
/**
* @brief Return size of the polynomial.
* @rmtoll CR POLYSIZE LL_CRC_GetPolynomialSize
* @param CRCx CRC Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_POLYLENGTH_32B
* @arg @ref LL_CRC_POLYLENGTH_16B
* @arg @ref LL_CRC_POLYLENGTH_8B
* @arg @ref LL_CRC_POLYLENGTH_7B
*/
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE));
}
/**
* @brief Configure the reversal of the bit order of the input data
* @rmtoll CR REV_IN LL_CRC_SetInputDataReverseMode
* @param CRCx CRC Instance
* @param ReverseMode This parameter can be one of the following values:
* @arg @ref LL_CRC_INDATA_REVERSE_NONE
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
* @arg @ref LL_CRC_INDATA_REVERSE_WORD
* @retval None
*/
__STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
{
MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode);
}
/**
* @brief Return type of reversal for input data bit order
* @rmtoll CR REV_IN LL_CRC_GetInputDataReverseMode
* @param CRCx CRC Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_INDATA_REVERSE_NONE
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
* @arg @ref LL_CRC_INDATA_REVERSE_WORD
*/
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN));
}
/**
* @brief Configure the reversal of the bit order of the Output data
* @rmtoll CR REV_OUT LL_CRC_SetOutputDataReverseMode
* @param CRCx CRC Instance
* @param ReverseMode This parameter can be one of the following values:
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
* @retval None
*/
__STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
{
MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode);
}
/**
* @brief Return type of reversal of the bit order of the Output data
* @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode
* @param CRCx CRC Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
*/
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT));
}
/**
* @brief Initialize the Programmable initial CRC value.
* @note If the CRC size is less than 32 bits, the least significant bits
* are used to write the correct value
* @note LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter.
* @rmtoll INIT INIT LL_CRC_SetInitialData
* @param CRCx CRC Instance
* @param InitCrc Value to be programmed in Programmable initial CRC value register
* @retval None
*/
__STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc)
{
WRITE_REG(CRCx->INIT, InitCrc);
}
/**
* @brief Return current Initial CRC value.
* @note If the CRC size is less than 32 bits, the least significant bits
* are used to read the correct value
* @rmtoll INIT INIT LL_CRC_GetInitialData
* @param CRCx CRC Instance
* @retval Value programmed in Programmable initial CRC value register
*/
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->INIT));
}
/**
* @brief Initialize the Programmable polynomial value
* (coefficients of the polynomial to be used for CRC calculation).
* @note LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter.
* @note Please check Reference Manual and existing Errata Sheets,
* regarding possible limitations for Polynomial values usage.
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* @rmtoll POL POL LL_CRC_SetPolynomialCoef
* @param CRCx CRC Instance
* @param PolynomCoef Value to be programmed in Programmable Polynomial value register
* @retval None
*/
__STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef)
{
WRITE_REG(CRCx->POL, PolynomCoef);
}
/**
* @brief Return current Programmable polynomial value
* @note Please check Reference Manual and existing Errata Sheets,
* regarding possible limitations for Polynomial values usage.
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* @rmtoll POL POL LL_CRC_GetPolynomialCoef
* @param CRCx CRC Instance
* @retval Value programmed in Programmable Polynomial value register
*/
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->POL));
}
/**
* @}
*/
/** @defgroup CRC_LL_EF_Data_Management Data_Management
* @{
*/
/**
* @brief Write given 32-bit data to the CRC calculator
* @rmtoll DR DR LL_CRC_FeedData32
* @param CRCx CRC Instance
* @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF
* @retval None
*/
__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
{
WRITE_REG(CRCx->DR, InData);
}
/**
* @brief Write given 16-bit data to the CRC calculator
* @rmtoll DR DR LL_CRC_FeedData16
* @param CRCx CRC Instance
* @param InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF
* @retval None
*/
__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData)
{
__IO uint16_t *pReg;
pReg = (__IO uint16_t *)(__IO void *)(&CRCx->DR); /* Derogation MisraC2012 R.11.5 */
*pReg = InData;
}
/**
* @brief Write given 8-bit data to the CRC calculator
* @rmtoll DR DR LL_CRC_FeedData8
* @param CRCx CRC Instance
* @param InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF
* @retval None
*/
__STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData)
{
*(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData;
}
/**
* @brief Return current CRC calculation result. 32 bits value is returned.
* @rmtoll DR DR LL_CRC_ReadData32
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
*/
__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->DR));
}
/**
* @brief Return current CRC calculation result. 16 bits value is returned.
* @note This function is expected to be used in a 16 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData16
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (16 bits).
*/
__STATIC_INLINE uint16_t LL_CRC_ReadData16(const CRC_TypeDef *CRCx)
{
return (uint16_t)READ_REG(CRCx->DR);
}
/**
* @brief Return current CRC calculation result. 8 bits value is returned.
* @note This function is expected to be used in a 8 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData8
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (8 bits).
*/
__STATIC_INLINE uint8_t LL_CRC_ReadData8(const CRC_TypeDef *CRCx)
{
return (uint8_t)READ_REG(CRCx->DR);
}
/**
* @brief Return current CRC calculation result. 7 bits value is returned.
* @note This function is expected to be used in a 7 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData7
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (7 bits).
*/
__STATIC_INLINE uint8_t LL_CRC_ReadData7(const CRC_TypeDef *CRCx)
{
return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU);
}
/**
* @brief Return data stored in the Independent Data(IDR) register.
* @note This register can be used as a temporary storage location.
* @note Refer to the Reference Manual to get the authorized data length in bits.
* @rmtoll IDR IDR LL_CRC_Read_IDR
* @param CRCx CRC Instance
* @retval Value stored in CRC_IDR register
*/
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->IDR));
}
/**
* @brief Store data in the Independent Data(IDR) register.
* @note This register can be used as a temporary storage location.
* @note Refer to the Reference Manual to get the authorized data length in bits.
* @rmtoll IDR IDR LL_CRC_Write_IDR
* @param CRCx CRC Instance
* @param InData value to be stored in CRC_IDR register
* @retval None
*/
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
{
#if (CRC_IDR_IDR == 0x0FFU)
*((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData;
#else
WRITE_REG(CRCx->IDR, InData);
#endif
}
/**
* @}
*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
* @{
*/
ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx);
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/**
* @}
*/
/**
* @}
*/
#endif /* defined(CRC) */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_LL_CRC_H */

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@ -0,0 +1,715 @@
/**
******************************************************************************
* @file stm32l4xx_ll_rng.h
* @author MCD Application Team
* @brief Header file of RNG LL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_LL_RNG_H
#define STM32L4xx_LL_RNG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver
* @{
*/
#if defined (RNG)
/** @defgroup RNG_LL RNG
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/** @defgroup RNG_LL_Private_Defines RNG Private Defines
* @{
*/
/* Health test control register information to use in CCM algorithm */
#define LL_RNG_HTCFG 0x17590ABCU /*!< Magic number */
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
#if defined(RNG_CR_CED)
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
* @{
*/
/**
* @brief LL RNG Init Structure Definition
*/
typedef struct
{
uint32_t ClockErrorDetection; /*!< Clock error detection.
This parameter can be one value of @ref RNG_LL_CED.
This parameter can be modified using unitary
functions @ref LL_RNG_EnableClkErrorDetect(). */
} LL_RNG_InitTypeDef;
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
#endif /* RNG_CR_CED */
/* Exported constants --------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
* @{
*/
#if defined(RNG_CR_CED)
/** @defgroup RNG_LL_CED Clock Error Detection
* @{
*/
#define LL_RNG_CED_ENABLE 0x00000000U /*!< Clock error detection enabled */
#define LL_RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
/**
* @}
*/
#endif /* RNG_CR_CED */
#if defined(RNG_CR_CONDRST)
/** @defgroup RNG_LL_Clock_Divider_Factor Value used to configure an internal
* programmable divider acting on the incoming RNG clock
* @{
*/
#define LL_RNG_CLKDIV_BY_1 (0x00000000UL) /*!< No clock division */
#define LL_RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0) /*!< 2 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1) /*!< 4 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 8 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2) /*!< 16 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) /*!< 32 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) /*!< 64 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 128 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3) /*!< 256 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0) /*!< 512 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1) /*!< 1024 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 2048 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2) /*!< 4096 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) /*!< 8192 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) /*!< 16384 RNG clock cycles per internal RNG clock */
#define LL_RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) /*!< 32768 RNG clock cycles per internal RNG clock */
/**
* @}
*/
/** @defgroup RNG_LL_NIST_Compliance NIST Compliance configuration
* @{
*/
#define LL_RNG_NIST_COMPLIANT (0x00000000UL) /*!< Default NIST compliant configuration*/
#define LL_RNG_CUSTOM_NIST (RNG_CR_NISTC) /*!< Custom NIST configuration */
/* Legacy alias */
#define LL_RNG_NOTNIST_COMPLIANT LL_RNG_CUSTOM_NIST
/**
* @}
*/
#endif /* RNG_CR_CONDRST */
/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_RNG_ReadReg function
* @{
*/
#define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
#define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
#define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
#define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
#define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
/**
* @}
*/
/** @defgroup RNG_LL_EC_IT IT Defines
* @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
* @{
*/
#define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
* @{
*/
/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
* @{
*/
/**
* @brief Write a value in RNG register
* @param __INSTANCE__ RNG Instance
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/**
* @brief Read a value in RNG register
* @param __INSTANCE__ RNG Instance
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
* @{
*/
/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
* @{
*/
/**
* @brief Enable Random Number Generation
* @rmtoll CR RNGEN LL_RNG_Enable
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
{
SET_BIT(RNGx->CR, RNG_CR_RNGEN);
}
/**
* @brief Disable Random Number Generation
* @rmtoll CR RNGEN LL_RNG_Disable
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
{
CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
}
/**
* @brief Check if Random Number Generator is enabled
* @rmtoll CR RNGEN LL_RNG_IsEnabled
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsEnabled(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
}
#if defined(RNG_CR_CED)
/**
* @brief Enable Clock Error Detection
* @rmtoll CR CED LL_RNG_EnableClkErrorDetect
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
{
#if defined(RNG_CR_CONDRST)
MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
#else
CLEAR_BIT(RNGx->CR, RNG_CR_CED);
#endif /* RNG_CR_CONDRST*/
}
/**
* @brief Disable RNG Clock Error Detection
* @rmtoll CR CED LL_RNG_DisableClkErrorDetect
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
{
#if defined(RNG_CR_CONDRST)
MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
#else
SET_BIT(RNGx->CR, RNG_CR_CED);
#endif /* RNG_CR_CONDRST*/
}
/**
* @brief Check if RNG Clock Error Detection is enabled
* @rmtoll CR CED LL_RNG_IsEnabledClkErrorDetect
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL);
}
#if defined(RNG_CR_CONDRST)
/**
* @brief Set RNG Conditioning Soft Reset bit
* @rmtoll CR CONDRST LL_RNG_SetConditioningResetBit
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetConditioningResetBit(RNG_TypeDef *RNGx)
{
SET_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Reset RNG Conditioning Soft Reset bit
* @rmtoll CR CONDRST LL_RNG_ResetConditioningResetBit
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_ResetConditioningResetBit(RNG_TypeDef *RNGx)
{
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Check if RNG Conditioning Soft Reset bit is set
* @rmtoll CR CONDRST LL_RNG_IsResetConditioningBitSet
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsResetConditioningBitSet(RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL);
}
/**
* @brief Enable RNG Config Lock
* @rmtoll CR CONFIGLOCK LL_RNG_ConfigLock
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_ConfigLock(RNG_TypeDef *RNGx)
{
SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK);
}
/**
* @brief Check if RNG Config Lock is enabled
* @rmtoll CR CONFIGLOCK LL_RNG_IsConfigLocked
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsConfigLocked(RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_CONFIGLOCK) == (RNG_CR_CONFIGLOCK)) ? 1UL : 0UL);
}
/**
* @brief Enable NIST Compliance
* @rmtoll CR NISTC LL_RNG_EnableNistCompliance
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_EnableNistCompliance(RNG_TypeDef *RNGx)
{
MODIFY_REG(RNGx->CR, RNG_CR_NISTC | RNG_CR_CONDRST, LL_RNG_NIST_COMPLIANT | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Disable NIST Compliance
* @rmtoll CR NISTC LL_RNG_DisableNistCompliance
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_DisableNistCompliance(RNG_TypeDef *RNGx)
{
MODIFY_REG(RNGx->CR, RNG_CR_NISTC | RNG_CR_CONDRST, LL_RNG_CUSTOM_NIST | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Check if NIST Compliance is enabled
* @rmtoll CR NISTC LL_RNG_IsNistComplianceEnabled
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsNistComplianceEnabled(RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_NISTC) != (RNG_CR_NISTC)) ? 1UL : 0UL);
}
/**
* @brief Set RNG Config1 Configuration field value
* @rmtoll CR RNG_CONFIG1 LL_RNG_SetConfig1
* @param RNGx RNG Instance
* @param Config1 Value between 0 and 0x3F
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetConfig1(RNG_TypeDef *RNGx, uint32_t Config1)
{
MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG1 | RNG_CR_CONDRST, (Config1 << RNG_CR_RNG_CONFIG1_Pos) | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Get RNG Config1 Configuration field value
* @rmtoll CR RNG_CONFIG1 LL_RNG_GetConfig1
* @param RNGx RNG Instance
* @retval Returned Value expressed on 6 bits : Value between 0 and 0x3F
*/
__STATIC_INLINE uint32_t LL_RNG_GetConfig1(RNG_TypeDef *RNGx)
{
return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG1) >> RNG_CR_RNG_CONFIG1_Pos);
}
/**
* @brief Set RNG Config2 Configuration field value
* @rmtoll CR RNG_CONFIG2 LL_RNG_SetConfig2
* @param RNGx RNG Instance
* @param Config2 Value between 0 and 0x7
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetConfig2(RNG_TypeDef *RNGx, uint32_t Config2)
{
MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG2 | RNG_CR_CONDRST, (Config2 << RNG_CR_RNG_CONFIG2_Pos) | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Get RNG Config2 Configuration field value
* @rmtoll CR RNG_CONFIG2 LL_RNG_GetConfig2
* @param RNGx RNG Instance
* @retval Returned Value expressed on 3 bits : Value between 0 and 0x7
*/
__STATIC_INLINE uint32_t LL_RNG_GetConfig2(RNG_TypeDef *RNGx)
{
return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG2) >> RNG_CR_RNG_CONFIG2_Pos);
}
/**
* @brief Set RNG Config3 Configuration field value
* @rmtoll CR RNG_CONFIG3 LL_RNG_SetConfig3
* @param RNGx RNG Instance
* @param Config3 Value between 0 and 0xF
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetConfig3(RNG_TypeDef *RNGx, uint32_t Config3)
{
MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG3 | RNG_CR_CONDRST, (Config3 << RNG_CR_RNG_CONFIG3_Pos) | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Get RNG Config3 Configuration field value
* @rmtoll CR RNG_CONFIG3 LL_RNG_GetConfig3
* @param RNGx RNG Instance
* @retval Returned Value expressed on 4 bits : Value between 0 and 0xF
*/
__STATIC_INLINE uint32_t LL_RNG_GetConfig3(RNG_TypeDef *RNGx)
{
return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG3) >> RNG_CR_RNG_CONFIG3_Pos);
}
/**
* @brief Set RNG Clock divider factor
* @rmtoll CR CLKDIV LL_RNG_SetClockDivider
* @param RNGx RNG Instance
* @param Divider can be one of the following values:
* @arg @ref LL_RNG_CLKDIV_BY_1
* @arg @ref LL_RNG_CLKDIV_BY_2
* @arg @ref LL_RNG_CLKDIV_BY_4
* @arg @ref LL_RNG_CLKDIV_BY_8
* @arg @ref LL_RNG_CLKDIV_BY_16
* @arg @ref LL_RNG_CLKDIV_BY_32
* @arg @ref LL_RNG_CLKDIV_BY_64
* @arg @ref LL_RNG_CLKDIV_BY_128
* @arg @ref LL_RNG_CLKDIV_BY_256
* @arg @ref LL_RNG_CLKDIV_BY_512
* @arg @ref LL_RNG_CLKDIV_BY_1024
* @arg @ref LL_RNG_CLKDIV_BY_2048
* @arg @ref LL_RNG_CLKDIV_BY_4096
* @arg @ref LL_RNG_CLKDIV_BY_8192
* @arg @ref LL_RNG_CLKDIV_BY_16384
* @arg @ref LL_RNG_CLKDIV_BY_32768
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetClockDivider(RNG_TypeDef *RNGx, uint32_t Divider)
{
MODIFY_REG(RNGx->CR, RNG_CR_CLKDIV | RNG_CR_CONDRST, Divider | RNG_CR_CONDRST);
CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
}
/**
* @brief Get RNG Clock divider factor
* @rmtoll CR CLKDIV LL_RNG_GetClockDivider
* @param RNGx RNG Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_RNG_CLKDIV_BY_1
* @arg @ref LL_RNG_CLKDIV_BY_2
* @arg @ref LL_RNG_CLKDIV_BY_4
* @arg @ref LL_RNG_CLKDIV_BY_8
* @arg @ref LL_RNG_CLKDIV_BY_16
* @arg @ref LL_RNG_CLKDIV_BY_32
* @arg @ref LL_RNG_CLKDIV_BY_64
* @arg @ref LL_RNG_CLKDIV_BY_128
* @arg @ref LL_RNG_CLKDIV_BY_256
* @arg @ref LL_RNG_CLKDIV_BY_512
* @arg @ref LL_RNG_CLKDIV_BY_1024
* @arg @ref LL_RNG_CLKDIV_BY_2048
* @arg @ref LL_RNG_CLKDIV_BY_4096
* @arg @ref LL_RNG_CLKDIV_BY_8192
* @arg @ref LL_RNG_CLKDIV_BY_16384
* @arg @ref LL_RNG_CLKDIV_BY_32768
*/
__STATIC_INLINE uint32_t LL_RNG_GetClockDivider(RNG_TypeDef *RNGx)
{
return (uint32_t)READ_BIT(RNGx->CR, RNG_CR_CLKDIV);
}
#endif /* RNG_CR_CONDRST */
#endif /* RNG_CR_CED */
/**
* @}
*/
/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
* @{
*/
/**
* @brief Indicate if the RNG Data ready Flag is set or not
* @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
}
/**
* @brief Indicate if the Clock Error Current Status Flag is set or not
* @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
}
/**
* @brief Indicate if the Seed Error Current Status Flag is set or not
* @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
}
/**
* @brief Indicate if the Clock Error Interrupt Status Flag is set or not
* @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
}
/**
* @brief Indicate if the Seed Error Interrupt Status Flag is set or not
* @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
}
/**
* @brief Clear Clock Error interrupt Status (CEIS) Flag
* @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
{
WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
}
/**
* @brief Clear Seed Error interrupt Status (SEIS) Flag
* @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
{
WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
}
/**
* @}
*/
/** @defgroup RNG_LL_EF_IT_Management IT Management
* @{
*/
/**
* @brief Enable Random Number Generator Interrupt
* (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_EnableIT
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
{
SET_BIT(RNGx->CR, RNG_CR_IE);
}
/**
* @brief Disable Random Number Generator Interrupt
* (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_DisableIT
* @param RNGx RNG Instance
* @retval None
*/
__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
{
CLEAR_BIT(RNGx->CR, RNG_CR_IE);
}
/**
* @brief Check if Random Number Generator Interrupt is enabled
* (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_IsEnabledIT
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
}
/**
* @}
*/
/** @defgroup RNG_LL_EF_Data_Management Data Management
* @{
*/
/**
* @brief Return32-bit Random Number value
* @rmtoll DR RNDATA LL_RNG_ReadRandData32
* @param RNGx RNG Instance
* @retval Generated 32-bit random value
*/
__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(const RNG_TypeDef *RNGx)
{
return (uint32_t)(READ_REG(RNGx->DR));
}
/**
* @}
*/
#if defined(RNG_VER_3_2) || defined (RNG_VER_3_1)
/** @defgroup RNG_LL_EF_Health_Test_Control Health Test Control
* @{
*/
/**
* @brief Set RNG Health Test Control
* @rmtoll HTCR HTCFG LL_RNG_SetHealthconfiguration
* @param RNGx RNG Instance
* @param HTCFG can be values of 32 bits
* @retval None
*/
__STATIC_INLINE void LL_RNG_SetHealthconfiguration(RNG_TypeDef *RNGx, uint32_t HTCFG)
{
WRITE_REG(RNGx->HTCR, HTCFG);
}
/**
* @brief Get RNG Health Test Control
* @rmtoll HTCR HTCFG LL_RNG_GetHealthconfiguration
* @param RNGx RNG Instance
* @retval Return 32-bit RNG Health Test configuration
*/
__STATIC_INLINE uint32_t LL_RNG_GetHealthconfiguration(RNG_TypeDef *RNGx)
{
return (uint32_t)READ_REG(RNGx->HTCR);
}
/**
* @}
*/
#endif /* RNG_VER_3_2 || RNG_VER_3_1 */
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
* @{
*/
#if defined(RNG_CR_CED)
ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, const LL_RNG_InitTypeDef *RNG_InitStruct);
void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
#endif /* RNG_CR_CED */
ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx);
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/**
* @}
*/
/**
* @}
*/
#endif /* RNG */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_LL_RNG_H */

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@ -0,0 +1,522 @@
/**
******************************************************************************
* @file stm32l4xx_hal_crc.c
* @author MCD Application Team
* @brief CRC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Cyclic Redundancy Check (CRC) peripheral:
* + Initialization and de-initialization functions
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
(+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
(+) Initialize CRC calculator
(++) specify generating polynomial (peripheral default or non-default one)
(++) specify initialization value (peripheral default or non-default one)
(++) specify input data format
(++) specify input or output data inversion mode if any
(+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
input data buffer starting with the previously computed CRC as
initialization value
(+) Use HAL_CRC_Calculate() function to compute the CRC value of the
input data buffer starting with the defined initialization value
(default or non-default) to initiate CRC calculation
@endverbatim
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @defgroup CRC CRC
* @brief CRC HAL module driver.
* @{
*/
#ifdef HAL_CRC_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/** @defgroup CRC_Private_Functions CRC Private Functions
* @{
*/
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength);
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength);
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CRC_Exported_Functions CRC Exported Functions
* @{
*/
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions.
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the CRC according to the specified parameters
in the CRC_InitTypeDef and create the associated handle
(+) DeInitialize the CRC peripheral
(+) Initialize the CRC MSP (MCU Specific Package)
(+) DeInitialize the CRC MSP
@endverbatim
* @{
*/
/**
* @brief Initialize the CRC according to the specified
* parameters in the CRC_InitTypeDef and create the associated handle.
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
if (hcrc == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
if (hcrc->State == HAL_CRC_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hcrc->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_CRC_MspInit(hcrc);
}
hcrc->State = HAL_CRC_STATE_BUSY;
/* check whether or not non-default generating polynomial has been
* picked up by user */
assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
{
/* initialize peripheral with default generating polynomial */
WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
}
else
{
/* initialize CRC peripheral with generating polynomial defined by user */
if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
{
return HAL_ERROR;
}
}
/* check whether or not non-default CRC initial value has been
* picked up by user */
assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
{
WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
}
else
{
WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
}
/* set input data inversion mode */
assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
/* set output data inversion mode */
assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
/* makes sure the input data format (bytes, halfwords or words stream)
* is properly specified by user */
assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return function status */
return HAL_OK;
}
/**
* @brief DeInitialize the CRC peripheral.
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
{
/* Check the CRC handle allocation */
if (hcrc == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
/* Check the CRC peripheral state */
if (hcrc->State == HAL_CRC_STATE_BUSY)
{
return HAL_BUSY;
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* Reset CRC calculation unit */
__HAL_CRC_DR_RESET(hcrc);
#if defined(CRC_IDR32BITSLENGTH_SUPPORT)
/* Reset IDR register content */
__HAL_CRC_SET_IDR(hcrc, 0);
#else
/* Reset IDR register content */
CLEAR_REG(hcrc->Instance->IDR);
#endif /* CRC_IDR32BITSLENGTH_SUPPORT */
/* DeInit the low level hardware */
HAL_CRC_MspDeInit(hcrc);
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_RESET;
/* Process unlocked */
__HAL_UNLOCK(hcrc);
/* Return function status */
return HAL_OK;
}
/**
* @brief Initializes the CRC MSP.
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcrc);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CRC_MspInit can be implemented in the user file
*/
}
/**
* @brief DeInitialize the CRC MSP.
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hcrc);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_CRC_MspDeInit can be implemented in the user file
*/
}
/**
* @}
*/
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
* @brief management functions.
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
using combination of the previous CRC value and the new one.
[..] or
(+) compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
independently of the previous CRC value.
@endverbatim
* @{
*/
/**
* @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
* starting with the previously computed CRC as initialization value.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer, exact input data format is
* provided by hcrc->InputDataFormat.
* @param BufferLength input data buffer length (number of bytes if pBuffer
* type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
* number of words if pBuffer type is * uint32_t).
* @note By default, the API expects a uint32_t pointer as input buffer parameter.
* Input buffer pointers with other types simply need to be cast in uint32_t
* and the API will internally adjust its input data processing based on the
* handle field hcrc->InputDataFormat.
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
uint32_t index; /* CRC input data buffer index */
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
switch (hcrc->InputDataFormat)
{
case CRC_INPUTDATA_FORMAT_WORDS:
/* Enter Data to the CRC calculator */
for (index = 0U; index < BufferLength; index++)
{
hcrc->Instance->DR = pBuffer[index];
}
temp = hcrc->Instance->DR;
break;
case CRC_INPUTDATA_FORMAT_BYTES:
temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
break;
case CRC_INPUTDATA_FORMAT_HALFWORDS:
temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
break;
default:
break;
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return the CRC computed value */
return temp;
}
/**
* @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
* starting with hcrc->Instance->INIT as initialization value.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer, exact input data format is
* provided by hcrc->InputDataFormat.
* @param BufferLength input data buffer length (number of bytes if pBuffer
* type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
* number of words if pBuffer type is * uint32_t).
* @note By default, the API expects a uint32_t pointer as input buffer parameter.
* Input buffer pointers with other types simply need to be cast in uint32_t
* and the API will internally adjust its input data processing based on the
* handle field hcrc->InputDataFormat.
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
uint32_t index; /* CRC input data buffer index */
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* Reset CRC Calculation Unit (hcrc->Instance->INIT is
* written in hcrc->Instance->DR) */
__HAL_CRC_DR_RESET(hcrc);
switch (hcrc->InputDataFormat)
{
case CRC_INPUTDATA_FORMAT_WORDS:
/* Enter 32-bit input data to the CRC calculator */
for (index = 0U; index < BufferLength; index++)
{
hcrc->Instance->DR = pBuffer[index];
}
temp = hcrc->Instance->DR;
break;
case CRC_INPUTDATA_FORMAT_BYTES:
/* Specific 8-bit input data handling */
temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
break;
case CRC_INPUTDATA_FORMAT_HALFWORDS:
/* Specific 16-bit input data handling */
temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
break;
default:
break;
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return the CRC computed value */
return temp;
}
/**
* @}
*/
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @brief Peripheral State functions.
*
@verbatim
===============================================================================
##### Peripheral State functions #####
===============================================================================
[..]
This subsection permits to get in run-time the status of the peripheral.
@endverbatim
* @{
*/
/**
* @brief Return the CRC handle state.
* @param hcrc CRC handle
* @retval HAL state
*/
HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc)
{
/* Return CRC handle state */
return hcrc->State;
}
/**
* @}
*/
/**
* @}
*/
/** @addtogroup CRC_Private_Functions
* @{
*/
/**
* @brief Enter 8-bit input data to the CRC calculator.
* Specific data handling to optimize processing time.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
uint32_t i; /* input data buffer index */
uint16_t data;
__IO uint16_t *pReg;
/* Processing time optimization: 4 bytes are entered in a row with a single word write,
* last bytes must be carefully fed to the CRC calculator to ensure a correct type
* handling by the peripheral */
for (i = 0U; i < (BufferLength / 4U); i++)
{
hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
((uint32_t)pBuffer[(4U * i) + 2U] << 8U) | \
(uint32_t)pBuffer[(4U * i) + 3U];
}
/* last bytes specific handling */
if ((BufferLength % 4U) != 0U)
{
if ((BufferLength % 4U) == 1U)
{
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i]; /* Derogation MisraC2012 R.11.5 */
}
if ((BufferLength % 4U) == 2U)
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
*pReg = data;
}
if ((BufferLength % 4U) == 3U)
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
*pReg = data;
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U]; /* Derogation MisraC2012 R.11.5 */
}
}
/* Return the CRC computed value */
return hcrc->Instance->DR;
}
/**
* @brief Enter 16-bit input data to the CRC calculator.
* Specific data handling to optimize processing time.
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
uint32_t i; /* input data buffer index */
__IO uint16_t *pReg;
/* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
* in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
* a correct type handling by the peripheral */
for (i = 0U; i < (BufferLength / 2U); i++)
{
hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
}
if ((BufferLength % 2U) != 0U)
{
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
*pReg = pBuffer[2U * i];
}
/* Return the CRC computed value */
return hcrc->Instance->DR;
}
/**
* @}
*/
#endif /* HAL_CRC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/

View File

@ -0,0 +1,230 @@
/**
******************************************************************************
* @file stm32l4xx_hal_crc_ex.c
* @author MCD Application Team
* @brief Extended CRC HAL module driver.
* This file provides firmware functions to manage the extended
* functionalities of the CRC peripheral.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
================================================================================
##### How to use this driver #####
================================================================================
[..]
(+) Set user-defined generating polynomial through HAL_CRCEx_Polynomial_Set()
(+) Configure Input or Output data inversion
@endverbatim
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @defgroup CRCEx CRCEx
* @brief CRC Extended HAL module driver
* @{
*/
#ifdef HAL_CRC_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions
* @{
*/
/** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions
* @brief Extended Initialization and Configuration functions.
*
@verbatim
===============================================================================
##### Extended configuration functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure the generating polynomial
(+) Configure the input data inversion
(+) Configure the output data inversion
@endverbatim
* @{
*/
/**
* @brief Initialize the CRC polynomial if different from default one.
* @param hcrc CRC handle
* @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long).
* This parameter is written in normal representation, e.g.
* @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021
* @param PolyLength CRC polynomial length.
* This parameter can be one of the following values:
* @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7)
* @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8)
* @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
* @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
/* Check the parameters */
assert_param(IS_CRC_POL_LENGTH(PolyLength));
/* Ensure that the generating polynomial is odd */
if ((Pol & (uint32_t)(0x1U)) == 0U)
{
status = HAL_ERROR;
}
else
{
/* check polynomial definition vs polynomial size:
* polynomial length must be aligned with polynomial
* definition. HAL_ERROR is reported if Pol degree is
* larger than that indicated by PolyLength.
* Look for MSB position: msb will contain the degree of
* the second to the largest polynomial member. E.g., for
* X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
{
}
switch (PolyLength)
{
case CRC_POLYLENGTH_7B:
if (msb >= HAL_CRC_LENGTH_7B)
{
status = HAL_ERROR;
}
break;
case CRC_POLYLENGTH_8B:
if (msb >= HAL_CRC_LENGTH_8B)
{
status = HAL_ERROR;
}
break;
case CRC_POLYLENGTH_16B:
if (msb >= HAL_CRC_LENGTH_16B)
{
status = HAL_ERROR;
}
break;
case CRC_POLYLENGTH_32B:
/* no polynomial definition vs. polynomial length issue possible */
break;
default:
status = HAL_ERROR;
break;
}
}
if (status == HAL_OK)
{
/* set generating polynomial */
WRITE_REG(hcrc->Instance->POL, Pol);
/* set generating polynomial size */
MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
}
/* Return function status */
return status;
}
/**
* @brief Set the Reverse Input data mode.
* @param hcrc CRC handle
* @param InputReverseMode Input Data inversion mode.
* This parameter can be one of the following values:
* @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value)
* @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal
* @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal
* @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode)
{
/* Check the parameters */
assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode));
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* set input data inversion mode */
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode);
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return function status */
return HAL_OK;
}
/**
* @brief Set the Reverse Output data mode.
* @param hcrc CRC handle
* @param OutputReverseMode Output Data inversion mode.
* This parameter can be one of the following values:
* @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value)
* @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode)
{
/* Check the parameters */
assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode));
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
/* set output data inversion mode */
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode);
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_CRC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/

File diff suppressed because it is too large Load Diff

View File

@ -76,7 +76,7 @@
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>OCProductVersion</name>
@ -84,7 +84,7 @@
</option>
<option>
<name>OCDynDriverList</name>
<state>STLINK_ID</state>
<state>CMSISDAP_ID</state>
</option>
<option>
<name>OCLastSavedByProductVersion</name>
@ -328,7 +328,7 @@
<option>
<name>CMSISDAPResetList</name>
<version>1</version>
<state>10</state>
<state>9</state>
</option>
<option>
<name>CMSISDAPHWResetDuration</name>
@ -348,7 +348,7 @@
</option>
<option>
<name>CMSISDAPInterfaceRadio</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>CMSISDAPInterfaceCmdLine</name>
@ -365,11 +365,11 @@
<option>
<name>CMSISDAPJtagSpeedList</name>
<version>0</version>
<state>0</state>
<state>6</state>
</option>
<option>
<name>CMSISDAPBreakpointRadio</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>CMSISDAPRestoreBreakpointsCheck</name>
@ -469,7 +469,7 @@
</option>
<option>
<name>CMSISDAPSelectedCPUBehaviour</name>
<state>0</state>
<state></state>
</option>
<option>
<name>ICpuName</name>

View File

@ -236,7 +236,7 @@
</option>
<option>
<name>CCPreprocFile</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>CCPreprocComments</name>
@ -293,7 +293,7 @@
<option>
<name>CCAllowList</name>
<version>1</version>
<state>11111110</state>
<state>00000000</state>
</option>
<option>
<name>CCDebugInfo</name>
@ -358,6 +358,8 @@
<state>$PROJ_DIR$/../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Device/ST/STM32L4xx/Include</state>
<state>$PROJ_DIR$/../Drivers/CMSIS/Include</state>
<state>$PROJ_DIR$\..\asw</state>
<state>$PROJ_DIR$\..\Drivers\Norflash</state>
</option>
<option>
<name>CCStdIncCheck</name>
@ -373,7 +375,7 @@
</option>
<option>
<name>CCOptLevel</name>
<state>3</state>
<state>0</state>
</option>
<option>
<name>CCOptStrategy</name>
@ -382,7 +384,7 @@
</option>
<option>
<name>CCOptLevelSlave</name>
<state>3</state>
<state>0</state>
</option>
<option>
<name>CCPosIndRopi</name>
@ -685,7 +687,7 @@
<data>
<extensions></extensions>
<cmdline></cmdline>
<hasPrio>144</hasPrio>
<hasPrio>1</hasPrio>
<buildSequence>inputOutputBased</buildSequence>
</data>
</settings>
@ -1119,6 +1121,18 @@
</group>
</group>
</group>
<group>
<name>asw</name>
<file>
<name>$PROJ_DIR$\..\asw\appTask.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\asw\hardware.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\asw\uartapp.c</name>
</file>
</group>
<group>
<name>Drivers</name>
<group>
@ -1127,6 +1141,15 @@
<name>$PROJ_DIR$\..\Core\Src\system_stm32l4xx.c</name>
</file>
</group>
<group>
<name>norflash</name>
<file>
<name>$PROJ_DIR$\..\Drivers\Norflash\norflash.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\Norflash\qspi.c</name>
</file>
</group>
<group>
<name>STM32L4xx_HAL_Driver</name>
<file>
@ -1135,6 +1158,12 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</name>
</file>
@ -1177,6 +1206,9 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</name>
</file>

View File

@ -1450,6 +1450,18 @@
</group>
</group>
</group>
<group>
<name>asw</name>
<file>
<name>$PROJ_DIR$\..\asw\appTask.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\asw\hardware.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\asw\uartapp.c</name>
</file>
</group>
<group>
<name>Drivers</name>
<group>
@ -1458,6 +1470,15 @@
<name>$PROJ_DIR$\..\Core\Src\system_stm32l4xx.c</name>
</file>
</group>
<group>
<name>norflash</name>
<file>
<name>$PROJ_DIR$\..\Drivers\Norflash\norflash.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\Norflash\qspi.c</name>
</file>
</group>
<group>
<name>STM32L4xx_HAL_Driver</name>
<file>
@ -1466,6 +1487,12 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</name>
</file>
@ -1508,6 +1535,9 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</name>
</file>

128
asw/appTask.c Normal file
View File

@ -0,0 +1,128 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "appTask.h"
#include "hardware.h"
#include "stdio.h"
#include "norflash.h"
#include "uartapp.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- S T A T I C V A R I A B L E S
----------------------------------------------------------------------------*/
static uint32_t timebase_counter;
static uint32_t timebase_event;
/*---------------------------------------------------------------------------
* G L O B A L V A R I A B L E S
----------------------------------------------------------------------------*/
uint16_t test[100]={0x6655};
uint32_t delaytest=0;
extern uint8_t mapModeFlag;
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void appTask_TimebaseCallback()
{
timebase_event++;
delaytest++;
}
void apptask_preinit(void)
{
}
void apptask_init(void)
{
printf("system_init finashed\n");
timebase_counter = 0;
timebase_event = 0;
//NORFLASH_Init();
//norflash_test();
printf("apptask_init finashed\n");
//toggle_led();
}
extern UART_HandleTypeDef huart1;
uint8_t uart_tx_buf[8] = {1};
void apptask_maintask(void)
{
if (timebase_event > 0)
{
timebase_event--;
timebase_counter++;//
//1mstsk
uartapp_maintask();
if (timebase_counter >= 1000000)
{
timebase_counter = 0;
}
if (timebase_counter % 100 == 0)
{
//toggle_led();
}
if (timebase_counter %1000 == 0)
{
//HAL_UART_Transmit(&huart1,uart_tx_buf,8,100);
//printf("test\n");
toggle_led();
}
}
}
/* [] END OF FILE */

67
asw/appTask.h Normal file
View File

@ -0,0 +1,67 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
#ifndef __APPTASK_H__
#define __APPTASK_H__
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- G L O B A L V A R I A B L E S
- only configuration table allowed here,variables are not allowed!
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void apptask_init(void);
void apptask_maintask(void);
void apptask_preinit(void);
void appTask_TimebaseCallback();
#endif /*DEFINES_NAME*/
/* [] END OF FILE */

67
asw/hardware.c Normal file
View File

@ -0,0 +1,67 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "hardware.h"
#include "pindef.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- S T A T I C V A R I A B L E S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
* G L O B A L V A R I A B L E S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void toggle_led(void)
{
HAL_GPIO_TogglePin(LED_GPIO_Port,LED_Pin);
}

65
asw/hardware.h Normal file
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@ -0,0 +1,65 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
#ifndef __HARDWARE_H__
#define __HARDWARE_H__
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- G L O B A L V A R I A B L E S
- only configuration table allowed here,variables are not allowed!
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void toggle_led(void);
#endif /*DEFINES_NAME*/
/* [] END OF FILE */

76
asw/pindef.h Normal file
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@ -0,0 +1,76 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
#ifndef __PINDEF_H__
#define __PINDEF_H__
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
#define LED_Pin GPIO_PIN_13
#define LED_GPIO_Port GPIOC
#define LCD_RST_Pin GPIO_PIN_15
#define LCD_RST_GPIO_Port GPIOB
#define LCD_BL_Pin GPIO_PIN_6
#define LCD_BL_GPIO_Port GPIOC
#define LCD_DX_Pin GPIO_PIN_7
#define LCD_DX_GPIO_Port GPIOC
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- G L O B A L V A R I A B L E S
- only configuration table allowed here,variables are not allowed!
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
#endif /*DEFINES_NAME*/
/* [] END OF FILE */

350
asw/uartapp.c Normal file
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@ -0,0 +1,350 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "uartapp.h"
#include "stdio.h"
#include "norflash.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
typedef enum
{
UARTAPP_INIT=0,
UARTAPP_IDLE,
UARTAPP_RXCMD,
UARTAPP_RXSPIDATA,
UARTAPP_STOPRX,
UARTAPP_ERASING,
UARTAPP_CRC,
UARTAPP_STATENUM,
}uartapp_mainstate_type;
typedef enum
{
CMD31_Idle,
CMD31_Erase,
CMD31_ReqDownload,
CMD31_CRC,
CMD31_MapMode,
CMD31_QuitMapMode,
CMD31_MapModeTest,
CMD31_NUM,
}CMD31_type;
/*---------------------------------------------------------------------------
- S T A T I C V A R I A B L E S
----------------------------------------------------------------------------*/
static uartapp_mainstate_type task_state;
static uint8_t rxCpltFlag = 0,idleReqFlag=0,downloadReqFlag=0,eraseReqFlag = 0;
static uint8_t rxbuf[512],txbuf[10];
static uint16_t rxsize = 0,timeout_count=0;
static uint32_t writeaddr = 0;
/*---------------------------------------------------------------------------
* G L O B A L V A R I A B L E S
----------------------------------------------------------------------------*/
extern UART_HandleTypeDef huart1;
extern uint32_t delaytest;
extern uint8_t mapModeFlag;
extern CRC_HandleTypeDef hcrc;
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
static void uartapp_cmdpro(uint8_t *data,uint16_t len);
static void uartapp_cmd31(uint8_t *data,uint16_t len);
//重定向用于printf
#if 0
int _write(int fd, char *ptr, int len)
{
//toggle_led(); // 这里测试是否走通
HAL_UART_Transmit(&huart1, (uint8_t *)ptr, len, HAL_MAX_DELAY);
return len;
}
#else
int __write(int handle, char *buf, int size) {
if (handle == 1 || handle == 2) { // stdout 或 stderr
HAL_UART_Transmit(&huart1, (uint8_t *)buf, size, HAL_MAX_DELAY);
return size;
}
return -1;
}
#endif
void crc_calc_init(void)
{
HAL_CRCEx_Polynomial_Set(&hcrc,0x1D,CRC_POLYLENGTH_8B);
}
uint32_t crc_calc(uint32_t addr,uint32_t len)
{
len = (len>>2);
uint32_t crc = HAL_CRC_Calculate(&hcrc,(uint32_t*)addr,len);
return (crc^0xffffffff);
}
void uartapp_init(void)
{
setvbuf(stdout, NULL, _IONBF, 0); // 禁用 stdout 缓冲printf 立即输出
task_state = UARTAPP_INIT;
}
static void maintask_gotoidle(void)
{
task_state = UARTAPP_IDLE;
HAL_UARTEx_ReceiveToIdle_DMA(&huart1,rxbuf,512);
rxCpltFlag = 0;
rxsize = 0;
timeout_count=0;
}
void uartapp_maintask(void)
{
switch (task_state)
{
case UARTAPP_INIT:
__HAL_DMA_DISABLE_IT(huart1.hdmarx, DMA_IT_HT);
maintask_gotoidle();
break;
case UARTAPP_IDLE:
if (rxCpltFlag == 1)
{
task_state = UARTAPP_RXCMD;
timeout_count = 0;
}
timeout_count++;
if (timeout_count > 5000)
{
maintask_gotoidle();
//HAL_UART_Transmit(&huart1,txbuf,3,1000);
}
break;
case UARTAPP_RXCMD:
if (rxbuf[0]==0x55 && rxbuf[1]==0xaa && rxsize > 3)
{
uartapp_cmdpro(rxbuf+2,rxsize-2);
}
else
{
printf("err rxsize=%d\n",rxsize);
}
if (downloadReqFlag == 1)
{
downloadReqFlag = 0;
task_state = UARTAPP_RXSPIDATA;
printf("wait spiflash data\n");
rxCpltFlag = 0;
rxsize = 0;
HAL_UARTEx_ReceiveToIdle_DMA(&huart1,rxbuf,512);
timeout_count = 0;
}
else if (eraseReqFlag == 1)
{
eraseReqFlag = 0;
task_state = UARTAPP_ERASING;
timeout_count = 0;
}
else
{
maintask_gotoidle();
}
break;
case UARTAPP_RXSPIDATA:
timeout_count++;
if (rxCpltFlag == 1)
{
timeout_count = 0;
delaytest = 0;
if (rxsize > 0)
{
NORFLASH_Write_NoCheck(rxbuf,writeaddr,rxsize);
printf("write 0x%06X,0x%03X,delay %d\n",writeaddr,rxsize,delaytest);
}
HAL_UARTEx_ReceiveToIdle_DMA(&huart1,rxbuf,512);
rxCpltFlag = 0;
writeaddr += rxsize;
rxsize = 0;
}
if (timeout_count > 5000)
{
maintask_gotoidle();
printf("rx timeout\n");
}
if (idleReqFlag == 1)
{
idleReqFlag = 0;
maintask_gotoidle();
printf("idleReqFlag=1\n");
}
break;
case UARTAPP_ERASING:
timeout_count++;
if (timeout_count > 30000)
{
maintask_gotoidle();
printf("erase err timeout\n");
break;
}
if (timeout_count % 100 == 0)
{
if (NORFLASH_Check_Busy() == 0)
{
maintask_gotoidle();
printf("erase success\n");
break;
}
}
if (timeout_count % 4000 == 0)
{
printf("wait erase\n");
}
break;
default:
break;
}
}
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
{
if (huart->Instance == USART1)
{
rxCpltFlag = 1;
rxsize = Size;
toggle_led();
}
}
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
if (huart->Instance == USART1)
{
//rxCpltFlag = 1;
//toggle_led();
//rxsize = 0xFF;
//HAL_UART_Transmit(&huart1,txbuf,3,1000);
}
}
static void uartapp_cmdpro(uint8_t *data,uint16_t len)
{
switch (data[0])//sid
{
case 0x31:
uartapp_cmd31(data+1,len-1);
break;
default:
break;
}
}
static void uartapp_cmd31(uint8_t *data,uint16_t len)
{
CMD31_type subid = data[0];
switch (subid)
{
case CMD31_Idle:
idleReqFlag = 1;
break;
case CMD31_Erase:
if (mapModeFlag == 0)
{
NORFLASH_Erase_Chip();
eraseReqFlag = 1;
printf("erasing Chip\n");
}
break;
case CMD31_ReqDownload:
writeaddr = 0;
downloadReqFlag = 1;
break;
case CMD31_CRC:
delaytest = 0;
uint32_t starttime = SysTick->VAL;
uint32_t crcvalue = crc_calc(EX_FLASH_START_ADDR,0x32C50);
uint32_t endtime = (SysTick->VAL);
uint32_t usedtime = delaytest*(SysTick->LOAD + 1) + endtime - starttime;
printf("crc= %08X,time=%d\n",crcvalue,usedtime);
printf("starttime= %d,endtime=%d,delaytest=%d\n",starttime,endtime,delaytest);
//crcReqFlag = 1;
break;
case CMD31_MapMode:
NORFLASH_MemroyMapMode();
printf("mapmode\n");
break;
case CMD31_QuitMapMode:
NORFLASH_QuitMemroyMapMode();
break;
case CMD31_MapModeTest:
norflash_test();
break;
default:
break;
}
}

65
asw/uartapp.h Normal file
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@ -0,0 +1,65 @@
/** ##########################################################################
** Filename :
** Project :
** Module :
** Processor :
** Version : 1.0
** Compiler :
** Date/Time :
** Abstract :
** Contents :
** Note :
*
* 1.UTF-8
* 2.tab键空格4个
* 3. init, deinit,
* task,goto sleep,
* goto wake ,judge_pre_sleep
* 4.
**
** (c) Copyright dmdz Co.,Ltd
** --------------------------------------------------------------------------
** R E V I S I O N H I S T O R Y
** --------------------------------------------------------------------------
** Date Ver Author Description
** -20191106- --V01-- --LYJ--- ----
** -20230602- --V1.0-- --mingyea--- ----
** #########################################################################*/
#ifndef __UARTAPP_H__
#define __UARTAPP_H__
/*---------------------------------------------------------------------------
- I N C L U D E F I L E S
----------------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
/*---------------------------------------------------------------------------
- D E F I N E S / M A C R O S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- T Y P E D E F I N I T I O N S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- G L O B A L V A R I A B L E S
- only configuration table allowed here,variables are not allowed!
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- C O N S T A N T S
----------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
- F U N C T I O N P R O T O T Y P E
----------------------------------------------------------------------------*/
void uartapp_init(void);
void uartapp_maintask(void);
#endif /*DEFINES_NAME*/
/* [] END OF FILE */

View File

@ -18,27 +18,33 @@ GPIO.groupedBy=
KeepUserPlacement=false
Mcu.CPN=STM32L431RCT6
Mcu.Family=STM32L4
Mcu.IP0=DMA
Mcu.IP1=NVIC
Mcu.IP2=QUADSPI
Mcu.IP3=RCC
Mcu.IP4=SYS
Mcu.IP5=USART1
Mcu.IPNb=6
Mcu.IP0=CRC
Mcu.IP1=DMA
Mcu.IP2=NVIC
Mcu.IP3=QUADSPI
Mcu.IP4=RCC
Mcu.IP5=RNG
Mcu.IP6=SYS
Mcu.IP7=USART1
Mcu.IPNb=8
Mcu.Name=STM32L431R(B-C)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PH0-OSC_IN (PH0)
Mcu.Pin1=PH1-OSC_OUT (PH1)
Mcu.Pin10=VP_SYS_VS_Systick
Mcu.Pin2=PA2
Mcu.Pin3=PA3
Mcu.Pin4=PA6
Mcu.Pin5=PA7
Mcu.Pin6=PB0
Mcu.Pin7=PB1
Mcu.Pin8=PA9
Mcu.Pin9=PA10
Mcu.PinsNb=11
Mcu.Pin0=PC13
Mcu.Pin1=PH0-OSC_IN (PH0)
Mcu.Pin10=PA10
Mcu.Pin11=PH3-BOOT0
Mcu.Pin12=VP_CRC_VS_CRC
Mcu.Pin13=VP_RNG_VS_RNG
Mcu.Pin14=VP_SYS_VS_Systick
Mcu.Pin2=PH1-OSC_OUT (PH1)
Mcu.Pin3=PA6
Mcu.Pin4=PA7
Mcu.Pin5=PB0
Mcu.Pin6=PB1
Mcu.Pin7=PB10
Mcu.Pin8=PB11
Mcu.Pin9=PA9
Mcu.PinsNb=15
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32L431RCTx
@ -58,10 +64,6 @@ NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA2.Mode=Single Bank 1
PA2.Signal=QUADSPI_BK1_NCS
PA3.Mode=Single Bank 1
PA3.Signal=QUADSPI_CLK
PA6.Mode=Single Bank 1
PA6.Signal=QUADSPI_BK1_IO3
PA7.Mode=Single Bank 1
@ -72,10 +74,20 @@ PB0.Mode=Single Bank 1
PB0.Signal=QUADSPI_BK1_IO1
PB1.Mode=Single Bank 1
PB1.Signal=QUADSPI_BK1_IO0
PB10.Locked=true
PB10.Mode=Single Bank 1
PB10.Signal=QUADSPI_CLK
PB11.Locked=true
PB11.Mode=Single Bank 1
PB11.Signal=QUADSPI_BK1_NCS
PC13.Locked=true
PC13.Signal=GPIO_Output
PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
PH3-BOOT0.Locked=true
PH3-BOOT0.Signal=GPIO_Input
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
@ -116,7 +128,7 @@ QUADSPI.FifoThreshold=4
QUADSPI.FlashSize=24
QUADSPI.IPParameters=FifoThreshold,ClockPrescaler,FlashSize,ChipSelectHighTime,ClockMode,SampleShifting
QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
RCC.ADCFreq_Value=80000000
RCC.ADCFreq_Value=40000000
RCC.AHBFreq_Value=80000000
RCC.APB1Freq_Value=80000000
RCC.APB1TimFreq_Value=80000000
@ -145,15 +157,15 @@ RCC.PLLN=20
RCC.PLLPoutputFreq_Value=22857142.85714286
RCC.PLLQoutputFreq_Value=80000000
RCC.PLLRCLKFreq_Value=80000000
RCC.PLLSAI1N=20
RCC.PLLSAI1PoutputFreq_Value=22857142.85714286
RCC.PLLSAI1QoutputFreq_Value=80000000
RCC.PLLSAI1RoutputFreq_Value=80000000
RCC.PLLSAI1N=10
RCC.PLLSAI1PoutputFreq_Value=11428571.42857143
RCC.PLLSAI1QoutputFreq_Value=40000000
RCC.PLLSAI1RoutputFreq_Value=40000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.PWRFreq_Value=80000000
RCC.RNGFreq_Value=80000000
RCC.SAI1Freq_Value=22857142.85714286
RCC.SDMMCFreq_Value=80000000
RCC.RNGFreq_Value=40000000
RCC.SAI1Freq_Value=11428571.42857143
RCC.SDMMCFreq_Value=40000000
RCC.SWPMI1Freq_Value=80000000
RCC.SYSCLKFreq_VALUE=80000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
@ -162,11 +174,16 @@ RCC.USART2Freq_Value=80000000
RCC.USART3Freq_Value=80000000
RCC.VCOInputFreq_Value=8000000
RCC.VCOOutputFreq_Value=160000000
RCC.VCOSAI1OutputFreq_Value=160000000
RCC.VCOSAI1OutputFreq_Value=80000000
USART1.BaudRate=1000000
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate,Parity
USART1.Parity=PARITY_EVEN
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate,Parity,WordLength
USART1.Parity=PARITY_NONE
USART1.VirtualMode-Asynchronous=VM_ASYNC
USART1.WordLength=WORDLENGTH_8B
VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC
VP_RNG_VS_RNG.Mode=RNG_Activate
VP_RNG_VS_RNG.Signal=RNG_VS_RNG
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom

3
烧录.bat Normal file
View File

@ -0,0 +1,3 @@
::pyocd flash --erase chip --target CVM0144 -f 10m .\Debug_FLASH\Exe\cva_bootloader_m0146.hex --pack=.\SDK\CVA.M01.1.7.1.pack -u 000000800671ff515256656767161348a5a5a5a597969908
pyocd flash --erase chip --target stm32l431rctx -f 10m .\EWARM\debug\Exe\bootloader.hex -W
pause