OK
This commit is contained in:
parent
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39ac9c0d0d
@ -294,7 +294,7 @@ namespace usb2canfd{
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canconfig.CAN_SJW = 2;
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ret = DllHandle.CAN_Init(AvailableHW[index].hLINHW,channel,canconfig);
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//console.log("init ret = " + ret);
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this.SetFilter(index);
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//this.SetFilter(index);
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}
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canfd_connected = canfd;
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@ -6,29 +6,27 @@ btnConnect={cls="button";text="连接";left=204;top=64;right=289;bottom=90;z=4};
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btnFlash={cls="button";text="开始刷写";left=36;top=329;right=135;bottom=357;z=9};
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btnFresh={cls="button";text="刷新";left=204;top=28;right=288;bottom=54;z=2};
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btnOpen={cls="button";text="打开文件";left=36;top=296;right=135;bottom=324;z=8};
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btnOpenFlashdrv={cls="button";text="打开FlashDriver";left=148;top=296;right=247;bottom=324;z=24};
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btnOpenFlashdrv={cls="button";text="进入BOOT";left=148;top=296;right=247;bottom=324;z=22};
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btnReadF180={cls="button";text="读取boot版本";left=36;top=429;right=135;bottom=457;z=19};
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btnReadF186={cls="button";text="读取当前会话";left=36;top=363;right=135;bottom=391;z=13};
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btnReadF187={cls="button";text="读取型号";left=148;top=429;right=247;bottom=457;z=20};
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btnReadF191={cls="button";text="读取编译日期";left=148;top=362;right=247;bottom=390;z=25};
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btnReadF191={cls="button";text="读取编译日期";left=148;top=362;right=247;bottom=390;z=23};
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btnReadHw={cls="button";text="读取硬件版本号";left=148;top=395;right=247;bottom=423;z=12};
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btnReadSw={cls="button";text="读取软件版本号";left=36;top=396;right=135;bottom=424;z=10};
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btnTest={cls="button";text="停止";left=148;top=330;right=247;bottom=358;z=11};
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cbbChannel={cls="combobox";left=58;top=64;right=191;bottom=90;edge=1;items={};mode="dropdown";z=3};
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cbbDev={cls="combobox";left=58;top=27;right=191;bottom=53;edge=1;items={};mode="dropdown";z=1};
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checkbox={cls="checkbox";text="CANFD设备";left=151;top=101;right=248;bottom=120;checked=1;z=21};
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checkbox={cls="checkbox";text="CANFD设备";left=151;top=101;right=248;bottom=120;z=21};
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edFile={cls="richedit";left=8;top=131;right=288;bottom=187;border=1;disabled=1;edge=1;multiline=1;wrap=1;z=14};
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edFile2={cls="richedit";left=8;top=202;right=288;bottom=258;border=1;disabled=1;edge=1;multiline=1;wrap=1;z=22};
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edit={cls="edit";left=294;top=19;right=596;bottom=401;autovscroll=false;edge=1;multiline=1;vscroll=1;z=5};
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progress={cls="progress";left=296;top=436;right=596;bottom=464;edge=1;max=100;min=0;z=15};
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radiobutton={cls="radiobutton";text="左侧";left=45;top=268;right=121;bottom=288;checked=1;group=1;z=26};
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radiobutton2={cls="radiobutton";text="右侧";left=163;top=268;right=242;bottom=287;z=27};
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radiobutton={cls="radiobutton";text="左侧";left=45;top=268;right=121;bottom=288;checked=1;group=1;z=24};
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radiobutton2={cls="radiobutton";text="右侧";left=163;top=268;right=242;bottom=287;z=25};
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static={cls="static";text="设备";left=1;top=28;right=61;bottom=52;align="center";center=1;transparent=1;z=6};
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static2={cls="static";text="通道";left=1;top=66;right=61;bottom=90;align="center";center=1;transparent=1;z=7};
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static3={cls="static";text="刷写进度";left=296;top=409;right=349;bottom=429;transparent=1;z=16};
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static4={cls="static";text="烧录APP";left=13;top=108;right=85;bottom=132;center=1;transparent=1;z=17};
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static5={cls="static";text="V0.2_20241219";left=451;top=1;right=595;bottom=17;align="right";center=1;transparent=1;z=18};
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static6={cls="static";text="FlashDriver";left=13;top=184;right=101;bottom=207;transparent=1;z=23}
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static5={cls="static";text="V0.2_20241219";left=451;top=1;right=595;bottom=17;align="right";center=1;transparent=1;z=18}
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)
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/*}}*/
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@ -156,8 +154,8 @@ var CanThread = function(){
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DiagReadDID = function(did){
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::PostThreadMessage(thrdId,110,did,0)//自定义消息
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}
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var Diag10Req = function(num){
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::PostThreadMessage(thrdId,111,num,0)//自定义消息
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var Diag10Req = function(phyaddr,num){
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::PostThreadMessage(thrdId,111,phyaddr,num)//自定义消息
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}
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var DiagBootReq = function(){
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::PostThreadMessage(thrdId,102,0,0)//自定义消息
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@ -188,10 +186,7 @@ mainForm.btnFlash.oncommand = function(id,event){
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Display("请打开烧写文件");
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return;
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}
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if(io.exist(mainForm.edFile2.text) == null){
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Display("请打开flashdriver文件");
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return;
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}
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if(flag_connected == 0){
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Display("请连接设备");
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return;
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@ -236,7 +231,8 @@ mainForm.btnReadF187.oncommand = function(id,event){
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}
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mainForm.btnOpenFlashdrv.oncommand = function(id,event){
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::PostThreadMessage(thrdId,104,1,0)//自定义消息-打开flashdriver
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//::PostThreadMessage(thrdId,104,1,0)//自定义消息-打开flashdriver
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Diag10Req(1,0x02);//进入扩展会话
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}
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@ -41,23 +41,13 @@ FuncLoopMsg = function(msg){
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FuncStopBoot();
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}
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case 104 {//打开s19文件
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if(msg.wParam == 1){
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FuncDisplay("打开FlashDriver");
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var ret = FuncOpenS19File(msg.wParam);
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if(ret != null){
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thread.command.$ShowFlashDrvPath(ret);
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var crc32 = FuncGetFlashCRC(1);
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FuncDisplay("CRC = " ++ string.format("%X",crc32));
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}
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}
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else {
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FuncDisplay("打开烧写文件");
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var ret = FuncOpenS19File(msg.wParam);
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if(ret != null){
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thread.command.$ShowPath(ret);
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var crc32 = FuncGetFlashCRC(2);
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FuncDisplay("CRC = " ++ string.format("%X",crc32));
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}
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FuncDisplay("打开烧写文件");
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var ret = FuncOpenS19File(1);
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if(ret != null){
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thread.command.$ShowPath(ret);
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var crc32 = FuncGetFlashCRC(1);
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FuncDisplay("CRC = " ++ string.format("%X",crc32));
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}
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@ -2,6 +2,7 @@
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//发送
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FuncReq34 = function(addr,len){
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FuncDisplay("请求下载"++ tostring(addr,16) ++ "," ++ tostring(len,16))
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var data = {0x44,addr>>24,addr>>16,addr>>8,addr,len>>24,len>>16,len>>8,len};
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var txdata = {0x10,2+#data,0x34,0x00,data[1],data[2],data[3],data[4]};
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CANHw.SendMsg(DiagReqID,txdata);
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@ -120,6 +120,7 @@ FuncSendBlockApp = function(){
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}
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else {
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if(FuncWait(0x34) == 0){
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sleep(200);
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FuncSendBlockApp_sendflag = 0;
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sendblockstate += 1;
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}
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@ -211,7 +212,7 @@ FuncBootSeq = function(){
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else {
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var ret = FuncWait(0x22);
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if(g22data["F187"]!= null){
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if(g22data["F187"] == "RP-77B"){
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if(g22data["F187"] == "WK-K86"){
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nextstate(0);
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}
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else {
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@ -320,6 +321,7 @@ FuncBootSeq = function(){
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var ret = FuncWait(0x27);
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nextstate(ret);
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}
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}
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case 9 {
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if(sendstate == 0){
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@ -334,6 +336,7 @@ FuncBootSeq = function(){
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}
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}
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case 10 {
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/*
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if(sendstate == 0){
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FuncReq31EraseFlash(0x20005BF0,0x800);
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FuncClearState();
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@ -343,9 +346,12 @@ FuncBootSeq = function(){
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var ret = FuncWait(0x31);
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nextstate(ret);
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}
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*/
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nextstate(0);
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}
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case 11 {
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/*
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if(sendstate == 0){//写入installation_date
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FuncReq3103(0xFD01);
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FuncClearState();
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@ -354,8 +360,11 @@ FuncBootSeq = function(){
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var ret = FuncWait(0x31);
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nextstate(ret);
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}
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*/
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nextstate(0);
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}
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case 12 {
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/*
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if(sendstate == 0){//发送数据
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FuncSendBlockInit(1);
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FuncDisplay("开始发送FlashDrv数据");
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@ -365,8 +374,11 @@ FuncBootSeq = function(){
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var ret = FuncSendBlockApp();
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nextstate(ret);
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}
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*/
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nextstate(0);
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}
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case 13 {
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/*
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if(sendstate == 0){//CheckLogicBlock
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//var crc = FuncGetFlashCRC(0);
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//FuncReq31CheckLogicBlock(crc);
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@ -377,18 +389,11 @@ FuncBootSeq = function(){
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var ret = FuncWait(0x31);
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nextstate(ret);
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}
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*/
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nextstate(0);
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}
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case 14 {
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if(sendstate == 0){//
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FuncReq3103(0xFD02);
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FuncClearState();
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}
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else {
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var ret = FuncWait(0x31);
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nextstate(ret);
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}
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}
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case 15 {
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if(sendstate == 0){//CheckLogicBlock
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FuncReq31EraseFlash(0x00010000,0x28000);
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FuncClearState();
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@ -398,10 +403,32 @@ FuncBootSeq = function(){
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nextstate(ret);
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}
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}
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case 15 {
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/*
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if(sendstate == 0){//
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FuncReq3103(0xFD02);
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FuncClearState();
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}
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else {
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var ret = FuncWait(0x31);
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nextstate(ret);
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}
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*/
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if(sendstate == 0){//等待复位完成
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delaycount = 0;
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FuncClearState();
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}
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else {
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delaycount += 1;
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if(delaycount > 20){
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nextstate(0);//延时0.1S
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}
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}
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}
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case 16 {
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if(sendstate == 0){//发送数据
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FuncSendBlockInit(2);
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FuncSendBlockInit(1);
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FuncDisplay("开始发送App数据");
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FuncClearState();
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}
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4
cva_asw_m0118/.vscode/settings.json
vendored
4
cva_asw_m0118/.vscode/settings.json
vendored
@ -20,6 +20,8 @@
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"files.associations": {
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"canuser.h": "c",
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"apptask.h": "c",
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"mcu.h": "c"
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"mcu.h": "c",
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"key.h": "c",
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"hwctrl.h": "c"
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}
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}
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@ -357,7 +357,6 @@
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<state>$PROJ_DIR$\SDK\middleware\uds\user</state>
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<state>$PROJ_DIR$\SDK\lib\shared\common\stimer</state>
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<state>$PROJ_DIR$\src\private_driver\drivers\cpu\startup</state>
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<state>$PROJ_DIR$\src\TLE9461</state>
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<state>$PROJ_DIR$\src</state>
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<state>$PROJ_DIR$\src\RTT</state>
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</option>
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@ -691,7 +690,7 @@
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<data>
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<extensions></extensions>
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<cmdline></cmdline>
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<hasPrio>192</hasPrio>
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<hasPrio>56</hasPrio>
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<buildSequence>inputOutputBased</buildSequence>
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</data>
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</settings>
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@ -1770,30 +1769,6 @@
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<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
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</file>
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</group>
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<group>
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<name>TLE9461</name>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\SBC_TLE94x1.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_DEFINES.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_ISR.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.h</name>
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</file>
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</group>
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<group>
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<name>user</name>
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<file>
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@ -1808,6 +1783,9 @@
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<file>
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<name>$PROJ_DIR$\src\hwctrl.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\key.c</name>
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</file>
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</group>
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</group>
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<file>
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@ -2100,30 +2100,6 @@
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<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
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</file>
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</group>
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<group>
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<name>TLE9461</name>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\SBC_TLE94x1.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_DEFINES.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_ISR.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.h</name>
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</file>
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</group>
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<group>
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<name>user</name>
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<file>
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@ -2138,6 +2114,9 @@
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<file>
|
||||
<name>$PROJ_DIR$\src\hwctrl.c</name>
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</file>
|
||||
<file>
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<name>$PROJ_DIR$\src\key.c</name>
|
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</file>
|
||||
</group>
|
||||
</group>
|
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<file>
|
||||
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@ -25,7 +25,7 @@ if not "%~1" == "" goto debugFile
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@echo on
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"E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --backend -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
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"D:\software\IAR\common\bin\cspybat" -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --backend -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
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@echo off
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goto end
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@ -34,7 +34,7 @@ goto end
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@echo on
|
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|
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"E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" "--debug_file=%~1" --backend -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
|
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"D:\software\IAR\common\bin\cspybat" -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" "--debug_file=%~1" --backend -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
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|
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@echo off
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:end
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@ -23,9 +23,9 @@
|
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|
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if ($debugfile -eq "")
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{
|
||||
& "E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --backend -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
|
||||
& "D:\software\IAR\common\bin\cspybat" -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --backend -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
|
||||
}
|
||||
else
|
||||
{
|
||||
& "E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --debug_file=$debugfile --backend -f "F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
|
||||
& "D:\software\IAR\common\bin\cspybat" -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.general.xcl" --debug_file=$debugfile --backend -f "E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\settings\cva_asw_m0118.Debug.driver.xcl"
|
||||
}
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
"-p"
|
||||
|
||||
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\config\debugger\CVAChip\CVM0118.ddf"
|
||||
"D:\software\IAR\arm\config\debugger\CVAChip\CVM0118.ddf"
|
||||
|
||||
"--semihosting"
|
||||
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armPROC.dll"
|
||||
"D:\software\IAR\arm\bin\armPROC.dll"
|
||||
|
||||
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armJLINK.dll"
|
||||
"D:\software\IAR\arm\bin\armJLINK.dll"
|
||||
|
||||
"F:\FCB_project\RP-77\CVM0118BOOT\cva_asw_m0118\Debug_FLASH\Exe\cva_asw_m0118.out"
|
||||
"E:\work\wk\K86\CVM0118BOOT\cva_asw_m0118\Debug_FLASH\Exe\cva_asw_m0118.out"
|
||||
|
||||
--plugin="E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armbat.dll"
|
||||
--plugin="D:\software\IAR\arm\bin\armbat.dll"
|
||||
|
||||
|
||||
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
</Stack>
|
||||
<PlDriver>
|
||||
<FirstRun>0</FirstRun>
|
||||
<MemConfigValue>E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\config\debugger\CVAChip\CVM0118.ddf</MemConfigValue>
|
||||
<MemConfigValue>D:\software\IAR\arm\config\debugger\CVAChip\CVM0118.ddf</MemConfigValue>
|
||||
</PlDriver>
|
||||
<ArmDriver>
|
||||
<EnforceMemoryConfiguration>1</EnforceMemoryConfiguration>
|
||||
@ -47,13 +47,13 @@
|
||||
<ShowArgs>0</ShowArgs>
|
||||
</CallStack>
|
||||
<JLinkDriver>
|
||||
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
|
||||
<CStepIntDis>_ 0</CStepIntDis>
|
||||
<jlinkResetStyle>12</jlinkResetStyle>
|
||||
<jlinkResetStrategy>0</jlinkResetStrategy>
|
||||
<TraceBufferSize>0x10000</TraceBufferSize>
|
||||
<TraceStallIfFIFOFull>0x0</TraceStallIfFIFOFull>
|
||||
<TracePortSize>0x0</TracePortSize>
|
||||
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
|
||||
<CStepIntDis>_ 0</CStepIntDis>
|
||||
</JLinkDriver>
|
||||
<Trace2>
|
||||
<Enabled>0</Enabled>
|
||||
|
||||
File diff suppressed because one or more lines are too long
@ -1,101 +0,0 @@
|
||||
/**
|
||||
* @cond
|
||||
***********************************************************************************************************************
|
||||
*
|
||||
* Copyright (c) 2018, Infineon Technologies AG
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
|
||||
* following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
|
||||
* disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
|
||||
* following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
|
||||
* products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
**********************************************************************************************************************/
|
||||
#ifndef SBC_TLE94X1_H
|
||||
#define SBC_TLE94X1_H
|
||||
|
||||
/* XML Version 0.0.6 */
|
||||
#define SBC_XML_VERSION (00006)
|
||||
|
||||
#define CTRL_BUS_CTRL_0 (0x3) /*decimal 3*/
|
||||
|
||||
#define CTRL_BUS_CTRL_3 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_GPIO_CTRL (0x4) /*decimal 4*/
|
||||
|
||||
#define CTRL_HW_CTRL_0 (0x40) /*decimal 64*/
|
||||
|
||||
#define CTRL_HW_CTRL_1 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_HW_CTRL_2 (0x40) /*decimal 64*/
|
||||
|
||||
#define CTRL_HW_CTRL_3 (0x1) /*decimal 1*/
|
||||
|
||||
#define CTRL_M_S_CTRL (0x13) /*decimal 19*/
|
||||
|
||||
#define CTRL_PWM_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_PWM_FREQ_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_BTL0_CTRL (0x50) /*decimal 80*/
|
||||
|
||||
#define CTRL_SWK_CAN_FD_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_CDR_CTRL2 (0x1) /*decimal 1*/
|
||||
|
||||
#define CTRL_SWK_CDR_LIMIT_HIGH_CTRL (0x54) /*decimal 84*/
|
||||
|
||||
#define CTRL_SWK_CDR_LIMIT_LOW_CTRL (0x4C) /*decimal 76*/
|
||||
|
||||
#define CTRL_SWK_DATA_H_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_DATA_L_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_DLC_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_ID0_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_IDx_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_MASK_IDx_CTRL 0x00000000
|
||||
|
||||
#define CTRL_TIMER_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WD_CTRL (0x15) /*decimal 21*/
|
||||
|
||||
#define CTRL_WK_CTRL_0 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WK_CTRL_1 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WK_PUPD_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define LED_Math_extendedID (0x1) /*decimal 1*/
|
||||
|
||||
#define LED_Math_extendedIDMsk (0x1) /*decimal 1*/
|
||||
|
||||
#define MATH_Baudrate (0x2) /*decimal 2*/
|
||||
|
||||
#define MATH_CDR_FrequencyMHz (0x28) /*decimal 40*/
|
||||
|
||||
#define MATH_DoubleCDRFreq (0x0) /*decimal 0*/
|
||||
|
||||
#define MATH_EN_PN (0x1) /*decimal 1*/
|
||||
|
||||
#define MATH_PWM_DC (0.0)
|
||||
|
||||
#endif /* SBC_TLE94X1_H */
|
||||
@ -1,233 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<icwpxml version="2.6.4">
|
||||
<checksum>9e8e9087eecb39921ec31dfccce96b2a2efec664bafe2827aea4ddb51cb86761</checksum>
|
||||
<XmlFile>TLE94x1_Lib.xml</XmlFile>
|
||||
<XmlVersion>V0.0.6</XmlVersion>
|
||||
<ActiveElements>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_2[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WK_PUPD_CTRL[7:6]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.PWM_FREQ_CTRL[1:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<DoubleSpinBox>
|
||||
<define>MATH.PWM_DC</define>
|
||||
<value>0</value>
|
||||
<dispValue>0.0</dispValue>
|
||||
</DoubleSpinBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[7]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.BUS_CTRL_3[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WK_PUPD_CTRL[1:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_0[6]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.TIMER_CTRL[3:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.TIMER_CTRL[6:4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_3[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ButtonGroup>
|
||||
<define>CTRL.WD_CTRL[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ButtonGroup>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_2[7:5]</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_2[3:2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.SWK_CAN_FD_CTRL[3:1]</define>
|
||||
<value>2</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>MATH.Baudrate</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.SWK_ID0_CTRL[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_MASK_IDx_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0</dispValue>
|
||||
</LineEdit>
|
||||
<ComboBox>
|
||||
<define>CTRL.SWK_DLC_CTRL[3:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_DATA_H_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0x00000000</dispValue>
|
||||
</LineEdit>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_DATA_L_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0x00000000</dispValue>
|
||||
</LineEdit>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[3]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_2[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.M_S_CTRL[4:3]</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>MATH.EN_PN</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_3[1:0]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[6]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.SWK_CAN_FD_CTRL[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>MATH.DoubleCDRFreq</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_IDx_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0</dispValue>
|
||||
</LineEdit>
|
||||
<ComboBox>
|
||||
<define>CTRL.GPIO_CTRL[2:0]</define>
|
||||
<value>4</value>
|
||||
<dispValue>4</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_0[2];CTRL.WD_CTRL[6]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WD_CTRL[4]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WD_CTRL[2:0]</define>
|
||||
<value>5</value>
|
||||
<dispValue>5</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.M_S_CTRL[1:0]</define>
|
||||
<value>3</value>
|
||||
<dispValue>3</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[7]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.M_S_CTRL[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.BUS_CTRL_0[2:0]</define>
|
||||
<value>3</value>
|
||||
<dispValue>3</dispValue>
|
||||
</ComboBox>
|
||||
</ActiveElements>
|
||||
</icwpxml>
|
||||
@ -1,591 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1.c
|
||||
*
|
||||
* @brief Implementation of main library functions
|
||||
*
|
||||
* @version V1.0.1
|
||||
* @date 05. October 2020
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
********************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1.h"
|
||||
#include "SBC_TLE94x1.h"
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================== Variables ================================= */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/* -------------------------------- ISR Handling --------------------------------- */
|
||||
|
||||
static SBC_Func_Callback SBC_ISR_Callbacks[30];
|
||||
static uint32_t SBC_ISR_Vectors[30];
|
||||
static uint8_t SBC_ISR_ReadOutRegs[30];
|
||||
static uint8_t SBC_ISR_ReadOutVals[30];
|
||||
static uint8_t SBC_RegisteredCallbacks = 0;
|
||||
static uint8_t SBC_RegisteredRedoutRegs = 0;
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* =========================== Library Functions ============================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/* -------------------------------- Main Functions ------------------------------- */
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WD_Trigger(void) {
|
||||
/* Read WD config out of SBC and write back to trigger WD */
|
||||
uint8_t WD_Data = (uint8_t)SBC_Read_Command(SBC_WD_CTRL);
|
||||
return SBC_Write_Reg(SBC_WD_CTRL, WD_Data, NULL);
|
||||
}
|
||||
|
||||
|
||||
uint16_t SBC_Read_Command(uint8_t SBC_Reg) {
|
||||
/* Read and return data - Bit[15:8] = Status Information Field - Bit [7:0] Register data */
|
||||
return SBC_SPI_TRANSFER16(SBC_Read_Mask & SBC_Reg, 0x00U);
|
||||
}
|
||||
|
||||
|
||||
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos) {
|
||||
uint8_t data = ((uint8_t)SBC_Read_Command(SBC_Reg)) & 0xFFU;
|
||||
return (data & SBC_FieldMsk) >> SBC_FieldPos;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval) {
|
||||
SBC_ErrorCode errCode;
|
||||
uint16_t returndata = SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, SBC_Val);
|
||||
if(returnval != NULL) {
|
||||
*returnval = returndata;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = SBC_Reg;
|
||||
errCode.flippedBitsMask = ((uint8_t)SBC_Read_Command(SBC_Reg)) ^ SBC_Val;
|
||||
errCode.expectedValue = SBC_Val;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Read data out of register to be manipulated */
|
||||
uint16_t returndata = SBC_Read_Command(SBC_Reg);
|
||||
if(returnval != NULL) {
|
||||
*returnval = returndata;
|
||||
}
|
||||
uint8_t data = (uint8_t)returndata;
|
||||
|
||||
/* Set the used bit field to all 0 */
|
||||
data &= ~(SBC_FieldMsk);
|
||||
|
||||
/* Configure new data to bit field */
|
||||
data |= (SBC_FieldVal << SBC_FieldPos);
|
||||
|
||||
(void)SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, data);
|
||||
|
||||
errCode.SBC_Register = SBC_Reg;
|
||||
errCode.expectedValue = (SBC_FieldVal << SBC_FieldPos);
|
||||
uint8_t actualValue = ((uint8_t)SBC_Read_Command(SBC_Reg)) & SBC_FieldMsk;
|
||||
errCode.flippedBitsMask = errCode.expectedValue ^ actualValue;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Init(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
uint8_t WD_Checksum = CTRL_WD_CTRL;
|
||||
uint8_t WD_CTRL = CTRL_WD_CTRL;
|
||||
uint8_t SWK_ID3_CTRL, SWK_ID2_CTRL, SWK_ID1_CTRL, SWK_ID0_CTRL;
|
||||
uint8_t SWK_MASK_ID3_CTRL, SWK_MASK_ID2_CTRL, SWK_MASK_ID1_CTRL, SWK_MASK_ID0_CTRL;
|
||||
uint8_t SWK_CAN_FD_CTRL = CTRL_SWK_CAN_FD_CTRL;
|
||||
|
||||
/* Calculate checksum */
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 4;
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 2;
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 1;
|
||||
|
||||
if((WD_Checksum & 1) > 0) {
|
||||
/* Set parity bit */
|
||||
WD_CTRL = CTRL_WD_CTRL | 0x80U;
|
||||
}
|
||||
|
||||
/* Check if ID is configured to be extended */
|
||||
if((CTRL_SWK_ID0_CTRL & SBC_SWK_ID0_CTRL_IDE_Msk) == SBC_IDE_EXTENDED) {
|
||||
/* extended ID */
|
||||
uint32_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL << 3;
|
||||
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL << 3;
|
||||
|
||||
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 24);
|
||||
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL >> 16);
|
||||
SWK_ID1_CTRL = (uint8_t)(SWK_ID_CTRL >> 8);
|
||||
SWK_ID0_CTRL = (((uint8_t)(SWK_ID_CTRL >> 1)) & SBC_SWK_ID0_CTRL_ID4_0_Msk) | SBC_IDE_EXTENDED;
|
||||
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 24);
|
||||
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 16);
|
||||
SWK_MASK_ID1_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 8);
|
||||
SWK_MASK_ID0_CTRL = (((uint8_t)(SWK_MASK_ID_CTRL >> 1)) & SBC_SWK_MASK_ID0_CTRL_MASK_ID4_0_Msk);
|
||||
} else {
|
||||
/* Standard length ID */
|
||||
uint16_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL;
|
||||
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL;
|
||||
|
||||
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 3);
|
||||
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL << 5);
|
||||
SWK_ID1_CTRL = 0x00U;
|
||||
SWK_ID0_CTRL = 0x00U;
|
||||
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 3);
|
||||
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL << 5);
|
||||
SWK_MASK_ID1_CTRL = 0x00U;
|
||||
SWK_MASK_ID0_CTRL = 0x00U;
|
||||
}
|
||||
|
||||
/* DIS_ERR_CNT is set only when FD Tolerance is set. */
|
||||
if((CTRL_SWK_CAN_FD_CTRL & SBC_SWK_CAN_FD_CTRL_CAN_FD_EN_Msk) == SBC_CAN_FD_EN_ENABLED) {
|
||||
SWK_CAN_FD_CTRL &= SBC_DIS_ERR_CNT_DISABLED << SBC_SWK_CAN_FD_CTRL_DIS_ERR_CNT_Pos;
|
||||
}
|
||||
|
||||
/* Describes initialization sequence */
|
||||
uint8_t initSequence[39][2] = {
|
||||
{SBC_WD_CTRL, WD_CTRL},
|
||||
{SBC_M_S_CTRL, CTRL_M_S_CTRL},
|
||||
{SBC_HW_CTRL_0, CTRL_HW_CTRL_0},
|
||||
{SBC_HW_CTRL_3, CTRL_HW_CTRL_3},
|
||||
{SBC_BUS_CTRL_3, CTRL_BUS_CTRL_3},
|
||||
{SBC_WK_CTRL_0, CTRL_WK_CTRL_0},
|
||||
{SBC_WK_CTRL_1, CTRL_WK_CTRL_1},
|
||||
{SBC_WK_PUPD_CTRL, CTRL_WK_PUPD_CTRL},
|
||||
{SBC_TIMER_CTRL, CTRL_TIMER_CTRL},
|
||||
{SBC_PWM_FREQ_CTRL, CTRL_PWM_FREQ_CTRL}, /* The desired duty cycle should be set first before GPIO is enabled as PWM HS or PWM LS. */
|
||||
{SBC_PWM_CTRL, CTRL_PWM_CTRL},
|
||||
{SBC_GPIO_CTRL, CTRL_GPIO_CTRL},
|
||||
{SBC_HW_CTRL_1, CTRL_HW_CTRL_1}, /* May lock configuration (CFG_LOCK_0) */
|
||||
{SBC_HW_CTRL_2, CTRL_HW_CTRL_2}, /* May lock configuration (CFG_LOCK_1) */
|
||||
{SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0},
|
||||
|
||||
/* -------------------------- SELECTIVE WAKE REGISTERS --------------------------- */
|
||||
|
||||
/* Configuring CDR */
|
||||
{SBC_SWK_CDR_CTRL2, CTRL_SWK_CDR_CTRL2},
|
||||
{SBC_SWK_BTL0_CTRL, CTRL_SWK_BTL0_CTRL},
|
||||
{SBC_SWK_CDR_LIMIT_HIGH_CTRL, CTRL_SWK_CDR_LIMIT_HIGH_CTRL},
|
||||
{SBC_SWK_CDR_LIMIT_LOW_CTRL, CTRL_SWK_CDR_LIMIT_LOW_CTRL},
|
||||
{SBC_SWK_CDR_CTRL1, (SBC_SEL_FILT_TC16 << SBC_SWK_CDR_CTRL1_SEL_FILT_Pos) | (SBC_CDR_EN_ENABLED << SBC_SWK_CDR_CTRL1_CDR_EN_Pos)},
|
||||
|
||||
|
||||
/* Set ID */
|
||||
{SBC_SWK_ID3_CTRL, SWK_ID3_CTRL},
|
||||
{SBC_SWK_ID2_CTRL, SWK_ID2_CTRL},
|
||||
{SBC_SWK_ID1_CTRL, SWK_ID1_CTRL},
|
||||
{SBC_SWK_ID0_CTRL, SWK_ID0_CTRL},
|
||||
|
||||
/* Set Mask */
|
||||
{SBC_SWK_MASK_ID3_CTRL, SWK_MASK_ID3_CTRL},
|
||||
{SBC_SWK_MASK_ID2_CTRL, SWK_MASK_ID2_CTRL},
|
||||
{SBC_SWK_MASK_ID1_CTRL, SWK_MASK_ID1_CTRL},
|
||||
{SBC_SWK_MASK_ID0_CTRL, SWK_MASK_ID0_CTRL},
|
||||
|
||||
/* Set Data */
|
||||
{SBC_SWK_DATA7_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 24)},
|
||||
{SBC_SWK_DATA6_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 16)},
|
||||
{SBC_SWK_DATA5_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 8)},
|
||||
{SBC_SWK_DATA4_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 0)},
|
||||
{SBC_SWK_DATA3_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 24)},
|
||||
{SBC_SWK_DATA2_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 16)},
|
||||
{SBC_SWK_DATA1_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 8)},
|
||||
{SBC_SWK_DATA0_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 0)},
|
||||
|
||||
/* Set DLC */
|
||||
{SBC_SWK_DLC_CTRL, CTRL_SWK_DLC_CTRL},
|
||||
|
||||
{SBC_SWK_CAN_FD_CTRL, SWK_CAN_FD_CTRL},
|
||||
|
||||
/* End Configuration */
|
||||
{0x00U, 0x00U}
|
||||
};
|
||||
|
||||
/* Call SPI Init */
|
||||
if(SBC_SPI_INIT() != 0) {
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0xFF;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
};
|
||||
|
||||
uint8_t i = 0;
|
||||
|
||||
/* Write all initialization items to Lite SBC */
|
||||
while(initSequence[i][0] != 0x00U || initSequence[i][1] != 0x00U) {
|
||||
errCode = SBC_Write_Reg(initSequence[i][0], initSequence[i][1], NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- ISR Functions -------------------------------- */
|
||||
|
||||
|
||||
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler)) {
|
||||
/* Save callback */
|
||||
SBC_ISR_Callbacks[SBC_RegisteredCallbacks] = Callback_Handler;
|
||||
|
||||
/* Save callback vector */
|
||||
SBC_ISR_Vectors[SBC_RegisteredCallbacks] = ISR_Vector;
|
||||
|
||||
/* Check if the register will be readout already to avoid double-readout later */
|
||||
uint8_t RegFound = 0;
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
if (SBC_ISR_ReadOutRegs[i] == (ISR_Vector >> 24)) {
|
||||
RegFound = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* If readout status-reg was not found, register in the readout list */
|
||||
if (RegFound == 0) {
|
||||
SBC_ISR_ReadOutRegs[SBC_RegisteredRedoutRegs] = (uint8_t)(ISR_Vector >> 24);
|
||||
SBC_RegisteredRedoutRegs++;
|
||||
}
|
||||
|
||||
SBC_RegisteredCallbacks++;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_ISR(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Readout all registered status-registers */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
SBC_ISR_ReadOutVals[i] = (uint8_t) SBC_Read_Command(SBC_ISR_ReadOutRegs[i]);
|
||||
}
|
||||
|
||||
/* Handle all interrupts */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredCallbacks; i++) {
|
||||
/* Decode ISR Vector */
|
||||
uint8_t Compare = (uint8_t)SBC_ISR_Vectors[i];
|
||||
uint8_t FieldPos = (uint8_t)(SBC_ISR_Vectors[i] >> 8);
|
||||
uint8_t FieldMsk = (uint8_t)(SBC_ISR_Vectors[i] >> 16);
|
||||
uint8_t RegAddr = (uint8_t)(SBC_ISR_Vectors[i] >> 24);
|
||||
|
||||
/* Readback of associated status-bit */
|
||||
uint8_t ReadBack = 0;
|
||||
for (uint8_t j = 0; j < SBC_RegisteredRedoutRegs; j++) {
|
||||
if (SBC_ISR_ReadOutRegs[j] == RegAddr) {
|
||||
ReadBack = SBC_ISR_ReadOutVals[j];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* If compare-values matched -> proceed callback and clear field */
|
||||
if (((ReadBack & FieldMsk) >> FieldPos) == Compare) {
|
||||
SBC_ISR_Callbacks[i](ReadBack);
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear all ISR related registers */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
errCode = SBC_Write_Reg(SBC_ISR_ReadOutRegs[i], 0x00U, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00U;
|
||||
errCode.flippedBitsMask = 0x00U;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- API Calls ----------------------------------- */
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Normal(void) {
|
||||
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_NORMAL, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Stop(void) {
|
||||
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_STOP, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Sleep(void) {
|
||||
uint8_t registerReadOut;
|
||||
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* If CAN PN is configured */
|
||||
if(MATH_EN_PN != 0) {
|
||||
|
||||
/* Reading value of SWK_STAT. */
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
|
||||
|
||||
/* CAN Protocol Handler in sync? The selective wake routine should be aborted if sync is not set. Note: for SYNC to be set the transceiver must have been in Normal Mode and a valid CAN communication must have been sent on the bus by any node. */
|
||||
if((registerReadOut & SBC_SWK_STAT_SYNC_Msk) >> SBC_SWK_STAT_SYNC_Pos != SBC_SYNC_VALID_FRAME_RECEIVED) {
|
||||
errCode.SBC_Register = SBC_SWK_STAT;
|
||||
errCode.flippedBitsMask = SBC_SWK_STAT_SYNC_Msk;
|
||||
errCode.expectedValue = SBC_SYNC_VALID_FRAME_RECEIVED << SBC_SWK_STAT_SYNC_Pos;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Set SWK Configuration valid */
|
||||
errCode = SBC_Write_RegField(SBC_SWK_CTRL, SBC_SWK_CTRL_CFG_VAL_Msk, SBC_SWK_CTRL_CFG_VAL_Pos, SBC_CFG_VAL_VALID, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
/* Clear SYSERR bit */
|
||||
errCode = SBC_Write_RegField(SBC_BUS_STAT, SBC_BUS_STAT_SYSERR_Msk, SBC_BUS_STAT_SYSERR_Pos, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Set CAN Mode to off and once again to desired configuration */
|
||||
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, 0x03, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Check SWK_STAT for SYNC == 1 && SWK_SET == 1 && WUF == 0 && WUP == 0. Ignore CANSIL */
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
|
||||
if( ((SBC_SWK_STAT_SYNC_Msk & registerReadOut) == SBC_SWK_STAT_SYNC_Msk)
|
||||
&& ((SBC_SWK_STAT_SWK_SET_Msk & registerReadOut) == SBC_SWK_STAT_SWK_SET_Msk)
|
||||
&& ((SBC_SWK_STAT_WUP_Msk & registerReadOut) != SBC_SWK_STAT_WUP_Msk)
|
||||
&& ((SBC_SWK_STAT_WUF_Msk & registerReadOut) != SBC_SWK_STAT_WUF_Msk)) {
|
||||
/* Empty */
|
||||
} else {
|
||||
errCode.SBC_Register = SBC_SWK_STAT;
|
||||
errCode.expectedValue = 0b01000100U;
|
||||
errCode.flippedBitsMask = errCode.expectedValue ^ registerReadOut;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Clear Wake Status Registers, so that SBC can sleep. */
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Select sleep mode */
|
||||
(void)SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_SLEEP, NULL);
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_M_S_CTRL);
|
||||
|
||||
/* This piece of code is ideally never reached as the microcontroller should be already turned off then */
|
||||
if(registerReadOut != 0) {
|
||||
errCode.SBC_Register = SBC_M_S_CTRL;
|
||||
errCode.flippedBitsMask = registerReadOut;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00U;
|
||||
errCode.flippedBitsMask = 0x00U;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_DutyCycle_PWM (uint8_t PWM_DC) {
|
||||
return SBC_Write_Reg(SBC_PWM_CTRL, PWM_DC, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_Timer_On (uint8_t OnTime) {
|
||||
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_ON_Msk, SBC_TIMER_CTRL_TIMER_ON_Pos, OnTime, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_Timer_Period (uint8_t Period) {
|
||||
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_PER_Msk, SBC_TIMER_CTRL_TIMER_PER_Pos, Period, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_FO_Test_On(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_ACTIVE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_FO_Test_Off(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_NOT_ACTIVE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_CP_On(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_ON, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_CP_Off(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_OFF, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WK_MEAS_On(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_VOLTAGESENSING, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WK_MEAS_Off(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_WAKEUP, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_On(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKESOURCE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKEUP_DISABLED, NULL);
|
||||
}
|
||||
|
||||
|
||||
uint16_t SBC_SYS_STAT_Read(void) {
|
||||
uint16_t systemStatus = 0;
|
||||
uint16_t returndata = SBC_Read_Command(SBC_SYS_STATUS_CTRL_0);
|
||||
systemStatus = returndata & 0x00FFU;
|
||||
systemStatus |= SBC_Read_Command(SBC_SYS_STATUS_CTRL_1) << 8;
|
||||
return systemStatus;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Write lower bits */
|
||||
errCode = SBC_Write_Reg(SBC_SYS_STATUS_CTRL_0, (uint8_t)SystemStatus, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Write higher bits */
|
||||
return SBC_Write_Reg(SBC_SYS_STATUS_CTRL_1, (uint8_t)(SystemStatus >> 8), NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Lock_Configuration(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Lock CP_EN and GPIO cannot be modified */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_LOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Lock Bits with bit type ‘rwl’ (except CP_EN and GPIO) until next device power-up. */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_LOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Unlock_Configuration(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Unlock CP_EN and GPIO configuration. */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_NOTLOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Unlock Bits with bit type ‘rwl’ (except CP_EN and GPIO). */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_NOTLOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
SBC_ErrorCode SBC_Clear_Wake_Status(void) {
|
||||
SBC_ErrorCode errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask != 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask != 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
@ -1,393 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1.h
|
||||
*
|
||||
* @brief Main header declaration file for TLE94x1 SBC family device
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_H
|
||||
#define TLE94x1_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
|
||||
#include "TLE94x1_DEFINES.h"
|
||||
#include "TLE94x1_ISR.h"
|
||||
#include "TLE94x1_SPI.h"
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ================================ MACROS ================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/**
|
||||
* @def SBC_Write_Bit
|
||||
*
|
||||
* @brief This bit has to be set in order to write to a register.
|
||||
*/
|
||||
#define SBC_Write_Bit (0x80U)
|
||||
|
||||
/**
|
||||
* @def SBC_Read_Mask
|
||||
*
|
||||
* @brief A mask to prevent the user from accidentally writing to a register.
|
||||
*/
|
||||
#define SBC_Read_Mask (0x7FU)
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* =========================== Library Functions ============================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
struct __SBC_ErrorCode;
|
||||
|
||||
/**
|
||||
* @brief A structure for simple error readout.
|
||||
*
|
||||
* flippedBitsMask is greater than 0 if the value read from the register at SBC_Register differs from expectedValue.
|
||||
*/
|
||||
typedef struct __SBC_ErrorCode {
|
||||
uint8_t SBC_Register; //!< The register where an error occurred.
|
||||
uint8_t flippedBitsMask; //!< Masks the bits that differ from the expected value. Is 0 if readout is as expected.
|
||||
uint8_t expectedValue; //!< Expected readout of the register.
|
||||
} SBC_ErrorCode;
|
||||
|
||||
/**
|
||||
* @brief Typedef for interrupt callbacks.
|
||||
*/
|
||||
typedef void (*SBC_Func_Callback)(uint8_t callbackHandler);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- Main Functions ------------------------------- */
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will trigger the watchdog.
|
||||
*
|
||||
* The function must be called periodically according to the configured watchdog-time.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WD_Trigger(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will proceed a readout of a register.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be read out. See TLE94x1_DEFINES.h for definitions
|
||||
* @retval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the read register-value.
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*/
|
||||
uint16_t SBC_Read_Command(uint8_t SBC_Reg);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will proceed a readout of a dedicated bitfield within a register
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldMsk Bit mask of the field to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldPos Bit position of the field to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
*
|
||||
*
|
||||
* @retval A 8 bit value will be returned and includes the data of the bitfield to be read out *
|
||||
*/
|
||||
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Writes a whole byte to a register and verifies it.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_Val Byte to write to SBC_Reg
|
||||
* @param *returnval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*
|
||||
* @retval See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method can be used for manipulating a single bit-field in a control-register.
|
||||
*
|
||||
* It will readout the old value of the registers, manipulate the desired bit-field and keep
|
||||
* the other bit-configuration as it was.
|
||||
* For usage examples have a look at the implementations of different API calls below.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldMsk Bit mask of the field to manipulate. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldPos Bit position of the field to manipulate. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldVal New value which will be written to the bit-field. See TLE94x1_DEFINES.h for enumerations
|
||||
* @param *returnval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*
|
||||
*/
|
||||
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method must be called one time at startup of the microcontroller.
|
||||
*
|
||||
* This method will initialize all registers of the SBC with the configuration-data of SBC_TLE94x1.h.
|
||||
* After this, the SBC can be used as normal.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Init(void);
|
||||
|
||||
/* -------------------------------- ISR Functions -------------------------------- */
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function can register a self-defined function to a specific interrupt-event of the SBC.
|
||||
*
|
||||
* Everytime the SBC_ISR() method is called and the associated status-bit is set, it will consider to
|
||||
* proceed a callback to this function later.
|
||||
* See all the possible ISR_Vectors in the TLE94x1_ISR.h
|
||||
*
|
||||
*
|
||||
* @param ISR_Vector Definition of the interrupt event. See all possible events in TLE94x1_ISR.h
|
||||
*
|
||||
* @param *Callback_Handler Pointer to the function which will be called back.
|
||||
* The function must accept a uint8_t as first argument.
|
||||
*/
|
||||
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler));
|
||||
|
||||
|
||||
/**
|
||||
* @brief Interrupt Service Routine for handling interrupts.
|
||||
*
|
||||
* This method must be called automatically everytime a rising-edge on the INTN pin is recognized.
|
||||
* In case, the INTN pin is not connected, this method can also be called periodically by the user during runtime.
|
||||
* The ISR will proceed a readout of all registered interrupts. If a status-bit of a registered interrupt is set,
|
||||
* it will initiate a callback to the registered function and give the registered function the status-register value
|
||||
* as a parameter.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_ISR(void);
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- API Calls ----------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enters SBC normal mode
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Normal(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enters SBC stop mode
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Stop(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clears all wake status registers and enter SBC sleep mode. Depending on configuration also the selective-wake feature will be initialized
|
||||
* before entering sleep mode. In case, the SWK option is enabled and the internal CAN protocol handler is not in sync when calling this function,
|
||||
* the sleep mode will be not entered.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Sleep(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the duty-cycle of the internal PWM generator
|
||||
*
|
||||
* @param PWM_DC Set the duty-cycle with values of 0-255 for 0% to 100%
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_DutyCycle_PWM(uint8_t PWM_DC);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the OnTime of the internal timer.
|
||||
*
|
||||
* @param OnTime On time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_Timer_On(uint8_t OnTime);
|
||||
|
||||
/**
|
||||
* @brief Sets the Period time of the internal timer
|
||||
*
|
||||
* @param Period Period time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_Timer_Period(uint8_t Period);
|
||||
|
||||
|
||||
/**
|
||||
* @brief FO output activated by software for testing. Only working if FO/GPIO is configured as FO
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_FO_Test_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief FO output deactivated by software for testing. Only working if FO/GPIO is configured as FO
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_FO_Test_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Charge-Pump (VCP-Pin) is enabled. See chapter 5.3 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_CP_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Charge-Pump (VCP-Pin) is disabled. See chapter 5.3 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_CP_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable Voltage Sensing. No wake-up events are generated. See chapter 9.2.4 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WK_MEAS_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Disable Voltage Sensing and enable wake-up functionality. See chapter 9.2.4 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WK_MEAS_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief WK is enabled as wake source. See chapter 5.2.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief WK wake-up disabled. See chapter 5.2.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reads System Status Control, both lower and higher bits. See page 138 in datasheet.
|
||||
*
|
||||
* @retval Upper 8 bit are read from register SBC_SYS_STATUS_CTRL_1 and the lower 8 bit from SBC_SYS_STATUS_CTRL_0
|
||||
*/
|
||||
uint16_t SBC_SYS_STAT_Read(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Writes System Status Control, both lower and higher bits. See page 138 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Locks CP_EN, GPIO configuration and 'rwl'-bits.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Lock_Configuration(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Unlocks CP_EN, GPIO configuration and 'rwl'-bits.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Unlock_Configuration(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clears both Wake Status registers.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Clear_Wake_Status(void);
|
||||
|
||||
#endif /*TLE94x1_H*/
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,127 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_ISR.h
|
||||
*
|
||||
* @brief Declaration file for ISR-Vectors and ISR related functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_ISR_H
|
||||
#define TLE94x1_ISR_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1_DEFINES.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ================================ MACROS ==================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/**
|
||||
* @def SBC_ISR_VECTOR
|
||||
*
|
||||
* @brief Vector defining the handling of interrupts.
|
||||
*
|
||||
* Vectors of this type have to be registered by the SBC_Register_Callback method.
|
||||
*/
|
||||
#define SBC_ISR_VECTOR(REG,MASK,POS,COMPARE) ((((uint32_t)REG) << 24) | (((uint32_t)MASK) << 16) | (((uint32_t)POS) << 8) | ((uint32_t)COMPARE))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ======================= General Interrupt Defines ========================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
|
||||
/* Interrupts based on WK_STAT_0 and WK_STAT_1 register are always available */
|
||||
#define SBC_ISR_CAN_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_CAN_WU_Msk, SBC_WK_STAT_0_CAN_WU_Pos, SBC_CAN_WU_EVENT)
|
||||
#define SBC_ISR_TIMER_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_TIMER_WU_Msk, SBC_WK_STAT_0_TIMER_WU_Pos, SBC_TIMER_WU_EVENT)
|
||||
#define SBC_ISR_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_WK_WU_Msk, SBC_WK_STAT_0_WK_WU_Pos, SBC_WK_WU_EVENT)
|
||||
#define SBC_ISR_GPIO_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_1, SBC_WK_STAT_1_GPIO_WK_WU_Msk, SBC_WK_STAT_1_GPIO_WK_WU_Pos, SBC_GPIO_WK_WU_EVENT)
|
||||
|
||||
|
||||
/* Following interrupts only usable if INT_GLOBAL bit is set to '1' */
|
||||
#define SBC_ISR_VS_UV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_UV_Msk, SBC_SUP_STAT_1_VS_UV_Pos, SBC_VS_UV_EVENT)
|
||||
#define SBC_ISR_VS_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_OV_Msk, SBC_SUP_STAT_1_VS_OV_Pos, SBC_VS_OV_EVENT)
|
||||
#define SBC_ISR_VCC1_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_OV_Msk, SBC_SUP_STAT_1_VCC1_OV_Pos, SBC_VCC1_OV_EVENT)
|
||||
#define SBC_ISR_VCC1_UV_PREWARN SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_WARN_Msk, SBC_SUP_STAT_1_VCC1_WARN_Pos, SBC_VCC1_UV_PREWARN_EVENT)
|
||||
#define SBC_ISR_VCC2_OT SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_OT_Msk, SBC_SUP_STAT_0_VCC2_OT_Pos, SBC_VCC2_OT_EVENT)
|
||||
#define SBC_ISR_VCC2_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_UV_Msk, SBC_SUP_STAT_0_VCC2_UV_Pos, SBC_VCC2_UV_EVENT)
|
||||
#define SBC_ISR_VCC1_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC1_UV_Msk, SBC_SUP_STAT_0_VCC1_UV_Pos, SBC_VCC1_UV_EVENT)
|
||||
#define SBC_ISR_TSD2_SAFESTATE SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD2_SAFE_Msk, SBC_THERM_STAT_TSD2_SAFE_Pos, SBC_TSD2_SAFE_SAFESTATE_DETECTED)
|
||||
#define SBC_ISR_TSD1 SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD1_Msk, SBC_THERM_STAT_TSD1_Pos, SBC_TSD1_EVENT)
|
||||
#define SBC_ISR_TPW SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TPW_Msk, SBC_THERM_STAT_TPW_Pos, SBC_TPW_EVENT)
|
||||
#define SBC_ISR_RESTART_AFTER_FAIL SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_RESTART_AFTER_FAIL)
|
||||
#define SBC_ISR_FROM_SLEEPMODE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_SLEEP_MODE)
|
||||
#define SBC_ISR_WD_FAIL_1 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_1FAIL)
|
||||
#define SBC_ISR_WD_FAIL_2 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_2FAIL)
|
||||
#define SBC_ISR_FAILURE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_FAILURE_Msk, SBC_DEV_STAT_FAILURE_Pos, SBC_FAILURE_EVENT)
|
||||
#define SBC_ISR_CAN_TSD SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TSD)
|
||||
#define SBC_ISR_CAN_TXD_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TXD_DOM_TO)
|
||||
#define SBC_ISR_CAN_BUS_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_BUS_DOM_TO)
|
||||
#define SBC_ISR_VCAN_UV SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_VCAN_UV_Msk, SBC_BUS_STAT_VCAN_UV_Pos, SBC_VCAN_UV_EVENT)
|
||||
#define SBC_ISR_GPIO_OC SBC_ISR_VECTOR(SBC_GPIO_OC_STAT, SBC_GPIO_OC_STAT_GPIO_OC_Msk, SBC_GPIO_OC_STAT_GPIO_OC_Pos, SBC_GPIO_OC_EVENT)
|
||||
#define SBC_ISR_GPIO_OL SBC_ISR_VECTOR(SBC_GPIO_OL_STAT, SBC_GPIO_OL_STAT_GPIO_OL_Msk, SBC_GPIO_OL_STAT_GPIO_OL_Pos, SBC_GPIO_OL_EVENT)
|
||||
|
||||
|
||||
#endif /*TLE94x1_ISR_H*/
|
||||
@ -1,156 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_SPI.c
|
||||
*
|
||||
* @brief Implementation of all SPI related functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1_SPI.h"
|
||||
#include "mcu.h"
|
||||
|
||||
void SPI_PortInit(void);
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ======================= SPI communication functions ====================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
uint8_t spitxbuf[10],spirxbuf[10];
|
||||
extern McuType mcu;
|
||||
uint8_t SBC_SPI_INIT(void) {
|
||||
SpiDrv_InitCfgType masterCfg;
|
||||
|
||||
SPI_PortInit();
|
||||
|
||||
SpiDrv_GetDefaultConfig(&masterCfg);
|
||||
masterCfg.basicParameters.isMasterNode = true;
|
||||
masterCfg.basicParameters.baudRate = 1000000ul;
|
||||
masterCfg.basicParameters.pcsSelection = 1;
|
||||
//masterCfg.basicParameters.clockPolarity = SPIDRV_CLK_POLARITY_IDLE_IN_HIGH;
|
||||
masterCfg.basicParameters.clockPhase = SPIDRV_CLK_PHASE_DATA_SAMPLE_ON_TRAILING_EDGE;
|
||||
|
||||
while(ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_SPI0, &masterCfg.basicParameters.busClockFreq) == false)
|
||||
{
|
||||
;
|
||||
}
|
||||
SpiDrv_SetConfig(&mcu.spiDrv0, &masterCfg);
|
||||
|
||||
SpiDrv_SetRxFifoWaterMask(&mcu.spiDrv0, 0);
|
||||
//SpiDrv_SetIsrConfig(&mcu.spiDrv0, SPIDRV_ISR_SRC_RX_DATA, true);
|
||||
|
||||
/* Enable the SPI interrupts */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower) {
|
||||
uint16_t ret;
|
||||
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_LOW);
|
||||
spitxbuf[0] = Upper;
|
||||
spitxbuf[1] = Lower;
|
||||
|
||||
SpiDrv_MasterSyncTransfer(&mcu.spiDrv0,SPIDRV_FRAME_SIZE_BIT_TYPE_BYTE,2,spitxbuf,spirxbuf);
|
||||
//LPSPI_DRV_MasterTransferBlocking(LPSPICOM1,spitxbuf,spirxbuf,2,10);
|
||||
ret = spirxbuf[0];
|
||||
ret <<= 8;
|
||||
ret |= spirxbuf[1];
|
||||
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_HIGH);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/********************CVA SPI DRV**********************/
|
||||
|
||||
void SPI0_Handler(void)
|
||||
{
|
||||
if(SpiDrv_GetStatus(&mcu.spiDrv0, SPIDRV_STATUS_RX_DATA) == true && SpiDrv_GetIsrConfig(&mcu.spiDrv0, SPIDRV_ISR_SRC_RX_DATA) == true)
|
||||
{
|
||||
//spi0IrqCnt++;
|
||||
//uint8_t len = SpiDrv_AsyncReceive(&mcu.spiDrv0, (void *)masterRxBuff, true);
|
||||
}
|
||||
}
|
||||
|
||||
void SPI_PortInit(void)
|
||||
{
|
||||
/* SPI CS */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 5, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 5, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 5, 1);
|
||||
|
||||
/* SPI CLK */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 2, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 2, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 2, 1);
|
||||
|
||||
/* SPI SIN */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 4, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 4, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 4, 1);
|
||||
|
||||
/* SPI SOUT */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 3, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 3, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 3, 1);
|
||||
}
|
||||
|
||||
void SPI_TEST_TASK(void)
|
||||
{
|
||||
|
||||
}
|
||||
@ -1,95 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_SPI.h
|
||||
*
|
||||
* @brief Declaration file for TLE94x1 SBC family device SPI functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_SPI_H
|
||||
#define TLE94x1_SPI_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================= SPI Functions ============================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
/**
|
||||
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
|
||||
*
|
||||
* The function has to initialze the SPI of the uC and will be called once during SBC_Init().
|
||||
* In case, the SPI hardware is already initialized by some other code before, it can be left blank.
|
||||
*
|
||||
* @retval Method has to return 0 if initialization was successful.
|
||||
*/
|
||||
uint8_t SBC_SPI_INIT(void);
|
||||
|
||||
/**
|
||||
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
|
||||
*
|
||||
* The function will be called by the library everytime when a SPI communication is needed.
|
||||
* The function proceeds a bidirectional 16-bit transfer to/from the SBC .
|
||||
* As some UCs only supports 8-Bit transfers, the input arguments are split in two 8-bit arguments.
|
||||
* For further implementation details have a look at datasheet chapter 13.1 or at the Arduino-examples.
|
||||
*
|
||||
* @param Upper The first 8 bit to transmit to the SBC.
|
||||
* @param Lower The second 8 bit to transmit to the SBC.
|
||||
* @retval The function will return all 16 bits received from the SBC.
|
||||
* Bit[15:8] are the first 8 bits received (Status-Information-Field).
|
||||
* Bit[7:0] is the data-field transmitted of the SBC.
|
||||
*/
|
||||
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower);
|
||||
|
||||
#endif /* TLE94x1_SPI_H */
|
||||
@ -4,7 +4,7 @@
|
||||
#include "appTask.h"
|
||||
#include "canuser.h"
|
||||
#include "uds_user.h"
|
||||
#include "TLE94x1.h"
|
||||
#include "key.h"
|
||||
/*******************************************************************************
|
||||
* the defines
|
||||
******************************************************************************/
|
||||
@ -89,7 +89,7 @@ void appTaskInit(void)
|
||||
{
|
||||
/* UDS init */
|
||||
Uds_UserInit(&udsObj, &udsParam);
|
||||
|
||||
ClearKeyState();
|
||||
}
|
||||
|
||||
void appTask(void)
|
||||
@ -106,6 +106,7 @@ void appTask(void)
|
||||
gSystick1msEvent--;
|
||||
gSystick1msCnt++;
|
||||
gSysTick1sCnt++;
|
||||
KeyScan();
|
||||
CANMsgTask();
|
||||
if (gSystick1msCnt % 5 == 0)
|
||||
{
|
||||
@ -113,7 +114,7 @@ void appTask(void)
|
||||
}
|
||||
if (gSystick1msCnt % 50 == 0)
|
||||
{
|
||||
SBC_WD_Trigger();//喂狗
|
||||
//SBC_WD_Trigger();//喂狗
|
||||
}
|
||||
if (gSystick1msCnt % 1000 == 0)
|
||||
{
|
||||
|
||||
@ -4,6 +4,7 @@
|
||||
#include "canuser.h"
|
||||
#include "appTask.h"
|
||||
#include "can_message.h"
|
||||
#include "key.h"
|
||||
/*******************************************************************************
|
||||
* the defines
|
||||
******************************************************************************/
|
||||
@ -75,6 +76,8 @@ const FlexCanDrv_MsgCfgType msgCfgObj[UDS_MSG_IDX_NUM] = {
|
||||
/*******************************************************************************
|
||||
* the functions
|
||||
******************************************************************************/
|
||||
void TxK86Msg(uint8_t *pdata);
|
||||
|
||||
|
||||
void CAN_ORed_0_31_MB_Handler(void)
|
||||
{
|
||||
@ -169,11 +172,11 @@ void FlexCanBoot_Init(void)
|
||||
flexCanDrv_DemoObj = &mcu.flexCanDrv;
|
||||
|
||||
/* set PTC1 MUX as GPIO */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 5, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 9, PINSDRV_MUX_AS_GPIO);
|
||||
/* set PTC1 as GPIO output */
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 5, 1);
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 9, 1);
|
||||
/* set PTC1 as high to control CAN transceiver STB */
|
||||
PinsDrv_WritePin(&mcu.ptc, 5, 1);
|
||||
PinsDrv_WritePin(&mcu.ptc, 9, 0);
|
||||
|
||||
/* set PTE4 as MUX 5 - CAN0.RX */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 0, PINSDRV_MUX_ALT5);
|
||||
@ -243,15 +246,48 @@ void TxTestMsg(uint8_t *pdata)
|
||||
//SEGGER_RTT_printf(0,"test data\n");
|
||||
}
|
||||
|
||||
void TxK86Msg(uint8_t *pdata)
|
||||
{
|
||||
FlexCanBoot_TxMessage(APP_TX_TEST1_MSG_ID, pdata, 8);
|
||||
}
|
||||
|
||||
void FillK86Msg(uint8_t *pdata)
|
||||
{
|
||||
uint8_t buf[8] = {0};
|
||||
buf[0] |= GetKeyState(KEY_HG_F) << 0;
|
||||
buf[0] |= GetKeyState(KEY_HG_R) << 1;
|
||||
buf[0] |= GetKeyState(KEY_KB_F) << 2;
|
||||
buf[0] |= GetKeyState(KEY_KB_R) << 3;
|
||||
buf[0] |= GetKeyState(KEY_TT_U) << 4;
|
||||
buf[0] |= GetKeyState(KEY_TT_D) << 5;
|
||||
buf[0] |= GetKeyState(KEY_ZERO_ON) << 6;
|
||||
buf[0] |= GetKeyState(KEY_ZERO_OFF) << 7;
|
||||
memcpy(pdata,buf,8);
|
||||
}
|
||||
uint8_t K86MsgBuf[8] = {0};
|
||||
void CANMsgTask(void)//1ms task
|
||||
{
|
||||
static uint16_t msg_counter=0;
|
||||
FlexCan_FrameStructureType rxMsg;
|
||||
msg_counter++;
|
||||
if (msg_counter % 100 == 0)
|
||||
FillK86Msg(K86MsgBuf);
|
||||
if ((K86MsgBuf[0] & 0x3F) != 0)
|
||||
{
|
||||
TxTestMsg(NULL);
|
||||
if (msg_counter % 100 == 0)
|
||||
{
|
||||
TxK86Msg(K86MsgBuf);
|
||||
}
|
||||
msg_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
msg_counter = 0;
|
||||
}
|
||||
if (getKeyPressFlag(KEY_ZERO_ON) || getKeyPressFlag(KEY_ZERO_OFF))
|
||||
{
|
||||
TxK86Msg(K86MsgBuf);
|
||||
}
|
||||
|
||||
|
||||
|
||||
if (msg_counter >= 1000)
|
||||
{
|
||||
|
||||
@ -14,11 +14,11 @@
|
||||
******************************************************************************/
|
||||
#define CAN_DATA_BUFFER_SIZE (64u)
|
||||
|
||||
#define UDS_PHYS_RECV_MSG_ID (0x732)
|
||||
#define UDS_PHYS_RECV_MSG_ID (0x731)
|
||||
#define UDS_FUNC_RECV_MSG_ID (0x7DF)
|
||||
#define UDS_PHYS_RESP_MSG_ID (0x7B2)
|
||||
#define UDS_PHYS_RESP_MSG_ID (0x7B1)
|
||||
|
||||
#define APP_TX_TEST1_MSG_ID (0x111)
|
||||
#define APP_TX_TEST1_MSG_ID (0x201)
|
||||
#define APP_TX_TEST2_MSG_ID (0x222)
|
||||
#define APP_RX_TEST1_MSG_ID (0x444)
|
||||
#define APP_RX_TEST2_MSG_ID (0x555)
|
||||
|
||||
@ -3,7 +3,6 @@
|
||||
* the includes
|
||||
******************************************************************************/
|
||||
#include "extern.h"
|
||||
#include "TLE94x1.h"
|
||||
#include <string.h>
|
||||
#include "drivers/reset/reset_drv.h"
|
||||
#include "mcu.h"
|
||||
@ -50,7 +49,7 @@ __root const app_CfgInfoType app_info = {
|
||||
.sAswHeader = ASW_HEAD_MASK,//0x00010400
|
||||
.appBuildTime = __TIME__,//0x00010404
|
||||
.appBuildDate = __DATE__,//0x00010410
|
||||
.appSW_VERSION = "SW0101_20241211",
|
||||
.appSW_VERSION = "SW0101_20250204",
|
||||
};
|
||||
|
||||
|
||||
@ -94,7 +93,8 @@ void getEcuName(unsigned char *pdata)
|
||||
|
||||
void extHardwareReset(void)
|
||||
{
|
||||
SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_RESET, NULL);
|
||||
//SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_RESET, NULL);
|
||||
ResetDrv_SoftwareResetModule(&mcu.resetDrv,RESETDRV_SWRESET_SYS);
|
||||
}
|
||||
void extSortwareReset(void)
|
||||
{
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
******************************************************************************/
|
||||
#include "hwctrl.h"
|
||||
#include "canuser.h"
|
||||
#include "TLE94x1.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* the defines
|
||||
******************************************************************************/
|
||||
@ -30,7 +30,7 @@
|
||||
* the functions
|
||||
******************************************************************************/
|
||||
static void hw_clock_init(void);
|
||||
|
||||
static void GPIO_init(void);
|
||||
|
||||
|
||||
|
||||
@ -44,14 +44,11 @@ void hw_init(void)
|
||||
//初始化时钟
|
||||
hw_clock_init();
|
||||
|
||||
SBC_SPI_INIT();
|
||||
|
||||
|
||||
|
||||
/* get CAN controller default configuration */
|
||||
FlexCanBoot_Init();
|
||||
|
||||
SBC_Init();
|
||||
GPIO_init();
|
||||
}
|
||||
|
||||
static void hw_clock_init(void)
|
||||
@ -74,24 +71,6 @@ static void hw_clock_init(void)
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTD, &clockConfig);
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTE, &clockConfig);
|
||||
|
||||
/* Setup the Pll div2 clock */
|
||||
clockConfig.gating = true;
|
||||
clockConfig.source = CLOCKDRV_PLL;
|
||||
clockConfig.div = 1;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV, &clockConfig);
|
||||
|
||||
clockConfig.gating = true;
|
||||
clockConfig.source = CLOCKDRV_PLL;
|
||||
clockConfig.div = 2;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV, &clockConfig);
|
||||
|
||||
/* Setup the SPI clock */
|
||||
clockConfig.gating = true;
|
||||
clockConfig.source = CLOCKDRV_PLL_DIV;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI0, &clockConfig);
|
||||
|
||||
uint32_t tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv0.reg);
|
||||
SpiDrv_SetPrescaler(&tTcr,0x02);
|
||||
|
||||
/* Set system tick clock, 1ms event */
|
||||
ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_SYS, &gCpuClockFrequency);
|
||||
@ -102,5 +81,54 @@ static void hw_clock_init(void)
|
||||
|
||||
}
|
||||
|
||||
static void GPIO_init(void)
|
||||
{
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 0, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 0, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 1, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 1, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 2, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 2, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 3, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 3, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 5, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 5, 0);
|
||||
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 1, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 1, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 16, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 16, 0);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 15, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 15, 0);
|
||||
|
||||
//PinsDrv_SetPortInputDisable(&mcu.ptd,0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t getKeyIO(KEYID_t keyid)
|
||||
{
|
||||
switch (keyid)
|
||||
{
|
||||
case KEY_KB_F:
|
||||
return PinsDrv_ReadPin(&mcu.ptd, 2) == 0 ? 1:0;
|
||||
case KEY_KB_R:
|
||||
return PinsDrv_ReadPin(&mcu.ptd, 3) == 0 ? 1:0;
|
||||
case KEY_HG_F:
|
||||
return PinsDrv_ReadPin(&mcu.ptd, 1) == 0 ? 1:0;
|
||||
case KEY_HG_R:
|
||||
return PinsDrv_ReadPin(&mcu.ptd, 0) == 0 ? 1:0;
|
||||
|
||||
case KEY_TT_U:
|
||||
return PinsDrv_ReadPin(&mcu.ptd, 5) == 0 ? 1:0;
|
||||
case KEY_TT_D:
|
||||
return PinsDrv_ReadPin(&mcu.ptc, 1) == 0 ? 1:0;
|
||||
|
||||
case KEY_ZERO_ON:
|
||||
return PinsDrv_ReadPin(&mcu.ptc, 15) == 0 ? 1:0;
|
||||
case KEY_ZERO_OFF:
|
||||
return PinsDrv_ReadPin(&mcu.ptc, 16) == 0 ? 1:0;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
* the includes
|
||||
******************************************************************************/
|
||||
#include "mcu.h"
|
||||
|
||||
#include "key.h"
|
||||
/*******************************************************************************
|
||||
* the defines
|
||||
******************************************************************************/
|
||||
@ -14,8 +14,7 @@
|
||||
/*******************************************************************************
|
||||
* the typedefs
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* the globals
|
||||
******************************************************************************/
|
||||
@ -27,7 +26,7 @@
|
||||
* the functions
|
||||
******************************************************************************/
|
||||
void hw_init(void);
|
||||
|
||||
uint8_t getKeyIO(KEYID_t keyid);
|
||||
|
||||
|
||||
|
||||
|
||||
@ -156,7 +156,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesUse1</name>
|
||||
<state>1</state>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesUse2</name>
|
||||
@ -328,7 +328,7 @@
|
||||
<option>
|
||||
<name>CMSISDAPResetList</name>
|
||||
<version>1</version>
|
||||
<state>10</state>
|
||||
<state>4</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CMSISDAPHWResetDuration</name>
|
||||
@ -469,7 +469,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>CMSISDAPSelectedCPUBehaviour</name>
|
||||
<state>0</state>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ICpuName</name>
|
||||
@ -1146,7 +1146,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSTLinkInterfaceRadio</name>
|
||||
<state>0</state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSTLinkInterfaceCmdLine</name>
|
||||
@ -1159,7 +1159,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>CCCpuClockEdit</name>
|
||||
<state></state>
|
||||
<state>80.0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSwoClockAuto</name>
|
||||
@ -1261,7 +1261,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSTLinkTargetVoltage</name>
|
||||
<state>###Uninitialized###</state>
|
||||
<state>3.3</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
|
||||
@ -362,7 +362,6 @@
|
||||
<state>$PROJ_DIR$\SDK\platform\devices\CVM011x</state>
|
||||
<state>$PROJ_DIR$\src\private_driver</state>
|
||||
<state>$PROJ_DIR$\src\RTT</state>
|
||||
<state>$PROJ_DIR$\src\TLE9461</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCStdIncCheck</name>
|
||||
@ -695,7 +694,7 @@
|
||||
<data>
|
||||
<extensions></extensions>
|
||||
<cmdline></cmdline>
|
||||
<hasPrio>1</hasPrio>
|
||||
<hasPrio>16</hasPrio>
|
||||
<buildSequence>inputOutputBased</buildSequence>
|
||||
</data>
|
||||
</settings>
|
||||
@ -3056,30 +3055,6 @@
|
||||
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>TLE9461</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\SBC_TLE94x1.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_DEFINES.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_ISR.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\main.c</name>
|
||||
</file>
|
||||
|
||||
@ -3618,30 +3618,6 @@
|
||||
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>TLE9461</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\SBC_TLE94x1.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_DEFINES.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_ISR.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\src\main.c</name>
|
||||
</file>
|
||||
|
||||
File diff suppressed because one or more lines are too long
@ -20,7 +20,7 @@
|
||||
<EnableCache>0</EnableCache>
|
||||
</ArmDriver>
|
||||
<DebugChecksum>
|
||||
<Checksum>519825789</Checksum>
|
||||
<Checksum>2065733558</Checksum>
|
||||
</DebugChecksum>
|
||||
<Disassembly>
|
||||
<MixedMode>1</MixedMode>
|
||||
@ -47,24 +47,32 @@
|
||||
<ShowArgs>0</ShowArgs>
|
||||
</CallStack>
|
||||
<JLinkDriver>
|
||||
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
|
||||
<CStepIntDis>_ 0</CStepIntDis>
|
||||
<jlinkResetStyle>12</jlinkResetStyle>
|
||||
<jlinkResetStrategy>0</jlinkResetStrategy>
|
||||
<TraceBufferSize>0x10000</TraceBufferSize>
|
||||
<TraceStallIfFIFOFull>0x0</TraceStallIfFIFOFull>
|
||||
<TracePortSize>0x0</TracePortSize>
|
||||
</JLinkDriver>
|
||||
<StLinkDriver>
|
||||
<stlinkserialNo>50FF70064965565037131987</stlinkserialNo>
|
||||
<stlinkfoundProbes />
|
||||
<stlinkResetStyle>0</stlinkResetStyle>
|
||||
<stlinkResetStrategy>0</stlinkResetStrategy>
|
||||
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
|
||||
<CStepIntDis>_ 0</CStepIntDis>
|
||||
</JLinkDriver>
|
||||
<Trace2>
|
||||
<Enabled>0</Enabled>
|
||||
<ShowSource>0</ShowSource>
|
||||
</Trace2>
|
||||
</StLinkDriver>
|
||||
<DriverProfiling>
|
||||
<Enabled>0</Enabled>
|
||||
<Mode>1</Mode>
|
||||
<Graph>0</Graph>
|
||||
<Symbiont>0</Symbiont>
|
||||
</DriverProfiling>
|
||||
<Trace2>
|
||||
<Enabled>0</Enabled>
|
||||
<ShowSource>0</ShowSource>
|
||||
</Trace2>
|
||||
<TermIOLog>
|
||||
<LoggingEnabled>_ 0</LoggingEnabled>
|
||||
<LogFile>_ ""</LogFile>
|
||||
@ -73,7 +81,7 @@
|
||||
<mode>0</mode>
|
||||
</DisassembleMode>
|
||||
<Breakpoints2>
|
||||
<Bp0>_ 0 "EMUL_CODE" "{$PROJ_DIR$\src\bootloader\bootloader.c}.869.25" 0 0 1 "" 0 "" 0</Bp0>
|
||||
<Bp0>_ 0 "EMUL_CODE" "{$PROJ_DIR$\src\bootloader\bootloader.c}.872.25" 0 0 1 "" 0 "" 0</Bp0>
|
||||
<Count>1</Count>
|
||||
</Breakpoints2>
|
||||
<Aliases>
|
||||
|
||||
File diff suppressed because one or more lines are too long
@ -1,101 +0,0 @@
|
||||
/**
|
||||
* @cond
|
||||
***********************************************************************************************************************
|
||||
*
|
||||
* Copyright (c) 2018, Infineon Technologies AG
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
|
||||
* following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
|
||||
* disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
|
||||
* following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
|
||||
* products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
**********************************************************************************************************************/
|
||||
#ifndef SBC_TLE94X1_H
|
||||
#define SBC_TLE94X1_H
|
||||
|
||||
/* XML Version 0.0.6 */
|
||||
#define SBC_XML_VERSION (00006)
|
||||
|
||||
#define CTRL_BUS_CTRL_0 (0x3) /*decimal 3*/
|
||||
|
||||
#define CTRL_BUS_CTRL_3 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_GPIO_CTRL (0x4) /*decimal 4*/
|
||||
|
||||
#define CTRL_HW_CTRL_0 (0x40) /*decimal 64*/
|
||||
|
||||
#define CTRL_HW_CTRL_1 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_HW_CTRL_2 (0x40) /*decimal 64*/
|
||||
|
||||
#define CTRL_HW_CTRL_3 (0x1) /*decimal 1*/
|
||||
|
||||
#define CTRL_M_S_CTRL (0x13) /*decimal 19*/
|
||||
|
||||
#define CTRL_PWM_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_PWM_FREQ_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_BTL0_CTRL (0x50) /*decimal 80*/
|
||||
|
||||
#define CTRL_SWK_CAN_FD_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_CDR_CTRL2 (0x1) /*decimal 1*/
|
||||
|
||||
#define CTRL_SWK_CDR_LIMIT_HIGH_CTRL (0x54) /*decimal 84*/
|
||||
|
||||
#define CTRL_SWK_CDR_LIMIT_LOW_CTRL (0x4C) /*decimal 76*/
|
||||
|
||||
#define CTRL_SWK_DATA_H_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_DATA_L_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_DLC_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_ID0_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_SWK_IDx_CTRL 0x00000000
|
||||
|
||||
#define CTRL_SWK_MASK_IDx_CTRL 0x00000000
|
||||
|
||||
#define CTRL_TIMER_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WD_CTRL (0x15) /*decimal 21*/
|
||||
|
||||
#define CTRL_WK_CTRL_0 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WK_CTRL_1 (0x0) /*decimal 0*/
|
||||
|
||||
#define CTRL_WK_PUPD_CTRL (0x0) /*decimal 0*/
|
||||
|
||||
#define LED_Math_extendedID (0x1) /*decimal 1*/
|
||||
|
||||
#define LED_Math_extendedIDMsk (0x1) /*decimal 1*/
|
||||
|
||||
#define MATH_Baudrate (0x2) /*decimal 2*/
|
||||
|
||||
#define MATH_CDR_FrequencyMHz (0x28) /*decimal 40*/
|
||||
|
||||
#define MATH_DoubleCDRFreq (0x0) /*decimal 0*/
|
||||
|
||||
#define MATH_EN_PN (0x1) /*decimal 1*/
|
||||
|
||||
#define MATH_PWM_DC (0.0)
|
||||
|
||||
#endif /* SBC_TLE94X1_H */
|
||||
@ -1,233 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<icwpxml version="2.6.4">
|
||||
<checksum>9e8e9087eecb39921ec31dfccce96b2a2efec664bafe2827aea4ddb51cb86761</checksum>
|
||||
<XmlFile>TLE94x1_Lib.xml</XmlFile>
|
||||
<XmlVersion>V0.0.6</XmlVersion>
|
||||
<ActiveElements>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_2[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WK_PUPD_CTRL[7:6]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.PWM_FREQ_CTRL[1:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<DoubleSpinBox>
|
||||
<define>MATH.PWM_DC</define>
|
||||
<value>0</value>
|
||||
<dispValue>0.0</dispValue>
|
||||
</DoubleSpinBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[7]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.BUS_CTRL_3[4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WK_PUPD_CTRL[1:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_0[6]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.TIMER_CTRL[3:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.TIMER_CTRL[6:4]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_3[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ButtonGroup>
|
||||
<define>CTRL.WD_CTRL[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ButtonGroup>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_2[7:5]</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_2[3:2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.SWK_CAN_FD_CTRL[3:1]</define>
|
||||
<value>2</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>MATH.Baudrate</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.SWK_ID0_CTRL[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_MASK_IDx_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0</dispValue>
|
||||
</LineEdit>
|
||||
<ComboBox>
|
||||
<define>CTRL.SWK_DLC_CTRL[3:0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</ComboBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_DATA_H_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0x00000000</dispValue>
|
||||
</LineEdit>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_DATA_L_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0x00000000</dispValue>
|
||||
</LineEdit>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[3]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_2[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.M_S_CTRL[4:3]</define>
|
||||
<value>2</value>
|
||||
<dispValue>2</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>MATH.EN_PN</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.HW_CTRL_3[1:0]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_0[6]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.SWK_CAN_FD_CTRL[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>MATH.DoubleCDRFreq</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<LineEdit>
|
||||
<define>CTRL.SWK_IDx_CTRL</define>
|
||||
<value>0x00000000</value>
|
||||
<dispValue>0</dispValue>
|
||||
</LineEdit>
|
||||
<ComboBox>
|
||||
<define>CTRL.GPIO_CTRL[2:0]</define>
|
||||
<value>4</value>
|
||||
<dispValue>4</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[0]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_1[5]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WK_CTRL_0[2];CTRL.WD_CTRL[6]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.WD_CTRL[4]</define>
|
||||
<value>1</value>
|
||||
<dispValue>1</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.WD_CTRL[2:0]</define>
|
||||
<value>5</value>
|
||||
<dispValue>5</dispValue>
|
||||
</ComboBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.M_S_CTRL[1:0]</define>
|
||||
<value>3</value>
|
||||
<dispValue>3</dispValue>
|
||||
</ComboBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.HW_CTRL_1[7]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<CheckBox>
|
||||
<define>CTRL.M_S_CTRL[2]</define>
|
||||
<value>0</value>
|
||||
<dispValue>0</dispValue>
|
||||
</CheckBox>
|
||||
<ComboBox>
|
||||
<define>CTRL.BUS_CTRL_0[2:0]</define>
|
||||
<value>3</value>
|
||||
<dispValue>3</dispValue>
|
||||
</ComboBox>
|
||||
</ActiveElements>
|
||||
</icwpxml>
|
||||
@ -1,591 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1.c
|
||||
*
|
||||
* @brief Implementation of main library functions
|
||||
*
|
||||
* @version V1.0.1
|
||||
* @date 05. October 2020
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
********************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1.h"
|
||||
#include "SBC_TLE94x1.h"
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================== Variables ================================= */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/* -------------------------------- ISR Handling --------------------------------- */
|
||||
|
||||
static SBC_Func_Callback SBC_ISR_Callbacks[30];
|
||||
static uint32_t SBC_ISR_Vectors[30];
|
||||
static uint8_t SBC_ISR_ReadOutRegs[30];
|
||||
static uint8_t SBC_ISR_ReadOutVals[30];
|
||||
static uint8_t SBC_RegisteredCallbacks = 0;
|
||||
static uint8_t SBC_RegisteredRedoutRegs = 0;
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* =========================== Library Functions ============================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/* -------------------------------- Main Functions ------------------------------- */
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WD_Trigger(void) {
|
||||
/* Read WD config out of SBC and write back to trigger WD */
|
||||
uint8_t WD_Data = (uint8_t)SBC_Read_Command(SBC_WD_CTRL);
|
||||
return SBC_Write_Reg(SBC_WD_CTRL, WD_Data, NULL);
|
||||
}
|
||||
|
||||
|
||||
uint16_t SBC_Read_Command(uint8_t SBC_Reg) {
|
||||
/* Read and return data - Bit[15:8] = Status Information Field - Bit [7:0] Register data */
|
||||
return SBC_SPI_TRANSFER16(SBC_Read_Mask & SBC_Reg, 0x00U);
|
||||
}
|
||||
|
||||
|
||||
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos) {
|
||||
uint8_t data = ((uint8_t)SBC_Read_Command(SBC_Reg)) & 0xFFU;
|
||||
return (data & SBC_FieldMsk) >> SBC_FieldPos;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval) {
|
||||
SBC_ErrorCode errCode;
|
||||
uint16_t returndata = SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, SBC_Val);
|
||||
if(returnval != NULL) {
|
||||
*returnval = returndata;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = SBC_Reg;
|
||||
errCode.flippedBitsMask = ((uint8_t)SBC_Read_Command(SBC_Reg)) ^ SBC_Val;
|
||||
errCode.expectedValue = SBC_Val;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Read data out of register to be manipulated */
|
||||
uint16_t returndata = SBC_Read_Command(SBC_Reg);
|
||||
if(returnval != NULL) {
|
||||
*returnval = returndata;
|
||||
}
|
||||
uint8_t data = (uint8_t)returndata;
|
||||
|
||||
/* Set the used bit field to all 0 */
|
||||
data &= ~(SBC_FieldMsk);
|
||||
|
||||
/* Configure new data to bit field */
|
||||
data |= (SBC_FieldVal << SBC_FieldPos);
|
||||
|
||||
(void)SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, data);
|
||||
|
||||
errCode.SBC_Register = SBC_Reg;
|
||||
errCode.expectedValue = (SBC_FieldVal << SBC_FieldPos);
|
||||
uint8_t actualValue = ((uint8_t)SBC_Read_Command(SBC_Reg)) & SBC_FieldMsk;
|
||||
errCode.flippedBitsMask = errCode.expectedValue ^ actualValue;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Init(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
uint8_t WD_Checksum = CTRL_WD_CTRL;
|
||||
uint8_t WD_CTRL = CTRL_WD_CTRL;
|
||||
uint8_t SWK_ID3_CTRL, SWK_ID2_CTRL, SWK_ID1_CTRL, SWK_ID0_CTRL;
|
||||
uint8_t SWK_MASK_ID3_CTRL, SWK_MASK_ID2_CTRL, SWK_MASK_ID1_CTRL, SWK_MASK_ID0_CTRL;
|
||||
uint8_t SWK_CAN_FD_CTRL = CTRL_SWK_CAN_FD_CTRL;
|
||||
|
||||
/* Calculate checksum */
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 4;
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 2;
|
||||
WD_Checksum = WD_Checksum ^ WD_Checksum >> 1;
|
||||
|
||||
if((WD_Checksum & 1) > 0) {
|
||||
/* Set parity bit */
|
||||
WD_CTRL = CTRL_WD_CTRL | 0x80U;
|
||||
}
|
||||
|
||||
/* Check if ID is configured to be extended */
|
||||
if((CTRL_SWK_ID0_CTRL & SBC_SWK_ID0_CTRL_IDE_Msk) == SBC_IDE_EXTENDED) {
|
||||
/* extended ID */
|
||||
uint32_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL << 3;
|
||||
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL << 3;
|
||||
|
||||
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 24);
|
||||
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL >> 16);
|
||||
SWK_ID1_CTRL = (uint8_t)(SWK_ID_CTRL >> 8);
|
||||
SWK_ID0_CTRL = (((uint8_t)(SWK_ID_CTRL >> 1)) & SBC_SWK_ID0_CTRL_ID4_0_Msk) | SBC_IDE_EXTENDED;
|
||||
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 24);
|
||||
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 16);
|
||||
SWK_MASK_ID1_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 8);
|
||||
SWK_MASK_ID0_CTRL = (((uint8_t)(SWK_MASK_ID_CTRL >> 1)) & SBC_SWK_MASK_ID0_CTRL_MASK_ID4_0_Msk);
|
||||
} else {
|
||||
/* Standard length ID */
|
||||
uint16_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL;
|
||||
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL;
|
||||
|
||||
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 3);
|
||||
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL << 5);
|
||||
SWK_ID1_CTRL = 0x00U;
|
||||
SWK_ID0_CTRL = 0x00U;
|
||||
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 3);
|
||||
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL << 5);
|
||||
SWK_MASK_ID1_CTRL = 0x00U;
|
||||
SWK_MASK_ID0_CTRL = 0x00U;
|
||||
}
|
||||
|
||||
/* DIS_ERR_CNT is set only when FD Tolerance is set. */
|
||||
if((CTRL_SWK_CAN_FD_CTRL & SBC_SWK_CAN_FD_CTRL_CAN_FD_EN_Msk) == SBC_CAN_FD_EN_ENABLED) {
|
||||
SWK_CAN_FD_CTRL &= SBC_DIS_ERR_CNT_DISABLED << SBC_SWK_CAN_FD_CTRL_DIS_ERR_CNT_Pos;
|
||||
}
|
||||
|
||||
/* Describes initialization sequence */
|
||||
uint8_t initSequence[39][2] = {
|
||||
{SBC_WD_CTRL, WD_CTRL},
|
||||
{SBC_M_S_CTRL, CTRL_M_S_CTRL},
|
||||
{SBC_HW_CTRL_0, CTRL_HW_CTRL_0},
|
||||
{SBC_HW_CTRL_3, CTRL_HW_CTRL_3},
|
||||
{SBC_BUS_CTRL_3, CTRL_BUS_CTRL_3},
|
||||
{SBC_WK_CTRL_0, CTRL_WK_CTRL_0},
|
||||
{SBC_WK_CTRL_1, CTRL_WK_CTRL_1},
|
||||
{SBC_WK_PUPD_CTRL, CTRL_WK_PUPD_CTRL},
|
||||
{SBC_TIMER_CTRL, CTRL_TIMER_CTRL},
|
||||
{SBC_PWM_FREQ_CTRL, CTRL_PWM_FREQ_CTRL}, /* The desired duty cycle should be set first before GPIO is enabled as PWM HS or PWM LS. */
|
||||
{SBC_PWM_CTRL, CTRL_PWM_CTRL},
|
||||
{SBC_GPIO_CTRL, CTRL_GPIO_CTRL},
|
||||
{SBC_HW_CTRL_1, CTRL_HW_CTRL_1}, /* May lock configuration (CFG_LOCK_0) */
|
||||
{SBC_HW_CTRL_2, CTRL_HW_CTRL_2}, /* May lock configuration (CFG_LOCK_1) */
|
||||
{SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0},
|
||||
|
||||
/* -------------------------- SELECTIVE WAKE REGISTERS --------------------------- */
|
||||
|
||||
/* Configuring CDR */
|
||||
{SBC_SWK_CDR_CTRL2, CTRL_SWK_CDR_CTRL2},
|
||||
{SBC_SWK_BTL0_CTRL, CTRL_SWK_BTL0_CTRL},
|
||||
{SBC_SWK_CDR_LIMIT_HIGH_CTRL, CTRL_SWK_CDR_LIMIT_HIGH_CTRL},
|
||||
{SBC_SWK_CDR_LIMIT_LOW_CTRL, CTRL_SWK_CDR_LIMIT_LOW_CTRL},
|
||||
{SBC_SWK_CDR_CTRL1, (SBC_SEL_FILT_TC16 << SBC_SWK_CDR_CTRL1_SEL_FILT_Pos) | (SBC_CDR_EN_ENABLED << SBC_SWK_CDR_CTRL1_CDR_EN_Pos)},
|
||||
|
||||
|
||||
/* Set ID */
|
||||
{SBC_SWK_ID3_CTRL, SWK_ID3_CTRL},
|
||||
{SBC_SWK_ID2_CTRL, SWK_ID2_CTRL},
|
||||
{SBC_SWK_ID1_CTRL, SWK_ID1_CTRL},
|
||||
{SBC_SWK_ID0_CTRL, SWK_ID0_CTRL},
|
||||
|
||||
/* Set Mask */
|
||||
{SBC_SWK_MASK_ID3_CTRL, SWK_MASK_ID3_CTRL},
|
||||
{SBC_SWK_MASK_ID2_CTRL, SWK_MASK_ID2_CTRL},
|
||||
{SBC_SWK_MASK_ID1_CTRL, SWK_MASK_ID1_CTRL},
|
||||
{SBC_SWK_MASK_ID0_CTRL, SWK_MASK_ID0_CTRL},
|
||||
|
||||
/* Set Data */
|
||||
{SBC_SWK_DATA7_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 24)},
|
||||
{SBC_SWK_DATA6_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 16)},
|
||||
{SBC_SWK_DATA5_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 8)},
|
||||
{SBC_SWK_DATA4_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 0)},
|
||||
{SBC_SWK_DATA3_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 24)},
|
||||
{SBC_SWK_DATA2_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 16)},
|
||||
{SBC_SWK_DATA1_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 8)},
|
||||
{SBC_SWK_DATA0_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 0)},
|
||||
|
||||
/* Set DLC */
|
||||
{SBC_SWK_DLC_CTRL, CTRL_SWK_DLC_CTRL},
|
||||
|
||||
{SBC_SWK_CAN_FD_CTRL, SWK_CAN_FD_CTRL},
|
||||
|
||||
/* End Configuration */
|
||||
{0x00U, 0x00U}
|
||||
};
|
||||
|
||||
/* Call SPI Init */
|
||||
if(SBC_SPI_INIT() != 0) {
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0xFF;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
};
|
||||
|
||||
uint8_t i = 0;
|
||||
|
||||
/* Write all initialization items to Lite SBC */
|
||||
while(initSequence[i][0] != 0x00U || initSequence[i][1] != 0x00U) {
|
||||
errCode = SBC_Write_Reg(initSequence[i][0], initSequence[i][1], NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- ISR Functions -------------------------------- */
|
||||
|
||||
|
||||
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler)) {
|
||||
/* Save callback */
|
||||
SBC_ISR_Callbacks[SBC_RegisteredCallbacks] = Callback_Handler;
|
||||
|
||||
/* Save callback vector */
|
||||
SBC_ISR_Vectors[SBC_RegisteredCallbacks] = ISR_Vector;
|
||||
|
||||
/* Check if the register will be readout already to avoid double-readout later */
|
||||
uint8_t RegFound = 0;
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
if (SBC_ISR_ReadOutRegs[i] == (ISR_Vector >> 24)) {
|
||||
RegFound = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* If readout status-reg was not found, register in the readout list */
|
||||
if (RegFound == 0) {
|
||||
SBC_ISR_ReadOutRegs[SBC_RegisteredRedoutRegs] = (uint8_t)(ISR_Vector >> 24);
|
||||
SBC_RegisteredRedoutRegs++;
|
||||
}
|
||||
|
||||
SBC_RegisteredCallbacks++;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_ISR(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Readout all registered status-registers */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
SBC_ISR_ReadOutVals[i] = (uint8_t) SBC_Read_Command(SBC_ISR_ReadOutRegs[i]);
|
||||
}
|
||||
|
||||
/* Handle all interrupts */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredCallbacks; i++) {
|
||||
/* Decode ISR Vector */
|
||||
uint8_t Compare = (uint8_t)SBC_ISR_Vectors[i];
|
||||
uint8_t FieldPos = (uint8_t)(SBC_ISR_Vectors[i] >> 8);
|
||||
uint8_t FieldMsk = (uint8_t)(SBC_ISR_Vectors[i] >> 16);
|
||||
uint8_t RegAddr = (uint8_t)(SBC_ISR_Vectors[i] >> 24);
|
||||
|
||||
/* Readback of associated status-bit */
|
||||
uint8_t ReadBack = 0;
|
||||
for (uint8_t j = 0; j < SBC_RegisteredRedoutRegs; j++) {
|
||||
if (SBC_ISR_ReadOutRegs[j] == RegAddr) {
|
||||
ReadBack = SBC_ISR_ReadOutVals[j];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* If compare-values matched -> proceed callback and clear field */
|
||||
if (((ReadBack & FieldMsk) >> FieldPos) == Compare) {
|
||||
SBC_ISR_Callbacks[i](ReadBack);
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear all ISR related registers */
|
||||
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
|
||||
errCode = SBC_Write_Reg(SBC_ISR_ReadOutRegs[i], 0x00U, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00U;
|
||||
errCode.flippedBitsMask = 0x00U;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- API Calls ----------------------------------- */
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Normal(void) {
|
||||
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_NORMAL, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Stop(void) {
|
||||
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_STOP, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Mode_Sleep(void) {
|
||||
uint8_t registerReadOut;
|
||||
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* If CAN PN is configured */
|
||||
if(MATH_EN_PN != 0) {
|
||||
|
||||
/* Reading value of SWK_STAT. */
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
|
||||
|
||||
/* CAN Protocol Handler in sync? The selective wake routine should be aborted if sync is not set. Note: for SYNC to be set the transceiver must have been in Normal Mode and a valid CAN communication must have been sent on the bus by any node. */
|
||||
if((registerReadOut & SBC_SWK_STAT_SYNC_Msk) >> SBC_SWK_STAT_SYNC_Pos != SBC_SYNC_VALID_FRAME_RECEIVED) {
|
||||
errCode.SBC_Register = SBC_SWK_STAT;
|
||||
errCode.flippedBitsMask = SBC_SWK_STAT_SYNC_Msk;
|
||||
errCode.expectedValue = SBC_SYNC_VALID_FRAME_RECEIVED << SBC_SWK_STAT_SYNC_Pos;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Set SWK Configuration valid */
|
||||
errCode = SBC_Write_RegField(SBC_SWK_CTRL, SBC_SWK_CTRL_CFG_VAL_Msk, SBC_SWK_CTRL_CFG_VAL_Pos, SBC_CFG_VAL_VALID, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
/* Clear SYSERR bit */
|
||||
errCode = SBC_Write_RegField(SBC_BUS_STAT, SBC_BUS_STAT_SYSERR_Msk, SBC_BUS_STAT_SYSERR_Pos, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Set CAN Mode to off and once again to desired configuration */
|
||||
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, 0x03, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Check SWK_STAT for SYNC == 1 && SWK_SET == 1 && WUF == 0 && WUP == 0. Ignore CANSIL */
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
|
||||
if( ((SBC_SWK_STAT_SYNC_Msk & registerReadOut) == SBC_SWK_STAT_SYNC_Msk)
|
||||
&& ((SBC_SWK_STAT_SWK_SET_Msk & registerReadOut) == SBC_SWK_STAT_SWK_SET_Msk)
|
||||
&& ((SBC_SWK_STAT_WUP_Msk & registerReadOut) != SBC_SWK_STAT_WUP_Msk)
|
||||
&& ((SBC_SWK_STAT_WUF_Msk & registerReadOut) != SBC_SWK_STAT_WUF_Msk)) {
|
||||
/* Empty */
|
||||
} else {
|
||||
errCode.SBC_Register = SBC_SWK_STAT;
|
||||
errCode.expectedValue = 0b01000100U;
|
||||
errCode.flippedBitsMask = errCode.expectedValue ^ registerReadOut;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Clear Wake Status Registers, so that SBC can sleep. */
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Select sleep mode */
|
||||
(void)SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_SLEEP, NULL);
|
||||
registerReadOut = (uint8_t)SBC_Read_Command(SBC_M_S_CTRL);
|
||||
|
||||
/* This piece of code is ideally never reached as the microcontroller should be already turned off then */
|
||||
if(registerReadOut != 0) {
|
||||
errCode.SBC_Register = SBC_M_S_CTRL;
|
||||
errCode.flippedBitsMask = registerReadOut;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00U;
|
||||
errCode.flippedBitsMask = 0x00U;
|
||||
errCode.expectedValue = 0x00U;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_DutyCycle_PWM (uint8_t PWM_DC) {
|
||||
return SBC_Write_Reg(SBC_PWM_CTRL, PWM_DC, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_Timer_On (uint8_t OnTime) {
|
||||
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_ON_Msk, SBC_TIMER_CTRL_TIMER_ON_Pos, OnTime, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Set_Timer_Period (uint8_t Period) {
|
||||
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_PER_Msk, SBC_TIMER_CTRL_TIMER_PER_Pos, Period, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_FO_Test_On(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_ACTIVE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_FO_Test_Off(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_NOT_ACTIVE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_CP_On(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_ON, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_CP_Off(void) {
|
||||
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_OFF, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WK_MEAS_On(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_VOLTAGESENSING, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_WK_MEAS_Off(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_WAKEUP, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_On(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKESOURCE, NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void) {
|
||||
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKEUP_DISABLED, NULL);
|
||||
}
|
||||
|
||||
|
||||
uint16_t SBC_SYS_STAT_Read(void) {
|
||||
uint16_t systemStatus = 0;
|
||||
uint16_t returndata = SBC_Read_Command(SBC_SYS_STATUS_CTRL_0);
|
||||
systemStatus = returndata & 0x00FFU;
|
||||
systemStatus |= SBC_Read_Command(SBC_SYS_STATUS_CTRL_1) << 8;
|
||||
return systemStatus;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Write lower bits */
|
||||
errCode = SBC_Write_Reg(SBC_SYS_STATUS_CTRL_0, (uint8_t)SystemStatus, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Write higher bits */
|
||||
return SBC_Write_Reg(SBC_SYS_STATUS_CTRL_1, (uint8_t)(SystemStatus >> 8), NULL);
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Lock_Configuration(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Lock CP_EN and GPIO cannot be modified */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_LOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Lock Bits with bit type ‘rwl’ (except CP_EN and GPIO) until next device power-up. */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_LOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
|
||||
SBC_ErrorCode SBC_Unlock_Configuration(void) {
|
||||
SBC_ErrorCode errCode;
|
||||
|
||||
/* Unlock CP_EN and GPIO configuration. */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_NOTLOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
/* Unlock Bits with bit type ‘rwl’ (except CP_EN and GPIO). */
|
||||
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_NOTLOCKED, NULL);
|
||||
if(errCode.flippedBitsMask > 0) {
|
||||
return errCode;
|
||||
}
|
||||
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
|
||||
SBC_ErrorCode SBC_Clear_Wake_Status(void) {
|
||||
SBC_ErrorCode errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask != 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
|
||||
if(errCode.flippedBitsMask != 0) {
|
||||
return errCode;
|
||||
}
|
||||
errCode.SBC_Register = 0x00;
|
||||
errCode.flippedBitsMask = 0x00;
|
||||
errCode.expectedValue = 0x00;
|
||||
return errCode;
|
||||
}
|
||||
@ -1,393 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1.h
|
||||
*
|
||||
* @brief Main header declaration file for TLE94x1 SBC family device
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_H
|
||||
#define TLE94x1_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
|
||||
#include "TLE94x1_DEFINES.h"
|
||||
#include "TLE94x1_ISR.h"
|
||||
#include "TLE94x1_SPI.h"
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ================================ MACROS ================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/**
|
||||
* @def SBC_Write_Bit
|
||||
*
|
||||
* @brief This bit has to be set in order to write to a register.
|
||||
*/
|
||||
#define SBC_Write_Bit (0x80U)
|
||||
|
||||
/**
|
||||
* @def SBC_Read_Mask
|
||||
*
|
||||
* @brief A mask to prevent the user from accidentally writing to a register.
|
||||
*/
|
||||
#define SBC_Read_Mask (0x7FU)
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* =========================== Library Functions ============================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
struct __SBC_ErrorCode;
|
||||
|
||||
/**
|
||||
* @brief A structure for simple error readout.
|
||||
*
|
||||
* flippedBitsMask is greater than 0 if the value read from the register at SBC_Register differs from expectedValue.
|
||||
*/
|
||||
typedef struct __SBC_ErrorCode {
|
||||
uint8_t SBC_Register; //!< The register where an error occurred.
|
||||
uint8_t flippedBitsMask; //!< Masks the bits that differ from the expected value. Is 0 if readout is as expected.
|
||||
uint8_t expectedValue; //!< Expected readout of the register.
|
||||
} SBC_ErrorCode;
|
||||
|
||||
/**
|
||||
* @brief Typedef for interrupt callbacks.
|
||||
*/
|
||||
typedef void (*SBC_Func_Callback)(uint8_t callbackHandler);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- Main Functions ------------------------------- */
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will trigger the watchdog.
|
||||
*
|
||||
* The function must be called periodically according to the configured watchdog-time.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WD_Trigger(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will proceed a readout of a register.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be read out. See TLE94x1_DEFINES.h for definitions
|
||||
* @retval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the read register-value.
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*/
|
||||
uint16_t SBC_Read_Command(uint8_t SBC_Reg);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method will proceed a readout of a dedicated bitfield within a register
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldMsk Bit mask of the field to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldPos Bit position of the field to be readout. See TLE94x1_DEFINES.h for definitions
|
||||
*
|
||||
*
|
||||
* @retval A 8 bit value will be returned and includes the data of the bitfield to be read out *
|
||||
*/
|
||||
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Writes a whole byte to a register and verifies it.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_Val Byte to write to SBC_Reg
|
||||
* @param *returnval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*
|
||||
* @retval See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method can be used for manipulating a single bit-field in a control-register.
|
||||
*
|
||||
* It will readout the old value of the registers, manipulate the desired bit-field and keep
|
||||
* the other bit-configuration as it was.
|
||||
* For usage examples have a look at the implementations of different API calls below.
|
||||
*
|
||||
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldMsk Bit mask of the field to manipulate. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldPos Bit position of the field to manipulate. See TLE94x1_DEFINES.h for definitions
|
||||
* @param SBC_FieldVal New value which will be written to the bit-field. See TLE94x1_DEFINES.h for enumerations
|
||||
* @param *returnval A 16 bit value will be returned.
|
||||
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
|
||||
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
|
||||
*
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*
|
||||
*/
|
||||
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval);
|
||||
|
||||
|
||||
/**
|
||||
* @brief This method must be called one time at startup of the microcontroller.
|
||||
*
|
||||
* This method will initialize all registers of the SBC with the configuration-data of SBC_TLE94x1.h.
|
||||
* After this, the SBC can be used as normal.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Init(void);
|
||||
|
||||
/* -------------------------------- ISR Functions -------------------------------- */
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function can register a self-defined function to a specific interrupt-event of the SBC.
|
||||
*
|
||||
* Everytime the SBC_ISR() method is called and the associated status-bit is set, it will consider to
|
||||
* proceed a callback to this function later.
|
||||
* See all the possible ISR_Vectors in the TLE94x1_ISR.h
|
||||
*
|
||||
*
|
||||
* @param ISR_Vector Definition of the interrupt event. See all possible events in TLE94x1_ISR.h
|
||||
*
|
||||
* @param *Callback_Handler Pointer to the function which will be called back.
|
||||
* The function must accept a uint8_t as first argument.
|
||||
*/
|
||||
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler));
|
||||
|
||||
|
||||
/**
|
||||
* @brief Interrupt Service Routine for handling interrupts.
|
||||
*
|
||||
* This method must be called automatically everytime a rising-edge on the INTN pin is recognized.
|
||||
* In case, the INTN pin is not connected, this method can also be called periodically by the user during runtime.
|
||||
* The ISR will proceed a readout of all registered interrupts. If a status-bit of a registered interrupt is set,
|
||||
* it will initiate a callback to the registered function and give the registered function the status-register value
|
||||
* as a parameter.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_ISR(void);
|
||||
|
||||
|
||||
|
||||
/* -------------------------------- API Calls ----------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enters SBC normal mode
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Normal(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enters SBC stop mode
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Stop(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clears all wake status registers and enter SBC sleep mode. Depending on configuration also the selective-wake feature will be initialized
|
||||
* before entering sleep mode. In case, the SWK option is enabled and the internal CAN protocol handler is not in sync when calling this function,
|
||||
* the sleep mode will be not entered.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Mode_Sleep(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the duty-cycle of the internal PWM generator
|
||||
*
|
||||
* @param PWM_DC Set the duty-cycle with values of 0-255 for 0% to 100%
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_DutyCycle_PWM(uint8_t PWM_DC);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the OnTime of the internal timer.
|
||||
*
|
||||
* @param OnTime On time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_Timer_On(uint8_t OnTime);
|
||||
|
||||
/**
|
||||
* @brief Sets the Period time of the internal timer
|
||||
*
|
||||
* @param Period Period time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Set_Timer_Period(uint8_t Period);
|
||||
|
||||
|
||||
/**
|
||||
* @brief FO output activated by software for testing. Only working if FO/GPIO is configured as FO
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_FO_Test_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief FO output deactivated by software for testing. Only working if FO/GPIO is configured as FO
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_FO_Test_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Charge-Pump (VCP-Pin) is enabled. See chapter 5.3 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_CP_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Charge-Pump (VCP-Pin) is disabled. See chapter 5.3 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_CP_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable Voltage Sensing. No wake-up events are generated. See chapter 9.2.4 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WK_MEAS_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Disable Voltage Sensing and enable wake-up functionality. See chapter 9.2.4 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_WK_MEAS_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief WK is enabled as wake source. See chapter 5.2.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_On(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief WK wake-up disabled. See chapter 5.2.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reads System Status Control, both lower and higher bits. See page 138 in datasheet.
|
||||
*
|
||||
* @retval Upper 8 bit are read from register SBC_SYS_STATUS_CTRL_1 and the lower 8 bit from SBC_SYS_STATUS_CTRL_0
|
||||
*/
|
||||
uint16_t SBC_SYS_STAT_Read(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Writes System Status Control, both lower and higher bits. See page 138 in datasheet.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Locks CP_EN, GPIO configuration and 'rwl'-bits.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Lock_Configuration(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Unlocks CP_EN, GPIO configuration and 'rwl'-bits.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Unlock_Configuration(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clears both Wake Status registers.
|
||||
*
|
||||
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
|
||||
*/
|
||||
SBC_ErrorCode SBC_Clear_Wake_Status(void);
|
||||
|
||||
#endif /*TLE94x1_H*/
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,127 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_ISR.h
|
||||
*
|
||||
* @brief Declaration file for ISR-Vectors and ISR related functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_ISR_H
|
||||
#define TLE94x1_ISR_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1_DEFINES.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ================================ MACROS ==================================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
/**
|
||||
* @def SBC_ISR_VECTOR
|
||||
*
|
||||
* @brief Vector defining the handling of interrupts.
|
||||
*
|
||||
* Vectors of this type have to be registered by the SBC_Register_Callback method.
|
||||
*/
|
||||
#define SBC_ISR_VECTOR(REG,MASK,POS,COMPARE) ((((uint32_t)REG) << 24) | (((uint32_t)MASK) << 16) | (((uint32_t)POS) << 8) | ((uint32_t)COMPARE))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ======================= General Interrupt Defines ========================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
|
||||
/* Interrupts based on WK_STAT_0 and WK_STAT_1 register are always available */
|
||||
#define SBC_ISR_CAN_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_CAN_WU_Msk, SBC_WK_STAT_0_CAN_WU_Pos, SBC_CAN_WU_EVENT)
|
||||
#define SBC_ISR_TIMER_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_TIMER_WU_Msk, SBC_WK_STAT_0_TIMER_WU_Pos, SBC_TIMER_WU_EVENT)
|
||||
#define SBC_ISR_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_WK_WU_Msk, SBC_WK_STAT_0_WK_WU_Pos, SBC_WK_WU_EVENT)
|
||||
#define SBC_ISR_GPIO_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_1, SBC_WK_STAT_1_GPIO_WK_WU_Msk, SBC_WK_STAT_1_GPIO_WK_WU_Pos, SBC_GPIO_WK_WU_EVENT)
|
||||
|
||||
|
||||
/* Following interrupts only usable if INT_GLOBAL bit is set to '1' */
|
||||
#define SBC_ISR_VS_UV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_UV_Msk, SBC_SUP_STAT_1_VS_UV_Pos, SBC_VS_UV_EVENT)
|
||||
#define SBC_ISR_VS_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_OV_Msk, SBC_SUP_STAT_1_VS_OV_Pos, SBC_VS_OV_EVENT)
|
||||
#define SBC_ISR_VCC1_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_OV_Msk, SBC_SUP_STAT_1_VCC1_OV_Pos, SBC_VCC1_OV_EVENT)
|
||||
#define SBC_ISR_VCC1_UV_PREWARN SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_WARN_Msk, SBC_SUP_STAT_1_VCC1_WARN_Pos, SBC_VCC1_UV_PREWARN_EVENT)
|
||||
#define SBC_ISR_VCC2_OT SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_OT_Msk, SBC_SUP_STAT_0_VCC2_OT_Pos, SBC_VCC2_OT_EVENT)
|
||||
#define SBC_ISR_VCC2_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_UV_Msk, SBC_SUP_STAT_0_VCC2_UV_Pos, SBC_VCC2_UV_EVENT)
|
||||
#define SBC_ISR_VCC1_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC1_UV_Msk, SBC_SUP_STAT_0_VCC1_UV_Pos, SBC_VCC1_UV_EVENT)
|
||||
#define SBC_ISR_TSD2_SAFESTATE SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD2_SAFE_Msk, SBC_THERM_STAT_TSD2_SAFE_Pos, SBC_TSD2_SAFE_SAFESTATE_DETECTED)
|
||||
#define SBC_ISR_TSD1 SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD1_Msk, SBC_THERM_STAT_TSD1_Pos, SBC_TSD1_EVENT)
|
||||
#define SBC_ISR_TPW SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TPW_Msk, SBC_THERM_STAT_TPW_Pos, SBC_TPW_EVENT)
|
||||
#define SBC_ISR_RESTART_AFTER_FAIL SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_RESTART_AFTER_FAIL)
|
||||
#define SBC_ISR_FROM_SLEEPMODE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_SLEEP_MODE)
|
||||
#define SBC_ISR_WD_FAIL_1 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_1FAIL)
|
||||
#define SBC_ISR_WD_FAIL_2 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_2FAIL)
|
||||
#define SBC_ISR_FAILURE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_FAILURE_Msk, SBC_DEV_STAT_FAILURE_Pos, SBC_FAILURE_EVENT)
|
||||
#define SBC_ISR_CAN_TSD SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TSD)
|
||||
#define SBC_ISR_CAN_TXD_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TXD_DOM_TO)
|
||||
#define SBC_ISR_CAN_BUS_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_BUS_DOM_TO)
|
||||
#define SBC_ISR_VCAN_UV SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_VCAN_UV_Msk, SBC_BUS_STAT_VCAN_UV_Pos, SBC_VCAN_UV_EVENT)
|
||||
#define SBC_ISR_GPIO_OC SBC_ISR_VECTOR(SBC_GPIO_OC_STAT, SBC_GPIO_OC_STAT_GPIO_OC_Msk, SBC_GPIO_OC_STAT_GPIO_OC_Pos, SBC_GPIO_OC_EVENT)
|
||||
#define SBC_ISR_GPIO_OL SBC_ISR_VECTOR(SBC_GPIO_OL_STAT, SBC_GPIO_OL_STAT_GPIO_OL_Msk, SBC_GPIO_OL_STAT_GPIO_OL_Pos, SBC_GPIO_OL_EVENT)
|
||||
|
||||
|
||||
#endif /*TLE94x1_ISR_H*/
|
||||
@ -1,156 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_SPI.c
|
||||
*
|
||||
* @brief Implementation of all SPI related functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include "TLE94x1_SPI.h"
|
||||
#include "mcu.h"
|
||||
|
||||
void SPI_PortInit(void);
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ======================= SPI communication functions ====================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
|
||||
uint8_t spitxbuf[10],spirxbuf[10];
|
||||
extern McuType mcu;
|
||||
uint8_t SBC_SPI_INIT(void) {
|
||||
SpiDrv_InitCfgType masterCfg;
|
||||
|
||||
SPI_PortInit();
|
||||
|
||||
SpiDrv_GetDefaultConfig(&masterCfg);
|
||||
masterCfg.basicParameters.isMasterNode = true;
|
||||
masterCfg.basicParameters.baudRate = 1000000ul;
|
||||
masterCfg.basicParameters.pcsSelection = 1;
|
||||
//masterCfg.basicParameters.clockPolarity = SPIDRV_CLK_POLARITY_IDLE_IN_HIGH;
|
||||
masterCfg.basicParameters.clockPhase = SPIDRV_CLK_PHASE_DATA_SAMPLE_ON_TRAILING_EDGE;
|
||||
|
||||
while(ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_SPI0, &masterCfg.basicParameters.busClockFreq) == false)
|
||||
{
|
||||
;
|
||||
}
|
||||
SpiDrv_SetConfig(&mcu.spiDrv0, &masterCfg);
|
||||
|
||||
SpiDrv_SetRxFifoWaterMask(&mcu.spiDrv0, 0);
|
||||
//SpiDrv_SetIsrConfig(&mcu.spiDrv0, SPIDRV_ISR_SRC_RX_DATA, true);
|
||||
|
||||
/* Enable the SPI interrupts */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower) {
|
||||
uint16_t ret;
|
||||
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_LOW);
|
||||
spitxbuf[0] = Upper;
|
||||
spitxbuf[1] = Lower;
|
||||
|
||||
SpiDrv_MasterSyncTransfer(&mcu.spiDrv0,SPIDRV_FRAME_SIZE_BIT_TYPE_BYTE,2,spitxbuf,spirxbuf);
|
||||
//LPSPI_DRV_MasterTransferBlocking(LPSPICOM1,spitxbuf,spirxbuf,2,10);
|
||||
ret = spirxbuf[0];
|
||||
ret <<= 8;
|
||||
ret |= spirxbuf[1];
|
||||
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_HIGH);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/********************CVA SPI DRV**********************/
|
||||
|
||||
void SPI0_Handler(void)
|
||||
{
|
||||
if(SpiDrv_GetStatus(&mcu.spiDrv0, SPIDRV_STATUS_RX_DATA) == true && SpiDrv_GetIsrConfig(&mcu.spiDrv0, SPIDRV_ISR_SRC_RX_DATA) == true)
|
||||
{
|
||||
//spi0IrqCnt++;
|
||||
//uint8_t len = SpiDrv_AsyncReceive(&mcu.spiDrv0, (void *)masterRxBuff, true);
|
||||
}
|
||||
}
|
||||
|
||||
void SPI_PortInit(void)
|
||||
{
|
||||
/* SPI CS */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 5, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 5, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 5, 1);
|
||||
|
||||
/* SPI CLK */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 2, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 2, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 2, 1);
|
||||
|
||||
/* SPI SIN */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 4, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 4, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 4, 1);
|
||||
|
||||
/* SPI SOUT */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptb, 3, PINSDRV_MUX_ALT3);
|
||||
/* Strength driver */
|
||||
PortReg_SetPcrDrvStr(mcu.ptb.port, 3, 1);
|
||||
/* fast slew rate */
|
||||
PortReg_SetPcrSr(mcu.ptb.port, 3, 1);
|
||||
}
|
||||
|
||||
void SPI_TEST_TASK(void)
|
||||
{
|
||||
|
||||
}
|
||||
@ -1,95 +0,0 @@
|
||||
/*********************************************************************************************************************
|
||||
* Copyright (c) 2019, Infineon Technologies AG
|
||||
*
|
||||
*
|
||||
* Distributed under the Boost Software License, Version 1.0.
|
||||
*
|
||||
*
|
||||
* Boost Software License - Version 1.0 - August 17th, 2003
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person or organization
|
||||
* obtaining a copy of the software and accompanying documentation covered by
|
||||
* this license (the "Software") to use, reproduce, display, distribute,
|
||||
* execute, and transmit the Software, and to prepare derivative works of the
|
||||
* Software, and to permit third-parties to whom the Software is furnished to
|
||||
* do so, all subject to the following:
|
||||
*
|
||||
* The copyright notices in the Software and this entire statement, including
|
||||
* the above license grant, this restriction and the following disclaimer,
|
||||
* must be included in all copies of the Software, in whole or in part, and
|
||||
* all derivative works of the Software, unless such copies or derivative
|
||||
* works are solely in the form of machine-executable object code generated by
|
||||
* a source language processor.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
|
||||
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
|
||||
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*********************************************************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************************************//**
|
||||
* @file TLE94x1_SPI.h
|
||||
*
|
||||
* @brief Declaration file for TLE94x1 SBC family device SPI functions
|
||||
*
|
||||
* @version V1.0.0
|
||||
* @date 15. April 2019
|
||||
* @author Markus Noll / markus.noll@infineon.com
|
||||
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
|
||||
*******************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef TLE94x1_SPI_H
|
||||
#define TLE94x1_SPI_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================ HEADER FILES ================================ */
|
||||
/* ================================================================================ */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
|
||||
/* ================================================================================ */
|
||||
/* ============================= SPI Functions ============================== */
|
||||
/* ================================================================================ */
|
||||
|
||||
/**
|
||||
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
|
||||
*
|
||||
* The function has to initialze the SPI of the uC and will be called once during SBC_Init().
|
||||
* In case, the SPI hardware is already initialized by some other code before, it can be left blank.
|
||||
*
|
||||
* @retval Method has to return 0 if initialization was successful.
|
||||
*/
|
||||
uint8_t SBC_SPI_INIT(void);
|
||||
|
||||
/**
|
||||
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
|
||||
*
|
||||
* The function will be called by the library everytime when a SPI communication is needed.
|
||||
* The function proceeds a bidirectional 16-bit transfer to/from the SBC .
|
||||
* As some UCs only supports 8-Bit transfers, the input arguments are split in two 8-bit arguments.
|
||||
* For further implementation details have a look at datasheet chapter 13.1 or at the Arduino-examples.
|
||||
*
|
||||
* @param Upper The first 8 bit to transmit to the SBC.
|
||||
* @param Lower The second 8 bit to transmit to the SBC.
|
||||
* @retval The function will return all 16 bits received from the SBC.
|
||||
* Bit[15:8] are the first 8 bits received (Status-Information-Field).
|
||||
* Bit[7:0] is the data-field transmitted of the SBC.
|
||||
*/
|
||||
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower);
|
||||
|
||||
#endif /* TLE94x1_SPI_H */
|
||||
@ -25,7 +25,6 @@
|
||||
#include "uds.h"
|
||||
#include "uds_user.h"
|
||||
#include "mcu.h"
|
||||
#include "TLE94x1.h"
|
||||
#include "SEGGER_RTT.h"
|
||||
|
||||
/*******************************************************************************
|
||||
@ -62,7 +61,7 @@ __root const Bootloade_CfgInfoType sBootloader_Version = {
|
||||
.BLVersion = "BL0101",
|
||||
.bootBuildDate = __DATE__,
|
||||
.bootBuildTime = __TIME__,
|
||||
.ECUName = "RP-77B",
|
||||
.ECUName = "WK-K86",
|
||||
};
|
||||
|
||||
static Bootloader_CbType sBootloader_Cb;
|
||||
@ -477,7 +476,7 @@ static void Bootloader_Reset(void)
|
||||
static void Bootloader_HardReset(void)
|
||||
{
|
||||
/* TODO */
|
||||
SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_RESET, NULL);
|
||||
//SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_RESET, NULL);
|
||||
}
|
||||
|
||||
/*! \brief pgm positive respose to eol
|
||||
@ -1280,15 +1279,16 @@ void Bootloader_TimingProcess(uint8_t periodms)
|
||||
if(sBootloader_Cb.resetReqEn == true)
|
||||
{
|
||||
sBootloader_Cb.resetReqEn = false;
|
||||
/*//SBC RESET
|
||||
if (sBootloader_Cb.resetReqMode == 1)
|
||||
{
|
||||
Bootloader_HardReset();
|
||||
Bootloader_Reset();
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
Bootloader_Reset();
|
||||
}
|
||||
|
||||
}*/
|
||||
Bootloader_Reset();
|
||||
}
|
||||
}
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
#include "fls.h"
|
||||
#include "uds_user.h"
|
||||
#include "SEGGER_RTT.h"
|
||||
#include "TLE94x1.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* the defines
|
||||
@ -305,23 +305,6 @@ void BootReqInit(void)
|
||||
clockConfig.div = 1;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV, &clockConfig);
|
||||
|
||||
clockConfig.gating = true;
|
||||
clockConfig.source = CLOCKDRV_PLL;
|
||||
clockConfig.div = 2;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV, &clockConfig);
|
||||
|
||||
/* Setup the SPI clock */
|
||||
clockConfig.gating = true;
|
||||
clockConfig.source = CLOCKDRV_PLL_DIV;
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI0, &clockConfig);
|
||||
|
||||
uint32_t tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv0.reg);
|
||||
SpiDrv_SetPrescaler(&tTcr,0x02);
|
||||
|
||||
SBC_SPI_INIT();
|
||||
|
||||
|
||||
SBC_Init();
|
||||
|
||||
}
|
||||
uint32_t rollingcounter;
|
||||
@ -347,8 +330,6 @@ int main(void)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Enable the clock for all port peripheral */
|
||||
clockConfig.gating = true;
|
||||
clockConfig.div = 1;
|
||||
@ -358,12 +339,13 @@ int main(void)
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTD, &clockConfig);
|
||||
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTE, &clockConfig);
|
||||
|
||||
|
||||
//STB
|
||||
/* set PTC1 MUX as GPIO */
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptd, 1, PINSDRV_MUX_AS_GPIO);
|
||||
PinsDrv_SetMuxModeSel(&mcu.ptc, 9, PINSDRV_MUX_AS_GPIO);
|
||||
/* set PTC1 as GPIO output */
|
||||
PinsDrv_SetPinDirection(&mcu.ptd, 1, 0);
|
||||
PinsDrv_SetPullSel(&mcu.ptd,1,PINSDRV_INTERNAL_PULL_UP);
|
||||
|
||||
PinsDrv_SetPinDirection(&mcu.ptc, 9, 1);
|
||||
PinsDrv_WritePin(&mcu.ptc, 9, 0);
|
||||
|
||||
/* get CAN controller default configuration */
|
||||
FlexCanBoot_Init();
|
||||
@ -393,11 +375,6 @@ int main(void)
|
||||
|
||||
if (gSystick1msCnt % 10 == 0)
|
||||
{
|
||||
//SEGGER_RTT_printf(0,"-----SBC_WD_Trigger-----\n");
|
||||
if (BootReqFlag == 1)
|
||||
{
|
||||
SBC_WD_Trigger();
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
@ -406,21 +383,8 @@ int main(void)
|
||||
{
|
||||
gSystick1msCnt = 0;
|
||||
//TxTestMsg(testdata);
|
||||
|
||||
//SEGGER_RTT_printf(0,"-boot running-\n");
|
||||
uint8_t ret = SBC_Read_Command(SBC_M_S_CTRL);
|
||||
SEGGER_RTT_printf(0,"%04d : M_S_CTRL = 0x%x\n",rollingcounter++,ret);
|
||||
}
|
||||
if (BootReqFlag == 0)
|
||||
{
|
||||
BootReqDelay++;
|
||||
if (BootReqDelay > 10)
|
||||
{
|
||||
BootReqFlag = 1;
|
||||
BootReqInit();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user