K86/cva_asw_m0118/src/TLE9461/SBC_TLE94x1.h

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2025-02-03 20:43:43 +08:00
/**
* @cond
***********************************************************************************************************************
*
* Copyright (c) 2018, Infineon Technologies AG
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
* following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
* disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
* following disclaimer in the documentation and/or other materials provided with the distribution.
*
* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
**********************************************************************************************************************/
#ifndef SBC_TLE94X1_H
#define SBC_TLE94X1_H
/* XML Version 0.0.6 */
#define SBC_XML_VERSION (00006)
#define CTRL_BUS_CTRL_0 (0x3) /*decimal 3*/
#define CTRL_BUS_CTRL_3 (0x0) /*decimal 0*/
#define CTRL_GPIO_CTRL (0x4) /*decimal 4*/
#define CTRL_HW_CTRL_0 (0x40) /*decimal 64*/
#define CTRL_HW_CTRL_1 (0x0) /*decimal 0*/
#define CTRL_HW_CTRL_2 (0x40) /*decimal 64*/
#define CTRL_HW_CTRL_3 (0x1) /*decimal 1*/
#define CTRL_M_S_CTRL (0x13) /*decimal 19*/
#define CTRL_PWM_CTRL (0x0) /*decimal 0*/
#define CTRL_PWM_FREQ_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_BTL0_CTRL (0x50) /*decimal 80*/
#define CTRL_SWK_CAN_FD_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_CDR_CTRL2 (0x1) /*decimal 1*/
#define CTRL_SWK_CDR_LIMIT_HIGH_CTRL (0x54) /*decimal 84*/
#define CTRL_SWK_CDR_LIMIT_LOW_CTRL (0x4C) /*decimal 76*/
#define CTRL_SWK_DATA_H_CTRL 0x00000000
#define CTRL_SWK_DATA_L_CTRL 0x00000000
#define CTRL_SWK_DLC_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_ID0_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_IDx_CTRL 0x00000000
#define CTRL_SWK_MASK_IDx_CTRL 0x00000000
#define CTRL_TIMER_CTRL (0x0) /*decimal 0*/
#define CTRL_WD_CTRL (0x15) /*decimal 21*/
#define CTRL_WK_CTRL_0 (0x0) /*decimal 0*/
#define CTRL_WK_CTRL_1 (0x0) /*decimal 0*/
#define CTRL_WK_PUPD_CTRL (0x0) /*decimal 0*/
#define LED_Math_extendedID (0x1) /*decimal 1*/
#define LED_Math_extendedIDMsk (0x1) /*decimal 1*/
#define MATH_Baudrate (0x2) /*decimal 2*/
#define MATH_CDR_FrequencyMHz (0x28) /*decimal 40*/
#define MATH_DoubleCDRFreq (0x0) /*decimal 0*/
#define MATH_EN_PN (0x1) /*decimal 1*/
#define MATH_PWM_DC (0.0)
#endif /* SBC_TLE94X1_H */