#include #include #include #include #include #include #include #include #include #include "wdt_device.h" uint8_t trim1V5 = 0; void main(void) { #if ENABLE_FUNCTION_VALIDATION == 1 // validation_main(); #endif /* !!!!!!!MUST BE called firstly here for initializing system parameters !!!!*/ PDS_Init(); /* System init for hardwre init */ SYS_Init(); /* system main infinite loop */ // WDTA_Enable(WDTA_INTERVAL_2304MS); WDTA_Disable(); // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.ANASELREG = 0x4000;//0x4000: PB7 analog connection is switched on // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.GPIOCONREG = 0X400;//0x400: Select CSA_Filter_OUT to PB7 // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.GPIOCONSEL = 1;// 0x1: GPIO_CON_REG controls analog test MUX. // delay(100); // SYSCTRLA_SFRS->DEBUG_ACCESS_KEY.DEBUG_ACCESS_KEY = 0x05; // while(SYSCTRLA_SFRS->DEBUG_ACCESS_ENABLED == 0); // // SYSCTRLA_SFRS->TRIM_ACCESS_KEY.TRIM_ACCESS_KEY = 0x0E; // while(SYSCTRLA_SFRS->TRIM_ACCESS_ENABLED == 0); // // TRIMHV_SFRS->TRIM_LF_RC = 0XB0; // // // SYSCTRLA_SFRS->PMU_ACCESS_KEY.PMU_ACCESS_KEY = 0x0A; // while(SYSCTRLA_SFRS->PMU_ACCESS_ENABLED == 0); // // TRIMHV_SFRS->PMUTRIM.VDD1V5_LDO_TRIM = 3U; // trim1V5 = TRIMHV_SFRS->PMUTRIM.VDD1V5_LDO_TRIM; // // if(trim1V5 == 3){ // IOCTRLA_SFRS->CTRL_MODE[GROUP_GPIOB].PU &= ~(1U << (uint8_t)GPIO_PORT_7); // IOCTRLA_SFRS->CTRL_MODE[GROUP_GPIOB].PD &= ~(1U << (uint8_t)GPIO_PORT_7); // //mode config 1 // IOCTRLA_SFRS->PORT_GROUP_MUX[GROUP_GPIOB] &= ~(0x0FUL << (4U*(uint8_t)GPIO_PORT_7)); // IOCTRLA_SFRS->PORT_GROUP_MUX[GROUP_GPIOB] |= (0x01UL << (4U*(uint8_t)GPIO_PORT_7)); // //select output signal // IOCTRLA_SFRS->TESTMUX.TESTMUX3 = 8U; // // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.ANASELREG = 0x800;//0x800: PB4 analog connection is switched on // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.GPIOCONREG = 2;//0x2: Select VDD1V5 to PB4 // IOCTRLA_SFRS->ANALOGTESTMUXOVERRIDE.GPIOCONSEL = 1;// 0x1: GPIO_CON_REG controls analog test MUX. // } // WDTA_Enable(WDTA_INTERVAL_2304MS); // VDD3V3EXT_ON; for(;;){ TM_RunTasks(); } }