/**
 * @copyright 2023 indie Semiconductor
 *
 * This file is proprietary to indie Semiconductor.
 * All rights reserved. Reproduction or distribution, in whole
 * or in part, is forbidden except by express written permission
 * of indie Semiconductor.
 *
 * @file trimhv_sfr.h
 */

#ifndef TRIMHV_SFR_H__
#define TRIMHV_SFR_H__

#include <stdint.h>

/* -------  Start of section using anonymous unions and disabling warnings  ------- */
#if   defined (__CC_ARM)
  #pragma push
  #pragma anon_unions
#elif defined (__ICCARM__)
  #pragma language=extended
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic push
  #pragma clang diagnostic ignored "-Wc11-extensions"
  #pragma clang diagnostic ignored "-Wreserved-id-macro"
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning 586
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif

/**
 * @brief A structure to represent Special Function Registers for TRIMHV.
 */
typedef struct {

  union {
    struct {
      uint8_t  RETAIN0                  :  8; /*!< Firmware scratch register 0 */
      uint8_t  RETAIN1                  :  8; /*!< Firmware scratch register 1 */
      uint16_t                          : 16; /*   (reserved) */
    };
    uint32_t WORD;
  } RETAIN; /* +0x000 */

  uint8_t  TRIM_LF_RC;                        /*<! LF RC oscillator trim +0x004 */
  uint8_t  _RESERVED_05[3];                   /* +0x005 */

  union {
    struct {
      uint8_t  LINS_PU30K_ENA           :  1; /*!< LIN 30K pullup enable */
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  LINS_RXENA               :  1; /*!< LIN receive  enable */
      uint8_t  LINS_PUOFF_TIMEOUT       :  1; /*!< LINS Pullup Disable in dominant TimeOut condition */
      uint8_t  LINS_RXD_HIGH_RST_ENA    :  1;
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  LINS_SLEEP_GF_THRES0     :  4;
      uint8_t  LINS_SLEEP_GF_THRES1     :  4;
      uint8_t  LINSWAKEUPDETECTTHRES    :  8; /*!< Wakeup Detection Threshold */
      uint8_t  LINSBUSINACTIVITYTIME    :  2; /*!< Bus Inactivity Time */
      uint8_t  LINSBUSDOMINANTRELEASEWUPENA :  1; /*!< Bus Dominant Release Wakeup Enable */
      uint8_t                           :  4; /*   (reserved) */
      uint8_t  LINS_SLEEP               :  1; /*!< LINS Sleep Request */
    };
    uint32_t WORD;
  } LINS; /* +0x008 */

  union {
    struct {
      uint8_t  LINS_TX_SLOPE            :  8;
      uint8_t  LINS_TX_BIAS_BOOST       :  3;
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  LINS_RX_BIAS_BOOST       :  2;
      uint8_t                           :  2; /*   (reserved) */
      uint8_t                           :  8; /*   (reserved) */
      uint8_t  LINS_TX_DUTY             :  8;
    };
    uint32_t WORD;
  } LINSTRIM; /* +0x00C */

  union {
    struct {
      uint8_t  SCAN_MODE_SET            :  8;
      uint8_t  SCAN_ACCKEY              :  8;
      uint16_t                          : 16; /*   (reserved) */
    };
    uint32_t WORD;
  } SCANMODER; /* +0x010 */

  union {
    struct {
      uint8_t  ENABORTESTMODE           :  8; /*!< BOR Testmode Enable */
      uint8_t  VDD33EXT_EN              :  1; /*!< VDD3V3 External LDO Enable */
      uint8_t  DISCHARGE_VDD33EXT       :  1; /*!< VDD33 External LDO discharge */
      uint8_t                           :  6; /*   (reserved) */
      uint8_t  OCP_CTRL_3V3_EXT         :  4; /*!< OCP trim for 3P3V External LDO(default 30mA) at PMU debug mode */
      uint8_t  VDD3V3EXT_LDO_TRIM       :  4;
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } BORTESTMODE; /* +0x014 */

  union {
    struct {
      uint8_t                           :  4; /*   (reserved) */
      uint8_t  BG_OK                    :  1; /*!< the flag of bandgap OK */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  DBG_EN_LOWIQ             :  1;
      uint8_t  DBG_DIS_BG_UVLO          :  1;
      uint8_t  DBG_EN_LP_CAPLESS        :  1;
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  OPT_EN_LOWIQ             :  1;
      uint8_t  OPT_EN_LP_CAPLESS        :  1;
      uint8_t                           :  2; /*   (reserved) */
      uint8_t                           :  4; /*   (reserved) */
      uint8_t  DBG_DISCHARGE_3V3        :  1;
      uint8_t  PD1V5_ENA_HIBERNATE      :  1; /*!< enable of 1V5 Power Domain at Power down mode */
      uint8_t                           :  2; /*   (reserved) */
      uint8_t  DBG_DIS_CP               :  1;
      uint8_t  DBG_DIS_LDO_3V3          :  1;
      uint8_t  DBG_DIS_LDO_1V5          :  1;
      uint8_t  DBG_DIS_BOR_3V3          :  1;
      uint8_t  DBG_DIS_BOR_1V5          :  1;
      uint8_t  DBG_ISO                  :  1;
      uint8_t                           :  2; /*   (reserved) */
    };
    uint32_t WORD;
  } PMUCTRLR; /* +0x018 */

  union {
    struct {
      uint8_t  OCP_CTRL_1V5             :  4; /*!< OCP trim for 1.5V LDO(default 30mA) at PMU debug mode */
      uint8_t  OCP_CTRL_3V3             :  4; /*!< OCP trim for 3P3V LDO(default 30mA) at PMU debug mode */
      uint8_t  TRIM_VREF_BUF            :  8;
      uint8_t  TRIM_BG                  :  8;
      uint8_t  VDD1V5_LDO_TRIM          :  2;
      uint8_t                           :  2; /*   (reserved) */
      uint8_t  VDD3V3_LDO_TRIM          :  3;
      uint8_t                           :  1; /*   (reserved) */
    };
    uint32_t WORD;
  } PMUTRIM; /* +0x01C */

  union {
    struct {
      uint8_t  UVLEVEL                  :  8; /*!< Battery Voltage Monitor Under Voltage Select */
      uint8_t  UVHYS                    :  8; /*!< Battery Voltage Monitor Under Voltage Hysterisis Select */
      uint8_t  OVLEVEL                  :  8; /*!< Battery Voltage Monitor Over Voltage Select */
      uint8_t  OVHYS                    :  2; /*!< Battery Voltage Monitor Over Voltage Hysterisis Select */
      uint8_t                           :  4; /*   (reserved) */
      uint8_t  BAT_UV_EN                :  1; /*!< Battery Under Voltage Monitor Enable */
      uint8_t  BAT_OV_EN                :  1; /*!< Battery Over Voltage Monitor Enable */
    };
    uint32_t WORD;
  } VBATTRIM; /* +0x020 */

  union {
    struct {
      uint8_t  VDD3V3                   :  1; /*!< BOR 3v3 action */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  VDD1V5                   :  1; /*!< BOR 1v5 action */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BOR3V3FLAGPRE5V          :  1; /*!< BOR 3v3 flag */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BOR1V5FLAGPRE5V          :  1; /*!< BOR 1v5 flag */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BOR3V3FLAGCLR            :  1; /*!< BOR 3v3 clear */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BOR1V5FLAGCLR            :  1; /*!< BOR 1v5 clear */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BOR_3V3_LOCK             :  1;
      uint8_t                           :  6; /*   (reserved) */
      uint8_t  BOR_1V5_LOCK             :  1;
    };
    uint32_t WORD;
  } BORACTION; /* +0x024 */

  union {
    struct {
      uint8_t  S_BOR_3P3V               :  8; /*!< BOR 3v3 threshold */
      uint8_t                           :  8; /*   (reserved) */
      uint8_t  S_BOR_1P5V               :  8; /*!< BOR 1v5 threshold */
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } BORCONFIG; /* +0x028 */

  union {
    struct {
      uint8_t  ENA_BOR1V5_DEGLITCH      :  1;
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  SEL_BOR1V5_NEG_DEGLITCH  :  2;
      uint8_t  SEL_BOR1V5_POS_DEGLITCH  :  2;
      uint8_t  ENA_BOR3V3_DEGLITCH      :  1;
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  SEL_BOR3V3_NEG_DEGLITCH  :  2;
      uint8_t  SEL_BOR3V3_POS_DEGLITCH  :  2;
      uint16_t                          : 16; /*   (reserved) */
    };
    uint32_t WORD;
  } BORDEGLITCH; /* +0x02C */

  union {
    struct {
      uint8_t  VTEMP_SEL                :  8; /*!< Over Temp protect threshold temp trim */
      uint8_t                           :  8; /*   (reserved) */
      uint8_t                           :  8; /*   (reserved) */
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  TEMPSENSE_EN             :  1; /*!< enable Temp Sensor Analog Part */
      uint8_t                           :  6; /*   (reserved) */
    };
    uint32_t WORD;
  } OVTEMPCONFIG; /* +0x030 */

} TRIMHV_SFRS_t;

/* --------  End of section using anonymous unions and disabling warnings  -------- */
#if   defined (__CC_ARM)
  #pragma pop
#elif defined (__ICCARM__)
  /* leave anonymous unions enabled */
#elif (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic pop
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning restore
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif

/**
 * @brief The starting address of TRIMHV SFRS.
 */
#define TRIMHV_SFRS ((__IO TRIMHV_SFRS_t *)0x40000900)

#endif /* end of __TRIMHV_SFR_H__ section */