/** * @copyright 2023 indie Semiconductor * * This file is proprietary to indie Semiconductor. * All rights reserved. Reproduction or distribution, in whole * or in part, is forbidden except by express written permission * of indie Semiconductor. * * @file ioctrla_sfr.h */ #ifndef IOCTRLA_SFR_H__ #define IOCTRLA_SFR_H__ #include /* ------- Start of section using anonymous unions and disabling warnings ------- */ #if defined (__CC_ARM) #pragma push #pragma anon_unions #elif defined (__ICCARM__) #pragma language=extended #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #pragma clang diagnostic push #pragma clang diagnostic ignored "-Wc11-extensions" #pragma clang diagnostic ignored "-Wreserved-id-macro" #elif defined (__GNUC__) /* anonymous unions are enabled by default */ #elif defined (__TMS470__) /* anonymous unions are enabled by default */ #elif defined (__TASKING__) #pragma warning 586 #elif defined (__CSMC__) /* anonymous unions are enabled by default */ #else #warning Not supported compiler type #endif /** * @brief A structure to represent Special Function Registers for IOCTRLA. */ typedef struct { uint8_t PU : 8; /*!< Pull-up enable */ uint8_t PD : 8; /*!< Pull-down enable */ uint8_t RE : 8; /*!< Read enable */ uint8_t : 8; /* (reserved) */ }PortGroupCtrlMode_t; typedef struct { uint32_t PORT_GROUP_MUX[3]; PortGroupCtrlMode_t CTRL_MODE[3]; union { struct { uint8_t TESTMUX0 : 8; uint8_t TESTMUX1 : 8; uint8_t TESTMUX2 : 8; uint8_t TESTMUX3 : 8; }; uint32_t WORD; } TESTMUX; /* +0x018 */ union { struct { uint8_t LINSRXGFENA : 2; /*!< LINS RXD Glitch Filter enables */ uint8_t LINS_RX_GF_ENA_1ST : 1; /*!< LINS RXD 1st Glitch Filter enables */ uint8_t LINS_RX_GF_ENA_2ND : 1; /*!< LINS RXD 2nd Glitch Filter enables */ uint8_t LINS_DBNC_PRESCALE_EN : 1; /*!< LINS Debounce prescale enable */ uint8_t LINS_DBNC_PRESCALE : 2; /*!< LINS Debounce prescaler select */ uint8_t : 1; /* (reserved) */ uint8_t LINSDBNCTHRES0 : 8; /*!< 3rd Stage LINS Debounce Threshold for 1 to 0 */ uint8_t LINSDBNCTHRES1 : 8; /*!< 3rd Stage LINS Debounce Threshold for 0 to 1 */ uint8_t LINS_RX_GF_SEL_1ST : 8; /*!< LINS RXD 1st Glitch Filter select dualedge or single-edge */ }; uint32_t WORD; } LINSGFCONF; /* +0x01C */ union { struct { uint8_t LINS_DBNC_THRES0_1ST : 8; /*!< 1st Stage LINS Debounce Threshold for 1 to 0 */ uint8_t LINS_DBNC_THRES1_1ST : 8; /*!< 1st Stage LINS Debounce Threshold for 0 to 1 */ uint8_t LINS_DBNC_THRES0_2ND : 8; /*!< 2nd Stage LINS Debounce Threshold for 1 to 0 */ uint8_t LINS_DBNC_THRES1_2ND : 8; /*!< 2nd Stage LINS Debounce Threshold for 0 to 1 */ }; uint32_t WORD; } LINSGFCONF1; /* +0x020 */ union { struct { uint8_t : 8; /* (reserved) */ uint8_t : 8; /* (reserved) */ uint8_t : 8; /* (reserved) */ uint8_t : 7; /* (reserved) */ uint8_t FILT_UNLOCK : 1; }; uint32_t WORD; } FILT_ACCESS; /* +0x024 */ union { struct { uint8_t LINSTXDMONITORENA : 8; /*!< LINS TxD Monitor enable */ uint8_t LINSTXDTIMEOUTDOMINANT : 8; /*!< Tx Dominant Timeout */ uint16_t : 16; /* (reserved) */ }; uint32_t WORD; } LINTXDMONITOR; /* +0x028 */ union { struct { union { struct { uint8_t INT_LINS_TXD_DOM_ENA : 8; /*!< LINS TXD Dominant Monitor interrupt enable */ }; uint8_t BYTE; } ENABLE; union { struct { uint8_t INT_LINS_TXD_DOM_CLR : 8; /*!< LINS TXD Dominant Monitor interrupt clear */ }; uint8_t BYTE; } CLEAR; union { struct { uint8_t INT_LINS_TXD_DOM_STS : 8; /*!< LINS TXD Dominant Monitor interrupt status */ }; uint8_t BYTE; } STATUS; union { struct { uint8_t INT_LINS_TXD_DOM_ACT : 8; /*!< LINS TXD Dominant Monitor interrupt active */ }; uint8_t BYTE; } IRQ; }; uint32_t WORD; } IRQ; /* +0x02C */ union { struct { uint8_t GPIOCONSEL : 1; /*!< Hardware/Firmware Select */ uint8_t : 2; /* (reserved) */ uint16_t GPIOCONREG : 13; /*!< Analog test MUX select */ uint16_t ANASELREG : 16; /*!< Analog Select Control */ }; uint32_t WORD; } ANALOGTESTMUXOVERRIDE; /* +0x030 */ union { struct { uint8_t PRESCALE_EN : 1; /*!< prescale enable */ uint8_t PRESCALE : 2; /*!< prescaler select */ uint8_t : 5; /* (reserved) */ uint32_t IODBNCEN : 17; /*!< IO Debounce Enable */ uint8_t : 7; /* (reserved) */ }; uint32_t WORD; } IODBNC; /* +0x034 */ union { struct { uint8_t IOGRP0_DBNC_THRES0 : 8; /*!< IO Group0 Debounce Threshold for 1 to 0 */ uint8_t IOGRP0_DBNC_THRES1 : 8; /*!< IO Group0 Debounce Threshold for 0 to 1 */ uint8_t IOGRP1_DBNC_THRES0 : 8; /*!< IO Group1 Debounce Threshold for 1 to 0 */ uint8_t IOGRP1_DBNC_THRES1 : 8; /*!< IO Group1 Debounce Threshold for 0 to 1 */ }; uint32_t WORD; } IOGFCONF0; /* +0x038 */ union { struct { uint8_t IOGRP2_DBNC_THRES0 : 8; /*!< IO Group2 Debounce Threshold for 1 to 0 */ uint8_t IOGRP2_DBNC_THRES1 : 8; /*!< IO Group2 Debounce Threshold for 0 to 1 */ uint8_t IOGRP3_DBNC_THRES0 : 8; /*!< IO Group3 Debounce Threshold for 1 to 0 */ uint8_t IOGRP3_DBNC_THRES1 : 8; /*!< IO Group3 Debounce Threshold for 0 to 1 */ }; uint32_t WORD; } IOGFCONF1; /* +0x03C */ union { struct { uint8_t ID_GRPS_PA2 : 2; /*!< PA2 debounce Group Selection */ uint8_t ID_GRPS_PA3 : 2; /*!< PA3 debounce Group Selection */ uint8_t ID_GRPS_PA4 : 2; /*!< PA4 debounce Group Selection */ uint8_t ID_GRPS_PA5 : 2; /*!< PA5 debounce Group Selection */ uint8_t ID_GRPS_PA6 : 8; /*!< PA6 debounce Group Selection */ uint8_t ID_GRPS_PB0 : 2; /*!< PB0 debounce Group Selection */ uint8_t ID_GRPS_PB1 : 2; /*!< PB1 debounce Group Selection */ uint8_t ID_GRPS_PB2 : 2; /*!< PB2 debounce Group Selection */ uint8_t ID_GRPS_PB3 : 2; /*!< PB3 debounce Group Selection */ uint8_t ID_GRPS_PB4 : 2; /*!< PB4 debounce Group Selection */ uint8_t ID_GRPS_PB5 : 2; /*!< PB5 debounce Group Selection */ uint8_t ID_GRPS_PB6 : 2; /*!< PB6 debounce Group Selection */ uint8_t ID_GRPS_PB7 : 2; /*!< PB7 debounce Group Selection */ }; uint32_t WORD; } IODBNCGRPS0; /* +0x040 */ union { struct { uint8_t ID_GRPS_SWDIO : 2; /*!< SWDIO debounce Group Selection */ uint8_t ID_GRPS_SWCLK : 2; /*!< SWCLK debounce Group Selection */ uint8_t ID_GRPS_PC3 : 2; /*!< PC3 debounce Group Selection */ uint8_t ID_GRPS_PC4 : 2; /*!< PC4 debounce Group Selection */ uint32_t : 24; /* (reserved) */ }; uint32_t WORD; } IODBNCGRPS1; /* +0x044 */ } IOCTRLA_SFRS_t; /* -------- End of section using anonymous unions and disabling warnings -------- */ #if defined (__CC_ARM) #pragma pop #elif defined (__ICCARM__) /* leave anonymous unions enabled */ #elif (__ARMCC_VERSION >= 6010050) #pragma clang diagnostic pop #elif defined (__GNUC__) /* anonymous unions are enabled by default */ #elif defined (__TMS470__) /* anonymous unions are enabled by default */ #elif defined (__TASKING__) #pragma warning restore #elif defined (__CSMC__) /* anonymous unions are enabled by default */ #else #warning Not supported compiler type #endif /** * @brief The starting address of IOCTRLA SFRS. */ #define IOCTRLA_SFRS ((__IO IOCTRLA_SFRS_t *)0x40000c00) #endif /* end of __IOCTRLA_SFR_H__ section */