295 lines
12 KiB
C
295 lines
12 KiB
C
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/**
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* @copyright 2022 indie Semiconductor
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*
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* This file is proprietary to indie Semiconductor.
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* All rights reserved. Reproduction or distribution, in whole
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* or in part, is forbidden except by express written permission
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* of indie Semiconductor.
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*
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* @file lins_sfr.h
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*/
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#ifndef LINS_SFR_H__
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#define LINS_SFR_H__
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#include <stdint.h>
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/* ------- Start of section using anonymous unions and disabling warnings ------- */
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#if defined (__CC_ARM)
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#pragma push
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#pragma anon_unions
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#elif defined (__ICCARM__)
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#pragma language=extended
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wc11-extensions"
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#pragma clang diagnostic ignored "-Wreserved-id-macro"
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning 586
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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#define LINS_DL_LENGTH_POS (0)
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#define LINS_DL_DISAUTOSLEEP_POS (5)
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#define LINS_DL_DISBITMON_POS (6)
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#define LINS_DL_ENHCHK_POS (7)
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#define DATAACK_TPYE_RECEIVE (0x01)
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#define DATAACK_TPYE_TRANSMIT (0x03)
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/**
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* @brief A structure to represent Special Function Registers for LINS.
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*/
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typedef union{
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struct{
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uint8_t DATA; /*<! Data Buffer 1 +0x000 */
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uint8_t _RESERVED_01[3]; /* +0x001 */
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};
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uint32_t WORD;
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}LINS_DATABUF_t;
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typedef union {
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struct {
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uint8_t STARTREQ : 1; /*!< Start Request */
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uint8_t WAKEUPREQ : 1; /*!< WakeUp Request */
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uint8_t RST_INT_ERR : 2; /*!< Reset Reset interrupt, Error */
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uint8_t DATAACK_TPYE : 2; /*!< Data Acknowledgement type : 0x01: received ack, 0x03: Transmit ack*/
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uint8_t : 1; /* (reserved) */
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uint8_t STOP : 1; /*!< Stop Register */
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uint8_t : 8; /* (reserved) */
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uint8_t MASTERMODE : 1; /*!< Master Mode Register */
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uint8_t UARTMODE : 1; /*!< UART Mode Register */
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uint8_t AUTOBAUDMODE : 1; /*!< AUTOBAUD Enable Register */
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uint8_t : 5; /* (reserved) */
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uint8_t : 8; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_CTRL_t; /* +0x020 */
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typedef union {
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struct {
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uint8_t COMPLETE : 1;
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uint8_t WAKEUP : 1;
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uint8_t ERROR : 1; /*!< Lin Error */
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uint8_t INTR : 1; /*!< Interupt Request */
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uint8_t DATAREQ : 1; /*!< Data Request */
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uint8_t ABORTED : 1;
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uint8_t BUSIDLETIMEOUT : 1; /*!< BUS Idle Timeout */
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uint8_t ACTIVE : 1; /*!< Lin Bus Active */
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uint8_t SYNCHRONIZED : 8; /*!< Synchronized Flag */
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uint16_t : 16; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_STATUS_t; /* +0x024 */
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typedef union {
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struct {
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uint8_t BITERR : 1; /*!< Bit Error in Byte field */
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uint8_t CHK : 1; /*!< Checksum Error */
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uint8_t TIMEOUT : 1; /*!< Timeout Error */
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uint8_t PARITY : 1; /*!< Parity Error */
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uint8_t BITMON : 1; /*!< Bit Monitor Error */
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uint8_t SBITERR : 1; /*!< Start Bit Error in Byte field */
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uint8_t FRAMEERR : 1; /*!< Byte Field Framing Error */
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uint8_t BITMONSTOP : 1; /*!< Bit Monitor Error occurred in Stop Bit */
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uint8_t BITMONDATA : 8; /*!< Bit Monitor Error occurred in Start or Data Bits */
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uint16_t : 16; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_ERROR_t; /* +0x028 */
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typedef union {
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struct {
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uint8_t LENGTH : 4; /*!< Data Length */
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uint8_t : 2; /* (reserved) */
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uint8_t DISBITMON : 1; /*!< Disable Bit Monitor */
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uint8_t ENHCHK : 1; /*!< Enhancement Check */
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uint32_t : 24; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_DL_t; /* +0x02C */
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typedef union {
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struct {
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uint8_t : 6; /* (reserved) */
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uint8_t PRESCL : 2; /*!< Prescaler Register */
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uint32_t : 24; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_BITTIME_t;
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typedef union {
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struct {
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uint8_t WUPREPEAT : 2; /*!< wakeup repeat time */
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uint8_t BUSINACTIVE : 2; /*!< Bus Inactivity Time */
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uint8_t BUSDOMINANTRELEASEWUPENA : 1; /*!< Bus Dominant Release Wakeup Enable */
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uint8_t : 3; /* (reserved) */
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uint32_t : 24; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_BUSTIME_t; /* +0x03C */
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typedef union {
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struct {
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uint8_t COMPLETETX : 1; /*!< Complete TX */
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uint8_t BUSIDLETIMEOUTDOMINANT : 1; /*!< Dominant Bus Idle Timeout */
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uint8_t BUSIDLEMONITOR : 2; /*!< Bus Idle Monitor Status */
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uint8_t : 4; /* (reserved) */
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uint32_t : 24; /* (reserved) */
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};
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uint32_t WORD;
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} LINS_TX_STATUS_t; /* +0x040 */
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typedef union {
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struct {
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uint8_t INTERBYTECNT : 8; /*!< Inter-Byte Space Bit Count */
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uint8_t BITMONMODE : 8; /*!< BIT Monitor Mode */
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uint8_t DUTYMINSEL : 1; /*!< Minimum Duty Select */
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uint8_t DUTYMAXSEL : 1; /*!< Maximum Duty Select */
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uint8_t DISBIT2CHECK : 1; /*!< Disable Two Bits Width Check */
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uint8_t : 5; /* (reserved) */
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uint8_t : 8; /* (reserved) */
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};
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uint32_t WORD;
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}LINS_CONF_t; /* +0x048 */
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typedef union {
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struct {
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uint8_t RXDONE : 1; /*!< Rx Data ready Interrupt Enable */
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uint8_t OVRUNERR : 1; /*!< RX overflow error Interrupt Enable */
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uint8_t FRMERR : 1; /*!< Framing error Interrupt Enable */
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uint8_t : 1; /* (reserved) */
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uint8_t BREAKKERR : 1; /*!< Break Error Interrupt Enable */
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uint8_t TXDONE : 1; /*!< Transmission done Interrupt Enable */
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uint8_t : 2; /* (reserved) */
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uint8_t RXTOUT : 1; /*!< Rx Time-out Interrupt Enable */
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uint8_t UNRUNERR : 1; /*!< RX underflow error Interrupt Enable */
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uint8_t OVERRUNERR : 1; /*!< TX overflow error Interrupt Enable */
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uint8_t SYNC_FIELD_RECEIVED : 1; /*!< Sync Received Interrupt Enable */
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uint8_t : 4; /* (reserved) */
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uint16_t : 16; /* (reserved) */
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};
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uint32_t WORD;
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} UARTINTENA_t; /* +0x04C */
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typedef union {
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struct {
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uint8_t RXDONE : 1; /*!< Rx Data ready Interrupt Clear */
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uint8_t OVRUNERR : 1; /*!< RX overflow error Interrupt Clear */
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uint8_t FRMERR : 1; /*!< Framing error Interrupt Clear */
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uint8_t : 1; /* (reserved) */
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uint8_t BREAKKERR : 1; /*!< Break Error Interrupt Clear */
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uint8_t TXDONE : 1; /*!< Transmission done Interrupt Clear */
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uint8_t : 2; /* (reserved) */
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uint8_t RXTOUT : 1; /*!< Rx Time-out Interrupt Clear */
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uint8_t UNRUNERR : 1; /*!< RX underflow error Interrupt Clear */
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uint8_t OVERRUNERR : 1; /*!< TX overflow error Interrupt Clear */
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uint8_t SYNC_FIELD_RECEIVED : 1; /*!< Sync Received Interrupt Clear */
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uint8_t : 4; /* (reserved) */
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uint16_t : 16; /* (reserved) */
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};
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uint32_t WORD;
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} UARTINTCLR_t; /* +0x050 */
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typedef union {
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struct {
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uint8_t RXDONE : 1; /*!< Rx Data ready */
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uint8_t OVRUNERR : 1; /*!< RX overflow error */
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uint8_t FRMERR : 1; /*!< Framing error */
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uint8_t : 1; /* (reserved) */
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uint8_t BREAKKERR : 1; /*!< Break IRQ */
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uint8_t TXDONE : 1; /*!< Transmission is done */
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uint8_t : 2; /* (reserved) */
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uint8_t RXTOUT : 1; /*!< Rx Time-out */
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uint8_t UNRUNERR : 1; /*!< RX underflow error */
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uint8_t OVERRUNERR : 1; /*!< TX overflow error */
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uint8_t SYNC_FIELD_RECEIVED : 1; /*!< Sync Received Flag */
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uint8_t : 4; /* (reserved) */
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uint16_t : 16; /* (reserved) */
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};
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uint32_t WORD;
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} UARTINTSTATUS_t; /* +0x054 */
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typedef struct {
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LINS_DATABUF_t DATABUFF[8]; /*<! Data Buffer 1 +0x000 */
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LINS_CTRL_t CTRL;
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LINS_STATUS_t STATUS; /* +0x024 */
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LINS_ERROR_t ERROR; /* +0x028 */
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LINS_DL_t DL; /* +0x02C */
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uint16_t BTDIVSYNC; /*<! Bit time Divider +0x030 */
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uint8_t _RESERVED_32[2]; /* +0x032 */
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LINS_BITTIME_t BITTIME; /* +0x034 */
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uint8_t ID; /* +0x038 */
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uint8_t _RESERVED_39[3]; /* +0x039 */
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LINS_BUSTIME_t BUSTIME; /* +0x03C */
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LINS_TX_STATUS_t TX_STATUS; /*<! Complete TX +0x040 */
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uint8_t WUPDETECTTHRES; /*<! Wakeup Detection Threshold +0x044 ,NOTE: When the chip uses the LINs bus idle detection in pre5v domain(PMU_SFRS->CTRL.PD1V5_ENA_HIBERNATE=0x0), the write operation of this register takes effect by IOCTRLA_SFRS->LIN.UPDATE */
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uint8_t _RESERVED_45[3]; /* +0x045 */
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LINS_CONF_t CONF;
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UARTINTENA_t UARTINTENA;
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UARTINTCLR_t UARTINTCLR;
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UARTINTSTATUS_t UARTINTSTATUS;
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} LINS_SFRS_t;
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/* -------- End of section using anonymous unions and disabling warnings -------- */
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#if defined (__CC_ARM)
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#pragma pop
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#elif defined (__ICCARM__)
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/* leave anonymous unions enabled */
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#elif (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic pop
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning restore
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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/**
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* @brief The starting address of LINS SFRS.
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*/
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/*
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#define LINS_REG_DATA_LOW_4BYTES (*(__IO uint32_t *)(0x50010700))
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#define LINS_REG_DATA_HIGH_4BYTES (*(__IO uint32_t *)(0x50010710))
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#define LINS_REG_DATA(index) (*(__IO uint8_t *)(0x50010700 + index*4))
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#define LINS_REG_CTRL (*(__IO LINS_CTRL_T2_t *)(0x50010720))
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#define LINS_REG_STATUS (*(__IO uint8_t *)(0x50010724))
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#define LINS_REG_ERROR (*(__IO LINS_ERROR_t *)(0x50010728))
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#define LINS_REG_DL (*(__IO uint8_t *)(0x5001072C))
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#define LINS_REG_BTDIV07 (*(__IO uint8_t *)(0x50010730))
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#define LINS_REG_BITTIME (*(__IO LINS_BITTIME_t *)(0x50010734))
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#define LINS_REG_ID (*(__IO uint8_t *)(0x50010738))
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#define LINS_REG_BUSTIME (*(__IO LINS_BUSTIME_t *)(0x5001073C))
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#define LINS_REG_TX_STATUS (*(__IO LINS_TX_STATUS_t *)(0x50010740))
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#define LINS_REG_WUPDETECTTHRES (*(__IO uint8_t *)(0x50010744))
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#define LINS_REG_CONF (*(__IO LINS_CONF_t *)(0x50010748))
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*/
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/**
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* @brief The starting address of LINS SFRS.
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*/
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#define LINS_SFRS ((__IO LINS_SFRS_t *)0x40001C00)
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#endif /* end of __LINS_SFR_H__ section */
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