K74B/87400/drivers/hdf/sfrs/flash_sfr.h

/**
 * @copyright 2023 indie Semiconductor
 *
 * This file is proprietary to indie Semiconductor.
 * All rights reserved. Reproduction or distribution, in whole
 * or in part, is forbidden except by express written permission
 * of indie Semiconductor.
 *
 * @file flash_sfr.h
 */

#ifndef FLASH_SFR_H__
#define FLASH_SFR_H__

#include <stdint.h>

/* -------  Start of section using anonymous unions and disabling warnings  ------- */
#if   defined (__CC_ARM)
  #pragma push
  #pragma anon_unions
#elif defined (__ICCARM__)
  #pragma language=extended
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic push
  #pragma clang diagnostic ignored "-Wc11-extensions"
  #pragma clang diagnostic ignored "-Wreserved-id-macro"
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning 586
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif

/**
 * @brief A structure to represent Special Function Registers for FLASH.
 */
typedef struct {

  union {
    struct {
      uint8_t                           :  3; /*   (reserved) */
      uint16_t FLASHADDR                : 13;
      uint8_t  NVR                      :  8;
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } FLADDR; /* +0x000 */

  uint32_t DATAL;                             /*<! Data (least-significant word) +0x004 */

  uint32_t DATAM;                             /*<! Data (most-significant word) +0x008 */

  uint8_t  ECCVAL;                            /*<! ECC value +0x00C */
  uint8_t  _RESERVED_0D[3];                   /* +0x00D */

  uint32_t UNLOCK_WRITE;                      /* +0x010 */

  uint32_t WRITE_START;                       /* +0x014 */

  uint32_t UNLOCK_ERASE;                      /* +0x018 */

  uint32_t ERASE_START;                       /* +0x01C */

  uint32_t CODE_PROT;                         /* +0x020 */

  uint32_t WPKEY;                             /* +0x024 */

  uint32_t FLSWP0;                            /* +0x028 */

  union {
    struct {
      uint16_t FLSWP1                   : 16;
      uint8_t  FLSWPNVR                 :  8;
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } FLSWP1R; /* +0x02C */

  uint32_t UNLOCK_CTRL_OP;                    /*<! Flash Control Operation Register Unlock value +0x030 */

  union {
    struct {
      uint16_t BYTESEL                  : 16; /*!< Byte selection of the write operation */
      uint8_t  CHIPSEL                  :  1; /*!< CHIP selection bit */
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  ECCSTREN                 :  1; /*!< ECC Store Enable */
      uint8_t  PROGVREAD                :  1; /*!< Program Margin Read Enable */
      uint8_t  ERSVREAD                 :  1; /*!< Erase Margin Read Enable */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  FRWS                     :  8; /*!< Flash Read Wait State Number */
    };
    uint32_t WORD;
  } CTRL_OPR; /* +0x034 */

  union {
    struct {
      uint16_t ADDRECC                  : 16; /*!< ECC fail double-word address offset */
      uint8_t                           :  4; /*   (reserved) */
      uint8_t  NVRFECC                  :  1; /*!< NVR ECC fail */
      uint8_t  RDECCEN                  :  1; /*!< Read ECC correction and detection Enable */
      uint8_t  ECCCIE                   :  1; /*!< ECC correction interrupt enable */
      uint8_t  WPVIOLIE                 :  1; /*!< Write Protection Violation interrupt enable */
      uint8_t  WPVIOL                   :  1; /*!< Write Protection Violation */
      uint8_t                           :  5; /*   (reserved) */
      uint8_t  ECCC                     :  1; /*!< ECC correction */
      uint8_t  ECCD                     :  1; /*!< ECC detection */
    };
    uint32_t WORD;
  } FLSECCR; /* +0x038 */

  uint8_t  OSC_TRIM;                          /*<! Oscillator Trim Value +0x03C */
  uint8_t  _RESERVED_3D[3];                   /* +0x03D */

  uint8_t  _RESERVED_40;                      /* +0x040 */
  uint8_t  OPBSY;                             /*<! Flash operatoin busy indication +0x041 */
  uint8_t  _RESERVED_42[2];                   /* +0x042 */

  union {
    struct {
      uint16_t SERTL                    : 16; /*!< Sector Erase Time Length */
      uint8_t  PGTL                     :  8; /*!< Program Time Length */
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } FLSOPTL0R; /* +0x044 */

  uint32_t MERTL;                             /*<! Chip Mass Erase Time Length +0x048 */

} FLASH_SFRS_t;

/* --------  End of section using anonymous unions and disabling warnings  -------- */
#if   defined (__CC_ARM)
  #pragma pop
#elif defined (__ICCARM__)
  /* leave anonymous unions enabled */
#elif (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic pop
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning restore
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif

/**
 * @brief The starting address of FLASH SFRS.
 */
#define FLASH_SFRS ((__IO FLASH_SFRS_t *)0x40020800)

#endif /* end of __FLASH_SFR_H__ section */