123 lines
6.0 KiB
C
123 lines
6.0 KiB
C
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/*!
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******************************************************************************
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**
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** \note Other information.
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**
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******************************************************************************
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*/
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/*---------------------------------------------------------------------------*/
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/* include files */
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/*---------------------------------------------------------------------------*/
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extern void __near RSCAN_INTCANGERR_interrupt(void);
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extern void __near RSCAN_INTCANGRECC_interrupt(void);
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extern void __near RSCAN_INTCAN0ERR_interrupt (void);
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extern void __near RSCAN_INTCAN0REC_interrupt (void);
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extern void __near RSCAN_INTCAN0TRX_interrupt (void);
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extern void __near Vectors_Isr_DefaultHandler (void);
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extern void __near r_tau0_channel0_interrupt(void);
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extern void __near r_tau0_channel1_interrupt(void);
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extern void __near r_wdt_interrupt(void);
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extern void __near start(void);
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extern void r_adc_interrupt(void);
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/*!
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******************************************************************************
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** \Vector Section Define
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**
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** \Interrupt Vector Table Define
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**
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******************************************************************************
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*/
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/*****************************************************************************/
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/*!
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******************************************************************************
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** \brief Interrupt vector definition
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Use the following statements to define the interrupt vector table
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i.e. add your interrupt handlers here (ensure to define the ISR prototype,
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e.g. by adding the appropriate header file above).
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All resource related vectors are predefined. Remaining software interrupts
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can be added here as well.
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******************************************************************************
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*/
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#pragma section const VectorRemapingAddr
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#if DEBUG
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#else
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void (* __near const VectorTable[64])(void) = \
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{
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start, /* 0000H intvect 0 Reset Vector(RESET/POR/LVD/WDT/TRAP/IAW/CLM) */
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Vectors_Isr_DefaultHandler, /* 0002H intvect 1 Reserved */
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Vectors_Isr_DefaultHandler,//r_wdt_interrupt , /* 0004H intvect 2 INTWDTI */
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Vectors_Isr_DefaultHandler, /* 0006H intvect 3 INTLVI */
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Vectors_Isr_DefaultHandler, /* 0008H intvect 4 INTP0 */
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Vectors_Isr_DefaultHandler, /* 000AH intvect 5 INTP1 */
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Vectors_Isr_DefaultHandler, /* 000CH intvect 6 INTP2 */
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Vectors_Isr_DefaultHandler, /* 000EH intvect 7 INTP3 */
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Vectors_Isr_DefaultHandler, /* 0010H intvect 8 INTP4/INTSPM */
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Vectors_Isr_DefaultHandler, /* 0012H intvect 9 INTP5/INTCMP0 */
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Vectors_Isr_DefaultHandler, /* 0014H intvect 10 INTP13/INTCLM */
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Vectors_Isr_DefaultHandler, /* 0016H intvect 11 INTST0/INTCSI00/INTIIC00*/
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Vectors_Isr_DefaultHandler, /* 0018H intvect 12 INTSR0/INTCSI01/INTIIC01*/
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Vectors_Isr_DefaultHandler, /* 001AH intvect 13 INTTRD0 */
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Vectors_Isr_DefaultHandler, /* 001CH intvect 14 INTTRD1 */
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Vectors_Isr_DefaultHandler, /* 001EH intvect 15 INTTRJ0 */
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Vectors_Isr_DefaultHandler, /* 0020H intvect 16 INTRAM */
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Vectors_Isr_DefaultHandler, /* 0022H intvect 17 INTLIN0TRM */
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Vectors_Isr_DefaultHandler, /* 0024H intvect 18 INTLIN0RVC */
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Vectors_Isr_DefaultHandler, /* 0026H intvect 19 INTSTLIN0STA/INTLIN0*/
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Vectors_Isr_DefaultHandler, /* 0028H intvect 20 INTIICA0 */
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Vectors_Isr_DefaultHandler, /* 002AH intvect 21 INTP8/INTRTC */
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r_tau0_channel0_interrupt, /* 002CH intvect 22 INTTM00 */
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r_tau0_channel1_interrupt, /* 002EH intvect 23 INTTM01 */
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Vectors_Isr_DefaultHandler, /* 0030H intvect 24 INTTM02 */
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Vectors_Isr_DefaultHandler, /* 0032H intvect 25 INTTM03 */
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r_adc_interrupt, /* 0034H intvect 26 INTAD */
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Vectors_Isr_DefaultHandler, /* 0036H intvect 27 INTP6/INTTM11H */
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Vectors_Isr_DefaultHandler, /* 0038H intvect 28 INTP7/INTTM13H */
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Vectors_Isr_DefaultHandler, /* 003AH intvect 29 INTP9/INTTM01H */
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Vectors_Isr_DefaultHandler, /* 003CH intvect 30 INTP10/INTTM03H */
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Vectors_Isr_DefaultHandler, /* 003EH intvect 31 INTST1/INTCSI10/INTIIC10 */
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Vectors_Isr_DefaultHandler, /* 0040H intvect 32 INTSR1/INTCSI11/INTIIC11 */
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Vectors_Isr_DefaultHandler, /* 0042H intvect 33 INTTM04 */
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Vectors_Isr_DefaultHandler, /* 0044H intvect 34 INTTM05 */
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Vectors_Isr_DefaultHandler, /* 0046H intvect 35 INTTM06 */
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Vectors_Isr_DefaultHandler, /* 0048H intvect 36 INTTM07 */
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Vectors_Isr_DefaultHandler, /* 004AH intvect 37 INTP11/INTLIN0WUP */
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Vectors_Isr_DefaultHandler, /* 004CH intvect 38 INTKR */
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RSCAN_INTCAN0ERR_interrupt, /* 004EH intvect 39 INTCAN0ERR */
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Vectors_Isr_DefaultHandler, /* 0050H intvect 40 INTCAN0WUP */
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RSCAN_INTCAN0REC_interrupt, /* 0052H intvect 41 INTCAN0CFR */
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RSCAN_INTCAN0TRX_interrupt, /* 0054H intvect 42 INTCAN0TRM */
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RSCAN_INTCANGRECC_interrupt, /* 0056H intvect 43 INTCANGRFR */
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RSCAN_INTCANGERR_interrupt, /* 0058H intvect 44 INTCANGERR */
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Vectors_Isr_DefaultHandler, /* 005AH intvect 45 INTTM10 */
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Vectors_Isr_DefaultHandler, /* 005CH intvect 46 INTTM11 */
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Vectors_Isr_DefaultHandler, /* 005EH intvect 47 INTTM12 */
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Vectors_Isr_DefaultHandler, /* 0060H intvect 48 INTTM13 */
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Vectors_Isr_DefaultHandler, /* 0062H intvect 49 Reserved(INTFL)*/
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Vectors_Isr_DefaultHandler, /* 0064H intvect 50 INTP12/INTLIN1WUP */
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Vectors_Isr_DefaultHandler, /* 0066H intvect 51 INTLIN1TRM */
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Vectors_Isr_DefaultHandler, /* 0068H intvect 52 INTLIN1RVC */
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Vectors_Isr_DefaultHandler, /* 006AH intvect 53 INTLIN1STA/INTLIN1 */
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Vectors_Isr_DefaultHandler, /* 006CH intvect 54 INTTM14 */
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Vectors_Isr_DefaultHandler, /* 006EH intvect 55 INTTM15 */
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Vectors_Isr_DefaultHandler, /* 0070H intvect 56 INTTM16 */
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Vectors_Isr_DefaultHandler, /* 0072H intvect 57 INTTM17 */
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Vectors_Isr_DefaultHandler, /* 0074H intvect 58 Reserved*/
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Vectors_Isr_DefaultHandler, /* 0076H intvect 59 Reserved*/
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Vectors_Isr_DefaultHandler, /* 0078H intvect 60 Reserved*/
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Vectors_Isr_DefaultHandler, /* 007AH intvect 61 Reserved*/
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Vectors_Isr_DefaultHandler, /* 007CH intvect 62 Reserved*/
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Vectors_Isr_DefaultHandler, /* 007EH intvect 63 SOFT WARE BRK*/
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};
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#endif
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const unsigned long AppValid = 0xAA5555AA;
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/* END OF FILE */
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