;============================================================================== ; ; Project = Sample program for flash self-programming library ; Module = r_fsl_sample_c.dr ; Version = V1.01(Target FSL Version for CA78K0R is V2.20) ; Target CPU = RL78/G13 ( R5F100LEA / QB-R5F100LE-TB ) ; Environment = CS+ for CA[CA78K0R],CX (V3.00) ; ; Date = 12, 28, 2016 ; ;============================================================================== ; COPYRIGHT ;============================================================================== ; DISCLAIMER ; This software is supplied by Renesas Electronics Corporation and is only ; intended for use with Renesas products. No other uses are authorized. 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All rights reserved. ;============================================================================== ;*********************************************************** ; Redefined ROM area ;*********************************************************** ; ---------------------------------------------------------- ; Define new memory entry for boot cluster 0 ; ---------------------------------------------------------- MEMORY BCL0 : ( 000000H, 001000H ) ; ---------------------------------------------------------- ; Define new memory entry for boot cluster 1 ; ---------------------------------------------------------- MEMORY BCL1 : ( 001000H, 001000H ) ; ---------------------------------------------------------- ; Redefined default code segment ROM ; ---------------------------------------------------------- MEMORY ROM : ( 002000H, 000800H ) ; ---------------------------------------------------------- ; Define new memory entry for fsl-code area ; ---------------------------------------------------------- MEMORY ROM_FSL : ( 002800H, 000400H ) ; ---------------------------------------------------------- ; Define new memory entry for write-data area ; ---------------------------------------------------------- MEMORY ROM_DATA : ( 002C00H, 000800H ) ; ---------------------------------------------------------- ; Define new memory entry for write-data area ; ---------------------------------------------------------- ;MEMORY OCDROM : ( 00FE00H, 000200H ) ;*********************************************************** ; Redefined RAM area ;*********************************************************** ; ---------------------------------------------------------- ; Redefined default data segment RAM ; ---------------------------------------------------------- MEMORY RAM : ( 0FFB00H, 000320H ) ; ---------------------------------------------------------- ; Define new memory entry for saddr area ; ---------------------------------------------------------- MEMORY RAM_SADDR : ( 0FFE20H, 0000E0H ) ;*********************************************************** ; Library(fsl.lib) segment ;*********************************************************** ; ---------------------------------------------------------- ; Merge FSL_FCD segment ; ---------------------------------------------------------- MERGE FSL_FCD := ROM_FSL ; ---------------------------------------------------------- ; Merge FSL_FECD segment ; ---------------------------------------------------------- ;MERGE FSL_FECD := ROM_FSL ; ---------------------------------------------------------- ; Merge FSL_RCD segment ; ---------------------------------------------------------- MERGE FSL_RCD := ROM_FSL ; ---------------------------------------------------------- ; Merge FSL_BCD segment ; ---------------------------------------------------------- MERGE FSL_BCD := ROM_FSL ; ---------------------------------------------------------- ; Merge FSL_BECD segment ; ---------------------------------------------------------- MERGE FSL_BECD := ROM_FSL ;*********************************************************** ; sample_c.c segment ;*********************************************************** ; ---------------------------------------------------------- ; Merge SAM_CODE segment ; ---------------------------------------------------------- MERGE SAM_CODE := ROM ; ---------------------------------------------------------- ; Merge SAM_CNST segment ; ---------------------------------------------------------- MERGE SAM_CNST := ROM_DATA ; ---------------------------------------------------------- ; Merge SAM_DATA segment ; ---------------------------------------------------------- MERGE SAM_DATA := RAM ;*********************************************************** ; run-time library segment ( 0000H - FFFFH ) ;*********************************************************** ; ---------------------------------------------------------- ; Merge @@LCODE,@@LCODEL(run-time library) segment ; ---------------------------------------------------------- MERGE @@LCODE := BCL0 MERGE @@LCODEL := BCL0