diff --git a/BCZT/BCZT.mtpj b/BCZT/BCZT.mtpj index 9ac0e1f..9403c83 100644 --- a/BCZT/BCZT.mtpj +++ b/BCZT/BCZT.mtpj @@ -96,20 +96,6 @@ 941832c1-fc3b-4e1b-94e8-01ea17128b42 459ade49-d7bc-4bb4-84e4-942e057b7504 - - r_cg_wdt.c - File - r_cg_wdt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 459ade49-d7bc-4bb4-84e4-942e057b7504 - - - r_cg_wdt_user.c - File - r_cg_wdt_user.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 459ade49-d7bc-4bb4-84e4-942e057b7504 - r_cg_macrodriver.h File @@ -138,13 +124,6 @@ 03cad1e8-2eb3-4cde-a8a3-982423631122 459ade49-d7bc-4bb4-84e4-942e057b7504 - - r_cg_wdt.h - File - r_cg_wdt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 459ade49-d7bc-4bb4-84e4-942e057b7504 - r_cg_port.c File @@ -271,14 +250,14 @@ 1.0 - R5F10AGC + R5F10AGF 0 - 0 - R5F10AGC + 1 + R5F10AGF @@ -309,34 +288,30 @@ CSource 10f99822-0c62-4705-bede-35fd4cf8cc0d CSource - 9a1cc481-c773-48a5-9a61-5d36b1e5440f + 303ad2f6-1548-413f-8be7-5882e64d3d5a CSource - 8f0b30e4-1a33-421c-b9d4-64f09856018e + 05f9a856-d9cb-4b48-9d05-7702173a1d25 CSource - 303ad2f6-1548-413f-8be7-5882e64d3d5a + e2cfac7c-cf80-4f25-925d-d60758614099 CSource - 05f9a856-d9cb-4b48-9d05-7702173a1d25 + b5c9b599-47db-4bde-94c6-e0292f824d93 CSource - e2cfac7c-cf80-4f25-925d-d60758614099 + 2e40fd7c-18e5-4714-8e48-c00046f418f8 CSource - b5c9b599-47db-4bde-94c6-e0292f824d93 + 83a6267b-9a5e-4584-94d9-c8b8cddcabf6 CSource - 2e40fd7c-18e5-4714-8e48-c00046f418f8 + 02f51df5-f2fa-4597-aeb4-a3be18c2722f CSource - 83a6267b-9a5e-4584-94d9-c8b8cddcabf6 + d8e1b59d-e620-4c45-9434-b04b87d55e83 CSource - 02f51df5-f2fa-4597-aeb4-a3be18c2722f + a7e85417-d6e4-45af-b599-ca453884703b CSource - d8e1b59d-e620-4c45-9434-b04b87d55e83 + cbcf39df-8cfa-4969-affa-69652b781b73 CSource - a7e85417-d6e4-45af-b599-ca453884703b + d0df3177-f3e6-44b2-ac3a-952da341db58 CSource - cbcf39df-8cfa-4969-affa-69652b781b73 - CSource - d0df3177-f3e6-44b2-ac3a-952da341db58 - CSource - 21 - 0 + 19 + 1 @@ -392,7 +367,7 @@ False True False - -8585038194049784616 + -8585007810958061601 DefaultBuild %TargetFiles% @@ -679,7 +654,7 @@ DataFlash %ProjectName%_vfi.h None False - 7E00-7FFF + 17E00-17FFF C90 False .data=.dataR @@ -724,7 +699,7 @@ DataFlash False False - -8585009516258200797 + -8585007799069425822 True False Debug @@ -747,13 +722,13 @@ DataFlash %ProjectName%.map False - 04 + 84 False %ProjectName%.abs %BuildModeName% False - None + YesAddressRange False @@ -766,7 +741,7 @@ DataFlash %ProjectName%_vfi.h None False - 7E00-7FFF + 17E00-17FFF C90 False .data=.dataR @@ -790,7 +765,7 @@ DataFlash False - FFFFE8 + E9FFE8 @@ -921,7 +896,7 @@ DataFlash None False - -8585035827761566827 + -8585007799069585385 Debug LibraryU @@ -960,8 +935,8 @@ DataFlash None - DR5F10AGC.DVF, V1.11 - DR5F10AGC.DVF, V1.11 + DR5F10AGF.DVF, V1.11 + DR5F10AGF.DVF, V1.11 True False False @@ -970,8 +945,8 @@ DataFlash -8585038194049754695 None - DR5F10AGC.DVF, V1.11 - DR5F10AGC.DVF, V1.11 + DR5F10AGF.DVF, V1.11 + DR5F10AGF.DVF, V1.11 True False False @@ -1021,14 +996,6 @@ DataFlash 638336497098813512 5 - - 638336497098813512 - 6 - - - 638336497098813512 - 7 - 638336497098813512 8 @@ -1045,10 +1012,6 @@ DataFlash 638336497098813512 11 - - 638336497098813512 - 12 - 638336501579252841 0 @@ -1136,39 +1099,39 @@ DataFlash False True False - -8585035827755942354 + -8585035823275522967 False True False - -8585035827755942354 + -8585035823275522967 False True False - -8585035823275522967 + -8585035823275513046 False True False - -8585035823275522967 + -8585035823275513046 False True False - -8585035823275513046 + -8585034059461417437 False True False - -8585035823275513046 + -8585034059461387515 False True False - -8585034059461417437 + -8585034059461387515 False True False - -8585034059461387515 + -8585016454798444544 False True False - -8585034059461387515 + -8585016454798444544 False True False @@ -1176,18 +1139,10 @@ DataFlash False True False - -8585016454798444544 + -8585016453633478908 False True False - -8585016454798444544 - False - True - False - -8585016453633478908 - False - True - False @@ -1205,21 +1160,26 @@ DataFlash F:\FCB_project\temp\bczt_new\CODE\BCZT\iodefine.h + + + e4af5eb2-adbb-4301-8df5-18578be9eef6 + + 1.0 1.0 - - - 0700c2a3-bc6a-4793-8529-1ce3c7a4da9a + + + 00000000-0000-0000-0000-000000000000 - + 0 - R5F10AGC + R5F10AGF 32 2048 4000 @@ -1278,6 +1238,496 @@ DataFlash 0 0 0 + 0 + 0 + AQAAAAQAAAA= + + + + 0 + R5F10AGF + Emulator + 4000 + Emulator + 32768 + No + 32 + 2048 + 1 + + True + 041f9d7d-feb7-4d28-a7d3-177280e3bbfa + DefaultBuild\BCZT.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + SpeedPriority + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + True + False + Typical + 0 + 3 + Typical + 0 + 1023 + None + 0 + 0 + None + 0 + 0 + None + 0 + 0 + 0 + 65535 + False + False + False + False + Typical + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + No + 500 + Yes + No + Yes + 500 + No + SoftwareBreak + No + No + True + True + True + True + False + False + .stack_bss + True + True + True + True + True + False + Yes + 0 + Nonstop + 1 + No + No + No + No + No + False + 0 + False + RisingEdge + False + RisingEdge + False + 1 + False + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + 0 + R5F10AGF + 10 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + Yes + No + Yes + 0 + 0 + System + No + Use3_3V + + 1000 + 3 + 1 + + True + 041f9d7d-feb7-4d28-a7d3-177280e3bbfa + DefaultBuild\BCZT.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + SpeedPriority + Yes + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + True + No + 500 + Yes + No + Yes + 500 + SoftwareBreak + No + No + No + Nonstop + No + No + False + 0 + False + RisingEdge + False + RisingEdge + False + 1 + False + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + 3b1bb1d4-663c-43be-8a08-0eece7cfa18b + + + + + e4af5eb2-adbb-4301-8df5-18578be9eef6 + + + + + 0 + R5F10AGF + 32 + 2048 + 4000 + 32768 + SelectCpuClockFrequency + MHz + 4000000 + No + + 1 + + True + 041f9d7d-feb7-4d28-a7d3-177280e3bbfa + DefaultBuild\BCZT.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + True + No + 500 + Yes + 500 + No + No + Yes + Free + No + 4096 + No + No + No + False + Yes + Yes + False + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + AQAAAAQAAAA= + + + + 0 + R5F10AGF + Emulator + 4000 + Emulator + 32768 + No + 32 + 2048 + 1 + + True + 041f9d7d-feb7-4d28-a7d3-177280e3bbfa + DefaultBuild\BCZT.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + SpeedPriority + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + True + False + Typical + 0 + 3 + Typical + 0 + 1023 + None + 0 + 0 + None + 0 + 0 + None + 0 + 0 + 0 + 65535 + False + False + False + False + Typical + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + None + 987136 + 0 + No + 500 + Yes + No + Yes + 500 + No + SoftwareBreak + No + No + True + True + True + True + False + False + .stack_bss + True + True + True + True + True + False + Yes + 0 + Nonstop + 1 + No + No + No + No + No + False + 0 + False + RisingEdge + False + RisingEdge + False + 1 + False + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + 1 + R5F10AGF + 10 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + Yes + No + Yes + 0 + 0 + System + No + Use3_3V + + 1000 + 3 + 1 + + True + 041f9d7d-feb7-4d28-a7d3-177280e3bbfa + DefaultBuild\BCZT.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + SpeedPriority + Yes + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + True + No + 500 + Yes + No + Yes + 500 + SoftwareBreak + No + No + No + Nonstop + No + No + False + 0 + False + RisingEdge + False + RisingEdge + False + 1 + False + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 @@ -1304,191 +1754,10 @@ DataFlash DisplayAll - 48,27,135,0,0 - 0 - TO07,O,No,, - Free,-,-,, - Free,-,-,, - _RESET,I,-,, - Free,-,-,, - Free,-,-,, - P137,I,-,, - Free,-,-,, - Free,-,-,, - REGC,-,-,, - VSS,-,-,, - VDD,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - P00,O,-,, - P140,O,-,, - P130,O,-,, - P73,O,-,, - P72,O,No,, - P71,O,No,, - P70,O,No,, - P32,O,-,, - TO01,O,-,, - P17,O,No,, - P16,O,No,, - P15,O,No,, - P31,O,-,, - Free,-,-,, - Free,-,-,, - P12,O,No,, - P11,O,No,, - P10,O,No,, - ANI0,I,-,, - ANI1,I,-,, - ANI2,I,-,, - ANI3,I,-,, - P82,I,-,, - P83,I,-,, - P84,I,-,, - P85,I,-,, - Free,-,-,, - Free,-,-,, - P90,I,-,, - P91,I,-,, - Free,-,-,, - TO03,O,-,, - P15,O,No,, - _RESET,I,-,, - REGC,-,-,, - VSS,-,-,, - VDD,-,-,, - TO07,O,No,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - TO03,O,-,, - P00,O,-,, - P17,O,No,, - P16,O,No,, - P15,O,No,, - Free,-,-,, - Free,-,-,, - P12,O,No,, - P11,O,No,, - P10,O,No,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - P73,O,-,, - P72,O,No,, - P71,O,No,, - P70,O,No,, - Free,-,-,, - Free,-,-,, - P137,I,-,, - P130,O,-,, - ANI2,I,-,, - ANI3,I,-,, - P82,I,-,, - P83,I,-,, - P84,I,-,, - P85,I,-,, - Free,-,-,, - Free,-,-,, - P90,I,-,, - P91,I,-,, - Free,-,-,, - TO07,O,No,, - TO01,O,-,, - P17,O,No,, - P16,O,No,, - P15,O,No,, - Free,-,-,, - Free,-,-,, - P12,O,No,, - P11,O,No,, - TO03,O,-,, - ANI0,I,-,, - ANI1,I,-,, - ANI2,I,-,, - ANI3,I,-,, - P82,I,-,, - P83,I,-,, - P84,I,-,, - P85,I,-,, - Free,-,-,, - Free,-,-,, - P90,I,-,, - P91,I,-,, - P32,O,-,, - TO01,O,-,, - P31,O,-,, - ANI0,I,-,, - ANI1,I,-,, - Free,-,-,, - P130,O,-,, - P73,O,-,, - P72,O,No,, - P71,O,No,, - P70,O,No,, - TO01,O,-,, - P31,O,-,, - P12,O,No,, - TO03,O,-,, - P140,O,-,, - Free,-,-,, - Free,-,-,, - TO07,O,No,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - TO01,O,-,, - P17,O,No,, - P16,O,No,, - P15,O,No,, - Free,-,-,, - Free,-,-,, - TO03,O,-,, - Free,-,-,, - P16,O,No,, - P15,O,No,, - Free,-,-,, - P10,O,No,, - TO07,O,No,, - P00,O,-,, - TO01,O,-,, - P17,O,No,, - P16,O,No,, - P15,O,No,, - Free,-,-,, - Free,-,-,, - TO03,O,-,, - TO07,O,No,, - P137,I,-,, - P71,O,No,, - P32,O,-,, - TO01,O,-,, - P17,O,No,, - P31,O,-,, - P12,O,No,, - TO03,O,-,, - P73,O,-,, - P72,O,No,, - P71,O,No,, - P70,O,No,, - P83,I,-,, - P84,I,-,, - P85,I,-,, - Free,-,-,, - Free,-,-,, - P90,I,-,, - P91,I,-,, - Free,-,-,, - P140,O,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, - Free,-,-,, + True + 1 + 1.0 + 0 <SOAP-ENV:Envelope xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:SOAP-ENC="http://schemas.xmlsoap.org/soap/encoding/" xmlns:SOAP-ENV="http://schemas.xmlsoap.org/soap/envelope/" xmlns:clr="http://schemas.microsoft.com/soap/encoding/clr/1.0" SOAP-ENV:encodingStyle="http://schemas.xmlsoap.org/soap/encoding/"> <SOAP-ENV:Body> <a1:UltraGridDisplayLayout id="ref-1" xmlns:a1="http://schemas.microsoft.com/clr/nsassem/Infragistics.Win.UltraWinGrid/Infragistics4.Win.UltraWinGrid.v12.2"> @@ -1827,6 +2096,7 @@ DataFlash <CellActivation>3</CellActivation> <Header href="#ref-62"/> <Key id="ref-63">Recommend Connection for Unused</Key> +<Width>219</Width> <IsBound>true</IsBound> </a1:UltraGridColumn> <a1:UltraGridColumn id="ref-42" xmlns:a1="http://schemas.microsoft.com/clr/nsassem/Infragistics.Win.UltraWinGrid/Infragistics4.Win.UltraWinGrid.v12.2"> @@ -2219,6 +2489,7 @@ DataFlash <Header href="#ref-57"/> <Hidden>true</Hidden> <Key id="ref-58">fldParentID</Key> +<Width>112</Width> <IsBound>true</IsBound> <ExcludeFromColumnChooser>1</ExcludeFromColumnChooser> </a1:UltraGridColumn> @@ -2261,6 +2532,7 @@ DataFlash <Header href="#ref-70"/> <Hidden>true</Hidden> <Key id="ref-71">MacroGroupName</Key> +<Width>114</Width> <IsBound>true</IsBound> <ExcludeFromColumnChooser>1</ExcludeFromColumnChooser> </a1:UltraGridColumn> @@ -2280,6 +2552,7 @@ DataFlash <Header href="#ref-73"/> <Hidden>true</Hidden> <Key href="#ref-58"/> +<Width>112</Width> <IsBound>true</IsBound> <ExcludeFromColumnChooser>1</ExcludeFromColumnChooser> </a1:UltraGridColumn> @@ -2350,6 +2623,7 @@ DataFlash <CellActivation>3</CellActivation> <Header href="#ref-92"/> <Key id="ref-93">Recommend Connection for Unused</Key> +<Width>219</Width> <IsBound>true</IsBound> </a1:UltraGridColumn> <a1:UltraGridColumn id="ref-55" xmlns:a1="http://schemas.microsoft.com/clr/nsassem/Infragistics.Win.UltraWinGrid/Infragistics4.Win.UltraWinGrid.v12.2"> @@ -2490,7 +2764,6 @@ DataFlash </SOAP-ENV:Body> </SOAP-ENV:Envelope> - 0 <SOAP-ENV:Envelope xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:SOAP-ENC="http://schemas.xmlsoap.org/soap/encoding/" xmlns:SOAP-ENV="http://schemas.xmlsoap.org/soap/envelope/" xmlns:clr="http://schemas.microsoft.com/soap/encoding/clr/1.0" SOAP-ENV:encodingStyle="http://schemas.xmlsoap.org/soap/encoding/"> <SOAP-ENV:Body> <a1:UltraGridDisplayLayout id="ref-1" xmlns:a1="http://schemas.microsoft.com/clr/nsassem/Infragistics.Win.UltraWinGrid/Infragistics4.Win.UltraWinGrid.v12.2"> @@ -2779,6 +3052,7 @@ DataFlash <Header href="#ref-51"/> <Hidden>true</Hidden> <Key id="ref-52">relation</Key> +<Width>112</Width> <IsBound>true</IsBound> <ExcludeFromColumnChooser>1</ExcludeFromColumnChooser> </a1:UltraGridColumn> @@ -2807,6 +3081,7 @@ DataFlash <Header href="#ref-59"/> <Hidden>true</Hidden> <Key href="#ref-52"/> +<Width>112</Width> <IsBound>true</IsBound> <ExcludeFromColumnChooser>1</ExcludeFromColumnChooser> </a1:UltraGridColumn> @@ -2877,6 +3152,7 @@ DataFlash <CellActivation>3</CellActivation> <Header href="#ref-78"/> <Key id="ref-79">Recommend Connection for Unused</Key> +<Width>219</Width> <IsBound>true</IsBound> </a1:UltraGridColumn> <a1:UltraGridColumn id="ref-50" xmlns:a1="http://schemas.microsoft.com/clr/nsassem/Infragistics.Win.UltraWinGrid/Infragistics4.Win.UltraWinGrid.v12.2"> @@ -2956,18 +3232,221 @@ DataFlash </SOAP-ENV:Body> </SOAP-ENV:Envelope> + 48,30,153,0,0 + 0 + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + Free,-,-,, + False + 100 + 0:78:78,1:77:77,2:400:400,3:61:61,4:40:40,5:50:50,6:160:160,7:210:210,8:219:219,9:210:210,10:100:100 + 0:112:112,1:245:245,2:42:42,3:44:44,4:121:121,5:114:114,6:96:85 + 0:112:112,1:77:77,2:77:77,3:400:400,4:61:61,5:40:40,6:50:50,7:160:160,8:210:210,9:219:219,10:210:210,11:100:100 + 0:112:112,1:100:100,2:43:43,3:182:150 + 0:112:112,1:78:78,2:77:77,3:400:400,4:61:61,5:40:40,6:50:50,7:160:160,8:210:210,9:219:219,10:210:210 + + 1 0 False - False - 100 - 0:78:78,1:77:77,2:400:400,3:61:61,4:40:40,5:50:50,6:160:160,7:210:210,8:210:210,9:210:210,10:100:100 - 0:98:98,1:245:245,2:42:42,3:44:44,4:121:121,5:120:120,6:85:85 - 0:98:98,1:77:77,2:77:77,3:400:400,4:61:61,5:40:40,6:50:50,7:160:160,8:210:210,9:210:210,10:210:210,11:100:100 - 0:98:98,1:100:100,2:43:43,3:150:150 - 0:98:98,1:78:78,2:77:77,3:400:400,4:61:61,5:40:40,6:50:50,7:160:160,8:210:210,9:210:210,10:210:210 - True - 0 @@ -3127,7 +3606,7 @@ DataFlash <TMRJ0 /> </Effect> </fCLK> - <ISPullupForPort Name="ISPullupForPort" Text="P00-P10-P11-P12-P13-P14-P15-P16-P17-P30-P31-P32-P40-P41-P60-P61-P62-P63-P70-P71-P72-P73-P92-P120-P125-P140-" Comment="unused" /> + <ISPullupForPort Name="ISPullupForPort" Text="P00-P10-P11-P12-P13-P14-P15-P16-P17-P30-P31-P32-P40-P41-P60-P61-P62-P63-P70-P71-P72-P73-P120-P125-P140-" Comment="unused" /> <fHOCO Name="fHOCO" Value="64" Comment="64M" Trigger="fHOCO" /> <fIH Name="fIH" Value="32" Comment="32M" /> <fSUB Name="fSUB" Value="0" Comment="0K" Trigger="fSUB"> @@ -3334,8 +3813,8 @@ DataFlash <ProjectKind Name="PrjKind" Text="Project78K0R" /> <DeviceName Name="DeviceName" Fixed="" Text="RL78F13" /> <MCUName Name="MCUName" Text="RL78F13_48pin" /> - <ChipName Name="ChipName" Text="R5F10AGC" /> - <ChipID Name="ChipID" Text="R5F10AGC" /> + <ChipName Name="ChipName" Text="R5F10AGF" /> + <ChipID Name="ChipID" Text="R5F10AGF" /> <CPUCoreType Name="CPUCoreType" Fixed="" Text="1" /> <MCUType Name="MCUType" Fixed="" Text="RL78" /> <Compiler Name="Compiler" Text="CCRL" /> @@ -3343,15 +3822,15 @@ DataFlash <SecurityId Name="GIValue" Text="00000000000000000000" /> <LinkDirectiveFile Name="D0" Text="lk.dr" /> <OnChipDebugOptionBytes Name="GO" Text="1" /> - <OnChipDebugOptionBytesValue Name="GOValue" Text="04" /> - <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="7E00" /> + <OnChipDebugOptionBytesValue Name="GOValue" Text="84" /> + <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="17E00" /> <SizeOfOnChipDebugOptionBytesArea Name="GOSizeValue" Text="512" /> <UserOptionBytes Name="GB" Text="1" /> - <UserOptionBytesValue Name="GBValue" Text="FFFFE8" /> - <RAMStartAddress Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="RAMStartAddress" Fixed="" Text="000FF700" /> + <UserOptionBytesValue Name="GBValue" Text="E9FFE8" /> + <RAMStartAddress Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="RAMStartAddress" Fixed="" Text="000FE700" /> <RAMEndAddress Name="RAMEndAddress" Fixed="" Text="000FFEFF" /> - <ROMEndAddress Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="ROMEndAddress" Fixed="" Text="00007FFF" /> - <MirrorROM Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="MirrorROM" Fixed="" Text="24" /> + <ROMEndAddress Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="ROMEndAddress" Fixed="" Text="00017FFF" /> + <MirrorROM Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="MirrorROM" Fixed="" Text="47.75" /> <TAUUsedRTC1Hz Name="TAUUsedRTC1Hz" Text="false" Comment="unused" Trigger="RTC1HZ"> <Effect> <RTC /> @@ -3387,8 +3866,8 @@ DataFlash <fCLKSource Name="fCLKSource" Text="fIH" /> <UseFDL Name="UseFDL" Text="no" /> <DataFlash Name="DataFlash" Text="0" /> - <OCDROM Name="OCDROM" Text="Unused" /> - <OCDROM_Address Name="OCDROM_Address" Text="00007E00" /> + <OCDROM Name="OCDROM" Text="Used" /> + <OCDROM_Address Name="OCDROM_Address" Text="00017E00" /> <OCDROM_Length Name="OCDROM_Length" Text="512" /> <PrjVersion Name="PrjVersion" Text="1.2.0.1" /> <ProductVersion Name="ProductVersion" Text="4.08.05.01" /> @@ -3478,9 +3957,9 @@ DataFlash <P00 Name="P00/TI05/TO05/INTP9" AltFunc="P00" Point="I/O" /> </Port0> <Port1 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Pullup="true"> - <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P10" Point="I/O" /> - <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P11" Point="I/O" /> - <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P12" Point="I/O" /> + <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" Chip="groupb,groupc1,groupc2" TTL="true" PITHL="true" Nch="true" AltFunc="P10" Point="I/O" /> + <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" Chip="groupb,groupc1,groupc2" TTL="true" PITHL="true" Nch="true" AltFunc="P11" Point="I/O" /> + <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Chip="groupb,groupc1,groupc2" Nch="true" AltFunc="P12" Point="I/O" /> <P13 Name="P13/TI04/TO04/TRDIOA0/TRDCLK0/SI01/SDA01/LTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="P13" Point="I/O" /> <P14 Name="P14/TI06/TO06/TRDIOC0/_SCK01/SCL01/LRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="P14" Point="I/O" /> <P15 Name="P15/TI05/TO05/TRDIOA1/TRDIOA0/TRDCLK0/SO00/TXD0/TOOLTXD/RTC1HZ" Nch="true" AltFunc="P15" Point="I/O" /> @@ -3495,20 +3974,20 @@ DataFlash <P34 Name="P34/AVREFM/ANI01" AltFunc="ANALOG_1" Point="I/O" /> </Port3> <Port4 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin" Pullup="true"> - <P40 Name="P40/TOOL0" AltFunc="" Point="I/O" /> + <P40 Name="P40/TOOL0" AltFunc="TOOL0" Point="I/O" /> <P41 Name="P41/TI10/TO10/TRJIO0/VCOUT0/SNZOUT2" AltFunc="" Point="I/O" /> </Port4> <Port6 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin" Pullup="true"> <P60 Name="P60/_SCK00/SCL00" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> <P61 Name="P61/SI00/SDA00/RXD0" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> - <P62 Name="P62/SO00/TXD0/SCLA0" Chip="R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" Nch="true" AltFunc="" Point="I/O" /> - <P63 Name="P63/_SSI00/SDAA0" Chip="R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P62 Name="P62/SO00/TXD0/SCLA0" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" PITHL="true" Nch="true" TTL="true" AltFunc="" Point="I/O" /> + <P63 Name="P63/_SSI00/SDAA0" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> </Port6> <Port7 Chip="RL78F13_48pin" Pullup="true"> - <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P70" Point="I/O" /> - <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" PITHL="true" AltFunc="P71" Point="I/O" /> - <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P72" Point="I/O" /> - <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P73" Point="I/O" /> + <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" Nch="true" AltFunc="P70" Point="I/O" /> + <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" Nch="true" AltFunc="P71" Point="I/O" /> + <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" Nch="true" AltFunc="P72" Point="I/O" /> + <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" AltFunc="P73" Point="I/O" /> </Port7> <Port8 Chip="RL78F13_30pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin"> <P80 Name="P80/ANI02/ANO0" AltFunc="ANALOG_2" Point="I/O" /> @@ -3523,15 +4002,15 @@ DataFlash <Port9 Chip="RL78F13_48pin"> <P90 Name="P90/ANI10" AltFunc="P90" Point="I/O" /> <P91 Name="P91/ANI11" AltFunc="P91" Point="I/O" /> - <P92 Name="P92/ANI12" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="" Pullup="true" Point="I/O" /> + <P92 Name="P92/ANI12" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" AltFunc="" Point="I/O" /> </Port9> <Port12 Chip="RL78F13_48pin,RL78F13_64pin"> - <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" Nch="true" Pullup="true" AltFunc="TO07" Point="I/O" /> + <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" DIN="true" Nch="true" Pullup="true" AltFunc="TO07" Point="I/O" /> <P121 Name="P121/X1" AltFunc="" Point="I" /> <P122 Name="P122/X2/EXCLK" AltFunc="" Point="I" /> <P123 Name="P123/XT1" AltFunc="" Point="I" /> <P124 Name="P124/XT2/EXCLKS" AltFunc="" Point="I" /> - <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" TTL="true" PITHL="true" Pullup="true" AltFunc="TO03" Point="I/O" /> + <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" DIN="true" TTL="true" PITHL="true" Pullup="true" AltFunc="TO03" Point="I/O" /> </Port12> <Port13 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin"> <P130 Name="P130/RESOUT" AltFunc="P130" Point="O" /> @@ -3551,6 +4030,8 @@ DataFlash <INTP5 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P12" Point="I" /> <INTP6 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P71" Point="I" /> <INTP7 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P32" Point="I" /> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" Port="P70" Point="I" /> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" Port="P00" Point="I" /> </INTP> <KEY> <KR0 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" PIOR50="0" Port="P70" Point="I" /> @@ -3572,6 +4053,9 @@ DataFlash <ANI9 Chip="RL78F13_30pin, RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P87" Point="I" /> <ANI10 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P90" Point="I" /> <ANI11 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P91" Point="I" /> + <ANI12 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin" Port="P92" Point="I" /> + <ANI24 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin, R5F10BBC, R5F10BBD, R5F10BBE, R5F10BBF, R5F10BBG, R5F10BAC, R5F10BAD, R5F10BAE, R5F10BAF, R5F10BAG" Port="P125" Point="I" /> + <ANI25 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin, R5F10BBC, R5F10BBD, R5F10BBE, R5F10BBF, R5F10BBG, R5F10BAC, R5F10BAD, R5F10BAE, R5F10BAF, R5F10BAG" Port="P120" Point="I" /> <AVREFP Port="P33" Point="I" /> <AVREFM Port="P34" Point="I" /> <ANALOG_0 Port="P33" Point="I" RealName="ANI0" /> @@ -3586,6 +4070,7 @@ DataFlash <ANALOG_9 Chip="RL78F13_30pin, RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P87" Point="I" RealName="ANI9" /> <ANALOG_10 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P90" Point="I" RealName="ANI10" /> <ANALOG_11 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P91" Point="I" RealName="ANI11" /> + <ANALOG_12 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin" Port="P92" Point="I" RealName="ANI12" /> </ADC> <Serial> <SAU0> @@ -3616,13 +4101,32 @@ DataFlash </SAU0> <SAU1> <UART1> + <RXD1 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="I" /> + <TXD1 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P12" Point="O" /> </UART1> <CSI10> + <SO10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P12" Point="O" /> + <SI10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="I" /> + <SCK10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P10" RealName="_SCK10" Point="I/O" /> </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG"> + <SO11 PIOR43="0" Port="P72" Point="O" /> + <SI11 PIOR43="0" Port="P70" Point="I" /> + <SCK11 PIOR43="0" Port="P71" RealName="_SCK11" Point="I/O" /> + <SSI11 PIOR43="0" RealName="_SSI11" Port="P73" Point="I" /> + </CSI11> <IIC10> + <SCL10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P10" Point="O" CheckNch="true" /> + <SDA10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="O" CheckNch="true" /> </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG"> + <SCL11 PIOR43="0" Port="P71" Point="O" CheckNch="true" /> + <SDA11 PIOR43="0" Port="P70" Point="O" CheckNch="true" /> + </IIC11> </SAU1> <IICA0> + <SCLA0 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" Port="P62" Point="I/O" /> + <SDAA0 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" Port="P63" Point="I/O" /> </IICA0> </Serial> <TAU> @@ -3660,6 +4164,24 @@ DataFlash <TO07 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" PIOR17="0" Port="P120" Point="O" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <Channel0> + <TI10 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P41" Point="I" /> + <TO10 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P41" Point="O" /> + </Channel0> + <Channel1> + <TI11 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P12" Point="I" /> + <TO11 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P12" Point="O" /> + </Channel1> + <Channel2> + <TI12 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P11" Point="I" /> + <TO12 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P11" Point="O" /> + </Channel2> + <Channel3> + <TI13 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P10" Point="I" /> + <TO13 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P10" Point="O" /> + </Channel3> + </TAU1> <TMRJ0 Chip="RL78F13_80pin,RL78F13_64pin,RL78F13_48pin,RL78F13_32pin,RL78F13_30pin"> <TRJIO0 Port="P41" Point="I/O" /> <TRJO0 Port="P10" Point="O" /> @@ -3720,6 +4242,8 @@ DataFlash <INTP5 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc5_interrupt" /> <INTP6 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc6_interrupt" /> <INTP7 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc7_interrupt" /> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" InUse="0" ISR="r_intc8_interrupt" /> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" InUse="0" ISR="r_intc9_interrupt" /> </INTP> <KEY> <INTKR Chip="RL78F13_48pin,RL78F13_64pin" InUse="0" ISR="r_key_interrupt" /> @@ -3820,7 +4344,7 @@ DataFlash <INTRTC InUse="0" ISR="r_rtc_interrupt" /> </RTC> <WDT> - <INTWDTI InUse="1" ISR="r_wdt_interrupt" /> + <INTWDTI InUse="0" ISR="r_wdt_interrupt" /> </WDT> <LVD> <INTLVI InUse="0" ISR="r_lvd_interrupt" IsDMATrigger="true" /> @@ -3883,7 +4407,7 @@ DataFlash <r_cg_cgc_user.c UserName="r_cg_cgc_user.c" LibName="_user.c" InUse="1"> <Type R_CGC_Get_ResetSource="void R_CGC_Get_ResetSource(void)" R_CGC_Create_UserInit="void R_CGC_Create_UserInit(void)" r_cgc_clockmonitor_interrupt="__interrupt static void r_cgc_clockmonitor_interrupt(void)" r_cgc_stackpointer_interrupt="__interrupt static void r_cgc_stackpointer_interrupt(void)" r_cgc_ram_ecc_interrupt="__interrupt static void r_cgc_ram_ecc_interrupt(void)" /> <R_CGC_Create_UserInit UserName="R_CGC_Create_UserInit" LibName="R_CGC_Create_UserInit" InUse="0" /> - <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="1" /> + <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="0" /> <r_cgc_clockmonitor_interrupt UserName="r_cgc_clockmonitor_interrupt" INTHandle="" LibName="r_cgc_clockmonitor_interrupt" InUse="0" /> <r_cgc_stackpointer_interrupt UserName="r_cgc_stackpointer_interrupt" INTHandle="" LibName="r_cgc_stackpointer_interrupt" InUse="0" /> <r_cgc_ram_ecc_interrupt UserName="r_cgc_ram_ecc_interrupt" INTHandle="" LibName="r_cgc_ram_ecc_interrupt" InUse="0" /> @@ -3950,6 +4474,14 @@ DataFlash <R_INTC7_Start UserName="R_INTC7_Start" LibName="R_INTCn_Start" InUse="0" /> <R_INTC7_Stop UserName="R_INTC7_Stop" LibName="R_INTCn_Stop" InUse="0" /> </INTP7> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin"> + <R_INTC8_Start UserName="R_INTC8_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC8_Stop UserName="R_INTC8_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP8> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin"> + <R_INTC9_Start UserName="R_INTC9_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC9_Stop UserName="R_INTC9_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP9> </INTP> <KEY Chip="RL78F13_48pin,RL78F13_64pin"> <R_KEY_Create UserName="R_KEY_Create" LibName="R_KEY_Create" InUse="" Init="2" InitMode="" /> @@ -3969,6 +4501,8 @@ DataFlash <r_intc5_interrupt Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc5_interrupt" LibName="r_intc5_interrupt" INTHandle="" InUse="0" /> <r_intc6_interrupt Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc6_interrupt" LibName="r_intc6_interrupt" INTHandle="" InUse="0" /> <r_intc7_interrupt Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc7_interrupt" LibName="r_intc7_interrupt" INTHandle="" InUse="0" /> + <r_intc8_interrupt Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" UserName="r_intc8_interrupt" LibName="r_intc8_interrupt" INTHandle="" InUse="" /> + <r_intc9_interrupt Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" UserName="r_intc9_interrupt" LibName="r_intc9_interrupt" INTHandle="" InUse="" /> </INTP> <KEY Chip="RL78F13_48pin,RL78F13_64pin"> <R_KEY_Create_UserInit UserName="R_KEY_Create_UserInit" LibName="R_KEY_Create_UserInit" InUse="" /> @@ -4025,6 +4559,49 @@ DataFlash <R_IIC01_StopCondition UserName="R_IIC01_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> </IIC01> </SAU0> + <SAU1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="R_CSI11_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="R_CSI11_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="R_CSI11_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="R_CSI11_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="R_CSI11_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="R_CSI11_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <R_IIC10_Create UserName="R_IIC10_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC10_Master_Send UserName="R_IIC10_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC10_Master_Receive UserName="R_IIC10_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC10_Stop UserName="R_IIC10_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC10_StartCondition UserName="R_IIC10_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC10_StopCondition UserName="R_IIC10_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> <IICA0 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse=""> <R_IICA0_Create UserName="R_IICA0_Create" LibName="R_IICAn_Create" InUse="" Init="1" InitMode="" /> <R_IICA0_Master_Send UserName="R_IICA0_Master_Send" LibName="R_IICAn_Master_Send" InUse="" /> @@ -4075,6 +4652,41 @@ DataFlash <r_iic01_callback_master_error UserName="r_iic01_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> </IIC01> </SAU0> + <SAU1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <r_csi11_interrupt UserName="r_csi11_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="r_csi11_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="r_csi11_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="r_csi11_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_iic10_interrupt UserName="r_iic10_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic10_callback_master_receiveend UserName="r_iic10_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic10_callback_master_sendend UserName="r_iic10_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic10_callback_master_error UserName="r_iic10_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> <IICA0 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse=""> <R_IICA0_Create_UserInit UserName="R_IICA0_Create_UserInit" LibName="R_IICAn_Create_UserInit" InUse="" /> <r_iica0_interrupt UserName="r_iica0_interrupt" INTHandle="" LibName="r_iican_interrupt" InUse="" /> @@ -4171,6 +4783,40 @@ DataFlash <R_TAU0_Channel7_Get_PulseWidth UserName="R_TAU0_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="0" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <R_TAU1_Create UserName="R_TAU1_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU1_Set_PowerOff UserName="R_TAU1_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU1_Channel0_Start UserName="R_TAU1_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel0_Stop UserName="R_TAU1_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel0_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel0_Set_SoftwareTriggerOn UserName="R_TAU1_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU1_Channel1_Start UserName="R_TAU1_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Start UserName="R_TAU1_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Start UserName="R_TAU1_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel1_Stop UserName="R_TAU1_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Stop UserName="R_TAU1_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Stop UserName="R_TAU1_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU1_Channel2_Start UserName="R_TAU1_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel2_Stop UserName="R_TAU1_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel2_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel2_Set_SoftwareTriggerOn UserName="R_TAU1_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU1_Channel3_Start UserName="R_TAU1_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Start UserName="R_TAU1_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Start UserName="R_TAU1_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel3_Stop UserName="R_TAU1_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Stop UserName="R_TAU1_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Stop UserName="R_TAU1_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + </TAU1> <TMRJ0 InUse=""> <R_TMR_RJ0_Create UserName="R_TMR_RJ0_Create" LibName="R_TMR_RJn_Create" InUse="1" Init="2" InitMode="" /> <R_TMR_RJ0_Start UserName="R_TMR_RJ0_Start" LibName="R_TMR_RJn_Start" InUse="1" /> @@ -4228,6 +4874,23 @@ DataFlash <r_tau0_channel7_interrupt UserName="r_tau0_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="0" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <R_TAU1_Create_UserInit UserName="R_TAU1_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau1_channel0_interrupt UserName="r_tau1_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau1_channel1_interrupt UserName="r_tau1_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel1_higher8bits_interrupt UserName="r_tau1_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau1_channel2_interrupt UserName="r_tau1_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau1_channel3_interrupt UserName="r_tau1_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel3_higher8bits_interrupt UserName="r_tau1_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + </TAU1> <TMRJ0 InUse=""> <R_TMR_RJ0_Create_UserInit UserName="R_TMR_RJ0_Create_UserInit" LibName="R_TMR_RJn_Create_UserInit" InUse="0" /> <r_tmr_rj0_interrupt UserName="r_tmr_rj0_interrupt" LibName="r_tmr_rjn_interrupt" INTHandle="" InUse="1" /> @@ -4244,17 +4907,17 @@ DataFlash <r_cg_timer.h UserName="r_cg_timer.h" LibName=".h" InUse="1" /> </TAU> <WDT> - <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="1"> + <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="0"> <Type R_WDT_Create="void R_WDT_Create(void)" R_WDT_Restart="void R_WDT_Restart(void)" /> - <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="1" Init="1" InitMode="" /> - <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="1" /> + <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="0" Init="1" InitMode="" /> + <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="0" /> </r_cg_wdt.c> - <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="1"> + <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="0"> <Type R_WDT_Create_UserInit="void R_WDT_Create_UserInit(void)" r_wdt_interrupt="__interrupt static void r_wdt_interrupt(void)" /> - <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="" /> - <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="1" /> + <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="0" /> + <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="0" /> </r_cg_wdt_user.c> - <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="1" /> + <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="0" /> </WDT> <RTC> <r_cg_rtc.c UserName="r_cg_rtc.c" LibName=".c" InUse=""> @@ -4439,18 +5102,19 @@ DataFlash <pior_value4 Name="pior_value4" Value="00" /> <pior_value1 Name="pior_value1" Value="00" /> <cg_security5 Name="cg_security5" Value="00" /> - <ocdstart Name="ocdstart" Value="07E00" /> + <ocdstart Name="ocdstart" Value="17E00" /> <cg_security3 Name="cg_security3" Value="00" /> <cg_security0 Name="cg_security0" Value="00" /> <pior_value5 Name="pior_value5" Value="00" /> <cg_security1 Name="cg_security1" Value="00" /> - <wdt_option Name="wdt_option" Value="F9" /> + <wdt_option Name="wdt_option" Value="E9" /> <clock_option Name="clock_option" Value="E8" /> - <cg_option Name="cg_option" Value="04" /> + <cg_option Name="cg_option" Value="84" /> <cg_security8 Name="cg_security8" Value="00" /> <cg_security6 Name="cg_security6" Value="00" /> <pior_value0 Name="pior_value0" Value="00" /> <cg_security4 Name="cg_security4" Value="00" /> + <cg_onchip Name="cg_onchip" Value="" /> <cg_security2 Name="cg_security2" Value="00" /> <cg_iawctl_value Name="cg_iawctl_value" Value="00" /> <lvi_option Name="lvi_option" Value="FF" /> @@ -4474,18 +5138,24 @@ DataFlash <Channel0 UART="0" CSI="00" IIC="00" Channel="0" /> <Channel1 Chip="RL78F13_64pin,RL78F13_80pin,RL78F13_48pin,RL78F13_32pin" PIOR41="0" UART="0" CSI="01" IIC="01" Channel="1" /> </SAU0> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" PIOR42="0" Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2"> + <Channel0 UART="1" CSI="10" IIC="10" Channel="0" /> + <Channel1 Chip="groupb,groupc2" PIOR43="0" UART="1" CSI="11" IIC="11" Channel="1" /> + </SAU1> + <IICA0 Accelerate="No" Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" MacroName="IICA" Channel="0" /> </Serial> <ADC SetFlag="True" HelpID="adc" NeedRefresh="False"> <ADC SetFlag="True" MacroName="ADC" /> </ADC> <TAU SetFlag="True" HelpID="timer" NeedRefresh="False"> <TAU0 Accelerate="No" MacroName="TAU" Channel="0" ChannelNum="0,1,2,3,4,5,6,7" SetFlag="True" TabEnable="True" /> + <TAU1 Accelerate="No" Chip="groupb,groupc1,groupc2" MacroName="TAU" Channel="1" ChannelNum="0,1,2,3" TabEnable="True" /> <TMRJ0 SetFlag="True" MacroName="TMRJ" Channel="0" TabEnable="True" /> <TMRD0 SetFlag="False" MacroName="TMRD" Channel="0" TabEnable="True" /> <TMRD1 SetFlag="False" MacroName="TMRD" Channel="1" TabEnable="True" /> </TAU> - <WDT Prepared="true" SetFlag="true" HelpID="watchdogtimer" NeedRefresh="False"> - <WDT SetFlag="true" MacroName="WDT" /> + <WDT Prepared="true" SetFlag="False" HelpID="watchdogtimer" NeedRefresh="False"> + <WDT SetFlag="False" MacroName="WDT" /> </WDT> <RTC SetFlag="" HelpID="rtc" NeedRefresh="False"> <RTC MacroName="RTC" /> @@ -4527,8 +5197,8 @@ DataFlash <setting name="TRD_FREQUENCY_VALUE" value="0" /> <setting name="FSL_FREQUENCY_VALUE" value="0" /> <setting name="RTC_IT_CLOCK" value="0" /> - <setting name="OCD_UNUSED" value="true" /> - <setting name="OCD_USED" value="false" /> + <setting name="OCD_UNUSED" value="false" /> + <setting name="OCD_USED" value="true" /> <setting name="RRM_UNUSED" value="false" /> <setting name="RRM_USED" value="true" /> <setting name="TRACE_UNUSED" value="false" /> @@ -4539,7 +5209,7 @@ DataFlash <setting name="SECURITY_ID_AUTHENTICATION_NOT_ERASE" value="false" /> <setting name="SECURITY_ID_SELECT" value="true" /> <setting name="SECURITY_ID_VALUE" value="0x00000000000000000000" /> - <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="true" /> + <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="false" /> <setting name="RESOUT_UNUSED" value="true" /> <setting name="RESOUT_USED" value="false" /> <setting name="ILLEGAL_MEMORY_ACCESS_UNUSED" value="true" /> @@ -5311,8 +5981,8 @@ DataFlash </PortP14> </PORT> <WDT> - <setting name="WDT_MODULE_USED" value="true" /> - <setting name="WDT_MODULE_UNUSE" value="false" /> + <setting name="WDT_MODULE_USED" value="false" /> + <setting name="WDT_MODULE_UNUSE" value="true" /> <setting name="WDT_OVERFLOW_TIME" value="4" /> <setting name="WDT_WINDOW_OPEN_TIME" value="2" /> <setting name="WDT_HALT_STOP_OPERATION_ENABLE" value="true" /> @@ -5619,6 +6289,24 @@ DataFlash <setting name="Interrupt_priority" value="3" /> <setting name="Interrupt_only_priority" value="3" /> </LVD> + <TAU1> + <Channel0> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel0> + <Channel1> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel1> + <Channel2> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel2> + <Channel3> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel3> + </TAU1> </SETTING> </RL78F13> 1.0 diff --git a/BCZT/BCZT.rcpe b/BCZT/BCZT.rcpe index 66cb37c..2d65bd9 100644 --- a/BCZT/BCZT.rcpe +++ b/BCZT/BCZT.rcpe @@ -17,13 +17,10 @@ r_cg_cgc_user.c r_cg_timer.c r_cg_timer_user.c - r_cg_wdt.c - r_cg_wdt_user.c r_cg_macrodriver.h r_cg_userdefine.h r_cg_cgc.h r_cg_timer.h - r_cg_wdt.h r_cg_port.c r_cg_port_user.c r_cg_adc.c @@ -46,13 +43,12 @@ - Simulator - 4000000 + 0 - R5F10AGC + R5F10AGF @@ -64,8 +60,6 @@ DefaultBuild\r_cg_cgc_user.obj DefaultBuild\r_cg_timer.obj DefaultBuild\r_cg_timer_user.obj - DefaultBuild\r_cg_wdt.obj - DefaultBuild\r_cg_wdt_user.obj DefaultBuild\r_cg_port.obj DefaultBuild\r_cg_port_user.obj DefaultBuild\r_cg_adc.obj @@ -90,7 +84,7 @@ - + @@ -102,13 +96,13 @@ - + - + @@ -117,8 +111,9 @@ - - + + + @@ -128,14 +123,14 @@ - + - + None @@ -156,7 +151,7 @@ <TMRJ0 /> </Effect> </fCLK> - <ISPullupForPort Name="ISPullupForPort" Text="P00-P10-P11-P12-P13-P14-P15-P16-P17-P30-P31-P32-P40-P41-P60-P61-P62-P63-P70-P71-P72-P73-P92-P120-P125-P140-" Comment="unused" /> + <ISPullupForPort Name="ISPullupForPort" Text="P00-P10-P11-P12-P13-P14-P15-P16-P17-P30-P31-P32-P40-P41-P60-P61-P62-P63-P70-P71-P72-P73-P120-P125-P140-" Comment="unused" /> <fHOCO Name="fHOCO" Value="64" Comment="64M" Trigger="fHOCO" /> <fIH Name="fIH" Value="32" Comment="32M" /> <fSUB Name="fSUB" Value="0" Comment="0K" Trigger="fSUB"> @@ -363,8 +358,8 @@ <ProjectKind Name="PrjKind" Text="Project78K0R" /> <DeviceName Name="DeviceName" Fixed="" Text="RL78F13" /> <MCUName Name="MCUName" Text="RL78F13_48pin" /> - <ChipName Name="ChipName" Text="R5F10AGC" /> - <ChipID Name="ChipID" Text="R5F10AGC" /> + <ChipName Name="ChipName" Text="R5F10AGF" /> + <ChipID Name="ChipID" Text="R5F10AGF" /> <CPUCoreType Name="CPUCoreType" Fixed="" Text="1" /> <MCUType Name="MCUType" Fixed="" Text="RL78" /> <Compiler Name="Compiler" Text="CCRL" /> @@ -372,15 +367,15 @@ <SecurityId Name="GIValue" Text="00000000000000000000" /> <LinkDirectiveFile Name="D0" Text="lk.dr" /> <OnChipDebugOptionBytes Name="GO" Text="1" /> - <OnChipDebugOptionBytesValue Name="GOValue" Text="04" /> - <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="7E00" /> + <OnChipDebugOptionBytesValue Name="GOValue" Text="84" /> + <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="17E00" /> <SizeOfOnChipDebugOptionBytesArea Name="GOSizeValue" Text="512" /> <UserOptionBytes Name="GB" Text="1" /> - <UserOptionBytesValue Name="GBValue" Text="FFFFE8" /> - <RAMStartAddress Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="RAMStartAddress" Fixed="" Text="000FF700" /> + <UserOptionBytesValue Name="GBValue" Text="E9FFE8" /> + <RAMStartAddress Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="RAMStartAddress" Fixed="" Text="000FE700" /> <RAMEndAddress Name="RAMEndAddress" Fixed="" Text="000FFEFF" /> - <ROMEndAddress Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="ROMEndAddress" Fixed="" Text="00007FFF" /> - <MirrorROM Chip="R5F10A6C,R5F10AAC,R5F10ABC,R5F10AGC,R5F10ALC,R5F10BAC,R5F10BBC,R5F10BGC,R5F10BLC" Name="MirrorROM" Fixed="" Text="24" /> + <ROMEndAddress Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="ROMEndAddress" Fixed="" Text="00017FFF" /> + <MirrorROM Chip="R5F10AGF,R5F10ALF,R5F10AMF,R5F10BAF,R5F10BBF,R5F10BGF,R5F10BLF,R5F10BMF" Name="MirrorROM" Fixed="" Text="47.75" /> <TAUUsedRTC1Hz Name="TAUUsedRTC1Hz" Text="false" Comment="unused" Trigger="RTC1HZ"> <Effect> <RTC /> @@ -416,8 +411,8 @@ <fCLKSource Name="fCLKSource" Text="fIH" /> <UseFDL Name="UseFDL" Text="no" /> <DataFlash Name="DataFlash" Text="0" /> - <OCDROM Name="OCDROM" Text="Unused" /> - <OCDROM_Address Name="OCDROM_Address" Text="00007E00" /> + <OCDROM Name="OCDROM" Text="Used" /> + <OCDROM_Address Name="OCDROM_Address" Text="00017E00" /> <OCDROM_Length Name="OCDROM_Length" Text="512" /> <PrjVersion Name="PrjVersion" Text="1.2.0.1" /> <ProductVersion Name="ProductVersion" Text="4.08.05.01" /> @@ -507,9 +502,9 @@ <P00 Name="P00/TI05/TO05/INTP9" AltFunc="P00" Point="I/O" /> </Port0> <Port1 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Pullup="true"> - <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P10" Point="I/O" /> - <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P11" Point="I/O" /> - <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Chip="R5F10AAA,R5F10AAC,R5F10AAD,R5F10AAE,R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE," AltFunc="P12" Point="I/O" /> + <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" Chip="groupb,groupc1,groupc2" TTL="true" PITHL="true" Nch="true" AltFunc="P10" Point="I/O" /> + <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" Chip="groupb,groupc1,groupc2" TTL="true" PITHL="true" Nch="true" AltFunc="P11" Point="I/O" /> + <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Chip="groupb,groupc1,groupc2" Nch="true" AltFunc="P12" Point="I/O" /> <P13 Name="P13/TI04/TO04/TRDIOA0/TRDCLK0/SI01/SDA01/LTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="P13" Point="I/O" /> <P14 Name="P14/TI06/TO06/TRDIOC0/_SCK01/SCL01/LRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="P14" Point="I/O" /> <P15 Name="P15/TI05/TO05/TRDIOA1/TRDIOA0/TRDCLK0/SO00/TXD0/TOOLTXD/RTC1HZ" Nch="true" AltFunc="P15" Point="I/O" /> @@ -524,20 +519,20 @@ <P34 Name="P34/AVREFM/ANI01" AltFunc="ANALOG_1" Point="I/O" /> </Port3> <Port4 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin" Pullup="true"> - <P40 Name="P40/TOOL0" AltFunc="" Point="I/O" /> + <P40 Name="P40/TOOL0" AltFunc="TOOL0" Point="I/O" /> <P41 Name="P41/TI10/TO10/TRJIO0/VCOUT0/SNZOUT2" AltFunc="" Point="I/O" /> </Port4> <Port6 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin" Pullup="true"> <P60 Name="P60/_SCK00/SCL00" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> <P61 Name="P61/SI00/SDA00/RXD0" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> - <P62 Name="P62/SO00/TXD0/SCLA0" Chip="R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" Nch="true" AltFunc="" Point="I/O" /> - <P63 Name="P63/_SSI00/SDAA0" Chip="R5F10ABA,R5F10ABC,R5F10ABD,R5F10ABE,R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P62 Name="P62/SO00/TXD0/SCLA0" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" PITHL="true" Nch="true" TTL="true" AltFunc="" Point="I/O" /> + <P63 Name="P63/_SSI00/SDAA0" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> </Port6> <Port7 Chip="RL78F13_48pin" Pullup="true"> - <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P70" Point="I/O" /> - <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" PITHL="true" AltFunc="P71" Point="I/O" /> - <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P72" Point="I/O" /> - <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="P73" Point="I/O" /> + <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" Nch="true" AltFunc="P70" Point="I/O" /> + <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" Nch="true" AltFunc="P71" Point="I/O" /> + <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" Nch="true" AltFunc="P72" Point="I/O" /> + <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" TTL="true" PITHL="true" AltFunc="P73" Point="I/O" /> </Port7> <Port8 Chip="RL78F13_30pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin"> <P80 Name="P80/ANI02/ANO0" AltFunc="ANALOG_2" Point="I/O" /> @@ -552,15 +547,15 @@ <Port9 Chip="RL78F13_48pin"> <P90 Name="P90/ANI10" AltFunc="P90" Point="I/O" /> <P91 Name="P91/ANI11" AltFunc="P91" Point="I/O" /> - <P92 Name="P92/ANI12" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE" AltFunc="" Pullup="true" Point="I/O" /> + <P92 Name="P92/ANI12" Chip="R5F10AGF,R5F10AGG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" AltFunc="" Point="I/O" /> </Port9> <Port12 Chip="RL78F13_48pin,RL78F13_64pin"> - <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" Nch="true" Pullup="true" AltFunc="TO07" Point="I/O" /> + <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" DIN="true" Nch="true" Pullup="true" AltFunc="TO07" Point="I/O" /> <P121 Name="P121/X1" AltFunc="" Point="I" /> <P122 Name="P122/X2/EXCLK" AltFunc="" Point="I" /> <P123 Name="P123/XT1" AltFunc="" Point="I" /> <P124 Name="P124/XT2/EXCLKS" AltFunc="" Point="I" /> - <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" Chip="R5F10AGA,R5F10AGC,R5F10AGD,R5F10AGE,R5F10ALC,R5F10ALD,R5F10ALE" TTL="true" PITHL="true" Pullup="true" AltFunc="TO03" Point="I/O" /> + <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" Chip="R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG" DIN="true" TTL="true" PITHL="true" Pullup="true" AltFunc="TO03" Point="I/O" /> </Port12> <Port13 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin"> <P130 Name="P130/RESOUT" AltFunc="P130" Point="O" /> @@ -580,6 +575,8 @@ <INTP5 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P12" Point="I" /> <INTP6 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P71" Point="I" /> <INTP7 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" Port="P32" Point="I" /> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" Port="P70" Point="I" /> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" Port="P00" Point="I" /> </INTP> <KEY> <KR0 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" PIOR50="0" Port="P70" Point="I" /> @@ -601,6 +598,9 @@ <ANI9 Chip="RL78F13_30pin, RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P87" Point="I" /> <ANI10 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P90" Point="I" /> <ANI11 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P91" Point="I" /> + <ANI12 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin" Port="P92" Point="I" /> + <ANI24 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin, R5F10BBC, R5F10BBD, R5F10BBE, R5F10BBF, R5F10BBG, R5F10BAC, R5F10BAD, R5F10BAE, R5F10BAF, R5F10BAG" Port="P125" Point="I" /> + <ANI25 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin, R5F10BBC, R5F10BBD, R5F10BBE, R5F10BBF, R5F10BBG, R5F10BAC, R5F10BAD, R5F10BAE, R5F10BAF, R5F10BAG" Port="P120" Point="I" /> <AVREFP Port="P33" Point="I" /> <AVREFM Port="P34" Point="I" /> <ANALOG_0 Port="P33" Point="I" RealName="ANI0" /> @@ -615,6 +615,7 @@ <ANALOG_9 Chip="RL78F13_30pin, RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P87" Point="I" RealName="ANI9" /> <ANALOG_10 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P90" Point="I" RealName="ANI10" /> <ANALOG_11 Chip="RL78F13_48pin, RL78F13_64pin, RL78F13_80pin" Port="P91" Point="I" RealName="ANI11" /> + <ANALOG_12 Chip="R5F10BGC, R5F10BGD, R5F10BGE, R5F10BGF, R5F10BGG, R5F10AGF, R5F10AGG, R5F10BLC, R5F10BLD, R5F10BLE, R5F10BLF, R5F10BLG, R5F10ALF, R5F10ALG, RL78F13_80pin" Port="P92" Point="I" RealName="ANI12" /> </ADC> <Serial> <SAU0> @@ -645,13 +646,32 @@ </SAU0> <SAU1> <UART1> + <RXD1 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="I" /> + <TXD1 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P12" Point="O" /> </UART1> <CSI10> + <SO10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P12" Point="O" /> + <SI10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="I" /> + <SCK10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P10" RealName="_SCK10" Point="I/O" /> </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG"> + <SO11 PIOR43="0" Port="P72" Point="O" /> + <SI11 PIOR43="0" Port="P70" Point="I" /> + <SCK11 PIOR43="0" Port="P71" RealName="_SCK11" Point="I/O" /> + <SSI11 PIOR43="0" RealName="_SSI11" Port="P73" Point="I" /> + </CSI11> <IIC10> + <SCL10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P10" Point="O" CheckNch="true" /> + <SDA10 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG" PIOR42="0" Port="P11" Point="O" CheckNch="true" /> </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG"> + <SCL11 PIOR43="0" Port="P71" Point="O" CheckNch="true" /> + <SDA11 PIOR43="0" Port="P70" Point="O" CheckNch="true" /> + </IIC11> </SAU1> <IICA0> + <SCLA0 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" Port="P62" Point="I/O" /> + <SDAA0 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" Port="P63" Point="I/O" /> </IICA0> </Serial> <TAU> @@ -689,6 +709,24 @@ <TO07 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" PIOR17="0" Port="P120" Point="O" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <Channel0> + <TI10 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P41" Point="I" /> + <TO10 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P41" Point="O" /> + </Channel0> + <Channel1> + <TI11 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P12" Point="I" /> + <TO11 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P12" Point="O" /> + </Channel1> + <Channel2> + <TI12 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P11" Point="I" /> + <TO12 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P11" Point="O" /> + </Channel2> + <Channel3> + <TI13 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P10" Point="I" /> + <TO13 Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" Port="P10" Point="O" /> + </Channel3> + </TAU1> <TMRJ0 Chip="RL78F13_80pin,RL78F13_64pin,RL78F13_48pin,RL78F13_32pin,RL78F13_30pin"> <TRJIO0 Port="P41" Point="I/O" /> <TRJO0 Port="P10" Point="O" /> @@ -749,6 +787,8 @@ <INTP5 Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc5_interrupt" /> <INTP6 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc6_interrupt" /> <INTP7 Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse="0" ISR="r_intc7_interrupt" /> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" InUse="0" ISR="r_intc8_interrupt" /> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" InUse="0" ISR="r_intc9_interrupt" /> </INTP> <KEY> <INTKR Chip="RL78F13_48pin,RL78F13_64pin" InUse="0" ISR="r_key_interrupt" /> @@ -849,7 +889,7 @@ <INTRTC InUse="0" ISR="r_rtc_interrupt" /> </RTC> <WDT> - <INTWDTI InUse="1" ISR="r_wdt_interrupt" /> + <INTWDTI InUse="0" ISR="r_wdt_interrupt" /> </WDT> <LVD> <INTLVI InUse="0" ISR="r_lvd_interrupt" IsDMATrigger="true" /> @@ -912,7 +952,7 @@ <r_cg_cgc_user.c UserName="r_cg_cgc_user.c" LibName="_user.c" InUse="1"> <Type R_CGC_Get_ResetSource="void R_CGC_Get_ResetSource(void)" R_CGC_Create_UserInit="void R_CGC_Create_UserInit(void)" r_cgc_clockmonitor_interrupt="__interrupt static void r_cgc_clockmonitor_interrupt(void)" r_cgc_stackpointer_interrupt="__interrupt static void r_cgc_stackpointer_interrupt(void)" r_cgc_ram_ecc_interrupt="__interrupt static void r_cgc_ram_ecc_interrupt(void)" /> <R_CGC_Create_UserInit UserName="R_CGC_Create_UserInit" LibName="R_CGC_Create_UserInit" InUse="0" /> - <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="1" /> + <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="0" /> <r_cgc_clockmonitor_interrupt UserName="r_cgc_clockmonitor_interrupt" INTHandle="" LibName="r_cgc_clockmonitor_interrupt" InUse="0" /> <r_cgc_stackpointer_interrupt UserName="r_cgc_stackpointer_interrupt" INTHandle="" LibName="r_cgc_stackpointer_interrupt" InUse="0" /> <r_cgc_ram_ecc_interrupt UserName="r_cgc_ram_ecc_interrupt" INTHandle="" LibName="r_cgc_ram_ecc_interrupt" InUse="0" /> @@ -979,6 +1019,14 @@ <R_INTC7_Start UserName="R_INTC7_Start" LibName="R_INTCn_Start" InUse="0" /> <R_INTC7_Stop UserName="R_INTC7_Stop" LibName="R_INTCn_Stop" InUse="0" /> </INTP7> + <INTP8 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin"> + <R_INTC8_Start UserName="R_INTC8_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC8_Stop UserName="R_INTC8_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP8> + <INTP9 Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin"> + <R_INTC9_Start UserName="R_INTC9_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC9_Stop UserName="R_INTC9_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP9> </INTP> <KEY Chip="RL78F13_48pin,RL78F13_64pin"> <R_KEY_Create UserName="R_KEY_Create" LibName="R_KEY_Create" InUse="" Init="2" InitMode="" /> @@ -998,6 +1046,8 @@ <r_intc5_interrupt Chip="RL78F13_30pin,RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc5_interrupt" LibName="r_intc5_interrupt" INTHandle="" InUse="0" /> <r_intc6_interrupt Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc6_interrupt" LibName="r_intc6_interrupt" INTHandle="" InUse="0" /> <r_intc7_interrupt Chip="RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" UserName="r_intc7_interrupt" LibName="r_intc7_interrupt" INTHandle="" InUse="0" /> + <r_intc8_interrupt Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" UserName="r_intc8_interrupt" LibName="r_intc8_interrupt" INTHandle="" InUse="" /> + <r_intc9_interrupt Chip="R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10AGF,R5F10AGG,R5F10ALF,R5F10ALG,RL78F13_80pin" UserName="r_intc9_interrupt" LibName="r_intc9_interrupt" INTHandle="" InUse="" /> </INTP> <KEY Chip="RL78F13_48pin,RL78F13_64pin"> <R_KEY_Create_UserInit UserName="R_KEY_Create_UserInit" LibName="R_KEY_Create_UserInit" InUse="" /> @@ -1054,6 +1104,49 @@ <R_IIC01_StopCondition UserName="R_IIC01_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> </IIC01> </SAU0> + <SAU1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="R_CSI11_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="R_CSI11_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="R_CSI11_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="R_CSI11_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="R_CSI11_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="R_CSI11_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <R_IIC10_Create UserName="R_IIC10_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC10_Master_Send UserName="R_IIC10_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC10_Master_Receive UserName="R_IIC10_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC10_Stop UserName="R_IIC10_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC10_StartCondition UserName="R_IIC10_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC10_StopCondition UserName="R_IIC10_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> <IICA0 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse=""> <R_IICA0_Create UserName="R_IICA0_Create" LibName="R_IICAn_Create" InUse="" Init="1" InitMode="" /> <R_IICA0_Master_Send UserName="R_IICA0_Master_Send" LibName="R_IICAn_Master_Send" InUse="" /> @@ -1104,6 +1197,41 @@ <r_iic01_callback_master_error UserName="r_iic01_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> </IIC01> </SAU0> + <SAU1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" PIOR42="0" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <r_csi11_interrupt UserName="r_csi11_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="r_csi11_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="r_csi11_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="r_csi11_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC10 Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2" InUse=""> + <r_iic10_interrupt UserName="r_iic10_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic10_callback_master_receiveend UserName="r_iic10_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic10_callback_master_sendend UserName="r_iic10_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic10_callback_master_error UserName="r_iic10_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC10> + <IIC11 Chip="RL78F13_80pin,R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> <IICA0 Chip="RL78F13_32pin,RL78F13_48pin,RL78F13_64pin,RL78F13_80pin" InUse=""> <R_IICA0_Create_UserInit UserName="R_IICA0_Create_UserInit" LibName="R_IICAn_Create_UserInit" InUse="" /> <r_iica0_interrupt UserName="r_iica0_interrupt" INTHandle="" LibName="r_iican_interrupt" InUse="" /> @@ -1200,6 +1328,40 @@ <R_TAU0_Channel7_Get_PulseWidth UserName="R_TAU0_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="0" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <R_TAU1_Create UserName="R_TAU1_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU1_Set_PowerOff UserName="R_TAU1_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU1_Channel0_Start UserName="R_TAU1_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel0_Stop UserName="R_TAU1_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel0_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel0_Set_SoftwareTriggerOn UserName="R_TAU1_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU1_Channel1_Start UserName="R_TAU1_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Start UserName="R_TAU1_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Start UserName="R_TAU1_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel1_Stop UserName="R_TAU1_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Stop UserName="R_TAU1_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Stop UserName="R_TAU1_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU1_Channel2_Start UserName="R_TAU1_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel2_Stop UserName="R_TAU1_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel2_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel2_Set_SoftwareTriggerOn UserName="R_TAU1_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU1_Channel3_Start UserName="R_TAU1_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Start UserName="R_TAU1_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Start UserName="R_TAU1_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel3_Stop UserName="R_TAU1_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Stop UserName="R_TAU1_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Stop UserName="R_TAU1_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Get_PulseWidth Chip="R5F10ALF,R5F10ALG,R5F10AGF,R5F10AGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BAC,R5F10BAD,R5F10BAE,R5F10BAF,R5F10BAG" UserName="R_TAU1_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + </TAU1> <TMRJ0 InUse=""> <R_TMR_RJ0_Create UserName="R_TMR_RJ0_Create" LibName="R_TMR_RJn_Create" InUse="1" Init="2" InitMode="" /> <R_TMR_RJ0_Start UserName="R_TMR_RJ0_Start" LibName="R_TMR_RJn_Start" InUse="1" /> @@ -1257,6 +1419,23 @@ <r_tau0_channel7_interrupt UserName="r_tau0_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="0" /> </Channel7> </TAU0> + <TAU1 Chip="groupb,groupc1,groupc2"> + <R_TAU1_Create_UserInit UserName="R_TAU1_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau1_channel0_interrupt UserName="r_tau1_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau1_channel1_interrupt UserName="r_tau1_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel1_higher8bits_interrupt UserName="r_tau1_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau1_channel2_interrupt UserName="r_tau1_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau1_channel3_interrupt UserName="r_tau1_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel3_higher8bits_interrupt UserName="r_tau1_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + </TAU1> <TMRJ0 InUse=""> <R_TMR_RJ0_Create_UserInit UserName="R_TMR_RJ0_Create_UserInit" LibName="R_TMR_RJn_Create_UserInit" InUse="0" /> <r_tmr_rj0_interrupt UserName="r_tmr_rj0_interrupt" LibName="r_tmr_rjn_interrupt" INTHandle="" InUse="1" /> @@ -1273,17 +1452,17 @@ <r_cg_timer.h UserName="r_cg_timer.h" LibName=".h" InUse="1" /> </TAU> <WDT> - <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="1"> + <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="0"> <Type R_WDT_Create="void R_WDT_Create(void)" R_WDT_Restart="void R_WDT_Restart(void)" /> - <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="1" Init="1" InitMode="" /> - <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="1" /> + <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="0" Init="1" InitMode="" /> + <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="0" /> </r_cg_wdt.c> - <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="1"> + <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="0"> <Type R_WDT_Create_UserInit="void R_WDT_Create_UserInit(void)" r_wdt_interrupt="__interrupt static void r_wdt_interrupt(void)" /> - <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="" /> - <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="1" /> + <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="0" /> + <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="0" /> </r_cg_wdt_user.c> - <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="1" /> + <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="0" /> </WDT> <RTC> <r_cg_rtc.c UserName="r_cg_rtc.c" LibName=".c" InUse=""> @@ -1468,18 +1647,19 @@ <pior_value4 Name="pior_value4" Value="00" /> <pior_value1 Name="pior_value1" Value="00" /> <cg_security5 Name="cg_security5" Value="00" /> - <ocdstart Name="ocdstart" Value="07E00" /> + <ocdstart Name="ocdstart" Value="17E00" /> <cg_security3 Name="cg_security3" Value="00" /> <cg_security0 Name="cg_security0" Value="00" /> <pior_value5 Name="pior_value5" Value="00" /> <cg_security1 Name="cg_security1" Value="00" /> - <wdt_option Name="wdt_option" Value="F9" /> + <wdt_option Name="wdt_option" Value="E9" /> <clock_option Name="clock_option" Value="E8" /> - <cg_option Name="cg_option" Value="04" /> + <cg_option Name="cg_option" Value="84" /> <cg_security8 Name="cg_security8" Value="00" /> <cg_security6 Name="cg_security6" Value="00" /> <pior_value0 Name="pior_value0" Value="00" /> <cg_security4 Name="cg_security4" Value="00" /> + <cg_onchip Name="cg_onchip" Value="" /> <cg_security2 Name="cg_security2" Value="00" /> <cg_iawctl_value Name="cg_iawctl_value" Value="00" /> <lvi_option Name="lvi_option" Value="FF" /> @@ -1503,18 +1683,24 @@ <Channel0 UART="0" CSI="00" IIC="00" Channel="0" /> <Channel1 Chip="RL78F13_64pin,RL78F13_80pin,RL78F13_48pin,RL78F13_32pin" PIOR41="0" UART="0" CSI="01" IIC="01" Channel="1" /> </SAU0> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" PIOR42="0" Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,groupc2"> + <Channel0 UART="1" CSI="10" IIC="10" Channel="0" /> + <Channel1 Chip="groupb,groupc2" PIOR43="0" UART="1" CSI="11" IIC="11" Channel="1" /> + </SAU1> + <IICA0 Accelerate="No" Chip="groupb,R5F10BBC,R5F10BBD,R5F10BBE,R5F10BBF,R5F10BBG,R5F10BGC,R5F10BGD,R5F10BGE,R5F10BGF,R5F10BGG,R5F10BLC,R5F10BLD,R5F10BLE,R5F10BLF,R5F10BLG,R5F10BME,R5F10BMF,R5F10BMG" MacroName="IICA" Channel="0" /> </Serial> <ADC SetFlag="True" HelpID="adc" NeedRefresh="False"> <ADC SetFlag="True" MacroName="ADC" /> </ADC> <TAU SetFlag="True" HelpID="timer" NeedRefresh="False"> <TAU0 Accelerate="No" MacroName="TAU" Channel="0" ChannelNum="0,1,2,3,4,5,6,7" SetFlag="True" TabEnable="True" /> + <TAU1 Accelerate="No" Chip="groupb,groupc1,groupc2" MacroName="TAU" Channel="1" ChannelNum="0,1,2,3" TabEnable="True" /> <TMRJ0 SetFlag="True" MacroName="TMRJ" Channel="0" TabEnable="True" /> <TMRD0 SetFlag="False" MacroName="TMRD" Channel="0" TabEnable="True" /> <TMRD1 SetFlag="False" MacroName="TMRD" Channel="1" TabEnable="True" /> </TAU> - <WDT Prepared="true" SetFlag="true" HelpID="watchdogtimer" NeedRefresh="False"> - <WDT SetFlag="true" MacroName="WDT" /> + <WDT Prepared="true" SetFlag="False" HelpID="watchdogtimer" NeedRefresh="False"> + <WDT SetFlag="False" MacroName="WDT" /> </WDT> <RTC SetFlag="" HelpID="rtc" NeedRefresh="False"> <RTC MacroName="RTC" /> @@ -1556,8 +1742,8 @@ <setting name="TRD_FREQUENCY_VALUE" value="0" /> <setting name="FSL_FREQUENCY_VALUE" value="0" /> <setting name="RTC_IT_CLOCK" value="0" /> - <setting name="OCD_UNUSED" value="true" /> - <setting name="OCD_USED" value="false" /> + <setting name="OCD_UNUSED" value="false" /> + <setting name="OCD_USED" value="true" /> <setting name="RRM_UNUSED" value="false" /> <setting name="RRM_USED" value="true" /> <setting name="TRACE_UNUSED" value="false" /> @@ -1568,7 +1754,7 @@ <setting name="SECURITY_ID_AUTHENTICATION_NOT_ERASE" value="false" /> <setting name="SECURITY_ID_SELECT" value="true" /> <setting name="SECURITY_ID_VALUE" value="0x00000000000000000000" /> - <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="true" /> + <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="false" /> <setting name="RESOUT_UNUSED" value="true" /> <setting name="RESOUT_USED" value="false" /> <setting name="ILLEGAL_MEMORY_ACCESS_UNUSED" value="true" /> @@ -2340,8 +2526,8 @@ </PortP14> </PORT> <WDT> - <setting name="WDT_MODULE_USED" value="true" /> - <setting name="WDT_MODULE_UNUSE" value="false" /> + <setting name="WDT_MODULE_USED" value="false" /> + <setting name="WDT_MODULE_UNUSE" value="true" /> <setting name="WDT_OVERFLOW_TIME" value="4" /> <setting name="WDT_WINDOW_OPEN_TIME" value="2" /> <setting name="WDT_HALT_STOP_OPERATION_ENABLE" value="true" /> @@ -2648,6 +2834,24 @@ <setting name="Interrupt_priority" value="3" /> <setting name="Interrupt_only_priority" value="3" /> </LVD> + <TAU1> + <Channel0> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel0> + <Channel1> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel1> + <Channel2> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel2> + <Channel3> + <setting name="ChannelFunction" value="0" /> + <setting name="Pinselection" value="-1" /> + </Channel3> + </TAU1> </SETTING> </RL78F13> diff --git a/BCZT/RLIN_driver/RLIN_driver.c b/BCZT/RLIN_driver/RLIN_driver.c index fd8cf90..0ce40b4 100644 --- a/BCZT/RLIN_driver/RLIN_driver.c +++ b/BCZT/RLIN_driver/RLIN_driver.c @@ -81,7 +81,7 @@ Includes #include "r_cg_userdefine.h" -#define RLIN_DateBuffer LDB01 +#define RLIN_DateBuffer 0x6D8//LDB01 #ifdef RLIN_Master uint8_t Master_TxData1[]={0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00}; /*Transmission data store array*/ @@ -252,11 +252,11 @@ void RLIN_Master_HeaderTransmit(uint8_t ID) switch(ID) { - case 0x00: RLIN_Master_Transmit(Master_TxData1,2); /* ready for response transmit*/ + case 0x80: RLIN_Master_Transmit(Master_TxData1,2); /* ready for response transmit*/ break; - case 0x01: RLIN_Master_Receive(8); /* ready for response transmit*/ + case 0x99: RLIN_Master_Receive(8); /* ready for response transmit*/ break; - case 0x21: RLIN_Master_Receive(2); /* ready for response transmit*/ + case 0x61: RLIN_Master_Receive(8); /* ready for response transmit*/ break; case 0x8B: RLIN_Master_Receive(2); /* ready for response receive*/ break; @@ -307,23 +307,12 @@ void RLIN_Master_Receive(uint8_t Data_length) * Arguments : uint8_t Data_length : receive data length. * Return Value : None ***********************************************************************************************************************/ -uint8_t LIN_RxDataBuf[8] = {0}; +uint8_t LIN_RxDataBuf[16] = {0}; extern void LIN_Rx_Handle(uint8_t,uint8_t *); void RLIN_Master_GetData(void) { Get_reponse_RxData(LIN_RxDataBuf); - switch(LIDB0) - { - case 0x8B: - //LED = Get_reponse_RxData(Master_RxData1); - //P6=Master_RxData1[1]; - break; - /* case 0x4c: Get_reponse_RxData(Master_RxData2); /*no used*/ - /* break; - /* case 0x0D: Get_reponse_RxData(Master_RxData3); /*no used*/ - /* break; */ - default: break; - } + LIN_Rx_Handle(LIDB0,LIN_RxDataBuf); } #endif @@ -335,7 +324,7 @@ void RLIN_Master_GetData(void) * Return Value : None ***********************************************************************************************************************/ -void Clear_DataBuffer() +void Clear_DataBuffer(void) { uint8_t i; uint16_t Databuf_adr; diff --git a/BCZT/iodefine.h b/BCZT/iodefine.h index abd0a9a..6fc967c 100644 --- a/BCZT/iodefine.h +++ b/BCZT/iodefine.h @@ -20,20 +20,20 @@ /* found by accessing the following link: */ /* http://www.renesas.com/disclaimer */ /* */ -/* Device : RL78/R5F10AGC */ +/* Device : RL78/R5F10AGF */ /* File Name : iodefine.h */ /* Abstract : Definition of Special Function Register (SFR) */ /* History : V1.11 [Device File version] */ /* Options : -df=E:\Program Files (x86)\renesas\CS+\CC\Device\RL78\Devicef */ -/* ile\DR5F10AGC.DVF -o=F:\FCB_project\temp\bczt_new\CODE\BCZT\i */ -/* odefine.h -f */ -/* Date : 2023-10-20 */ +/* ile\DR5F10AGF.DVF -o=F:\FCB_project\temp\bczt_new\CODE\R5f10A */ +/* GF\iodefine.h -f */ +/* Date : 2023-11-24 */ /* Version : V1.15.00.01 [df2iodef.exe version] */ /* This is a typical example. */ /* */ /******************************************************************************/ -#ifndef __R5F10AGCIODEFINE_HEADER__ -#define __R5F10AGCIODEFINE_HEADER__ +#ifndef __R5F10AGFIODEFINE_HEADER__ +#define __R5F10AGFIODEFINE_HEADER__ typedef struct { @@ -104,8 +104,6 @@ typedef struct #define PU6_bit (*(volatile __near __bitf_T *)0x36) #define PU7 (*(volatile __near unsigned char *)0x37) #define PU7_bit (*(volatile __near __bitf_T *)0x37) -#define PU9 (*(volatile __near unsigned char *)0x39) -#define PU9_bit (*(volatile __near __bitf_T *)0x39) #define PU12 (*(volatile __near unsigned char *)0x3C) #define PU12_bit (*(volatile __near __bitf_T *)0x3C) #define PU14 (*(volatile __near unsigned char *)0x3E) @@ -114,18 +112,28 @@ typedef struct #define PIM1_bit (*(volatile __near __bitf_T *)0x41) #define PIM3 (*(volatile __near unsigned char *)0x43) #define PIM3_bit (*(volatile __near __bitf_T *)0x43) +#define PIM6 (*(volatile __near unsigned char *)0x46) +#define PIM6_bit (*(volatile __near __bitf_T *)0x46) +#define PIM7 (*(volatile __near unsigned char *)0x47) +#define PIM7_bit (*(volatile __near __bitf_T *)0x47) #define PIM12 (*(volatile __near unsigned char *)0x4C) #define PIM12_bit (*(volatile __near __bitf_T *)0x4C) #define POM1 (*(volatile __near unsigned char *)0x51) #define POM1_bit (*(volatile __near __bitf_T *)0x51) #define POM6 (*(volatile __near unsigned char *)0x56) #define POM6_bit (*(volatile __near __bitf_T *)0x56) +#define POM7 (*(volatile __near unsigned char *)0x57) +#define POM7_bit (*(volatile __near __bitf_T *)0x57) #define POM12 (*(volatile __near unsigned char *)0x5C) #define POM12_bit (*(volatile __near __bitf_T *)0x5C) +#define PMC12 (*(volatile __near unsigned char *)0x6C) +#define PMC12_bit (*(volatile __near __bitf_T *)0x6C) #define NFEN0 (*(volatile __near unsigned char *)0x70) #define NFEN0_bit (*(volatile __near __bitf_T *)0x70) #define NFEN1 (*(volatile __near unsigned char *)0x71) #define NFEN1_bit (*(volatile __near __bitf_T *)0x71) +#define NFEN2 (*(volatile __near unsigned char *)0x72) +#define NFEN2_bit (*(volatile __near __bitf_T *)0x72) #define ISC (*(volatile __near unsigned char *)0x73) #define ISC_bit (*(volatile __near __bitf_T *)0x73) #define TIS0 (*(volatile __near unsigned char *)0x74) @@ -148,7 +156,10 @@ typedef struct #define PER0 (*(volatile __near unsigned char *)0xF0) #define PER0_bit (*(volatile __near __bitf_T *)0xF0) #define TAU0EN (((volatile __near __bitf_T *)0xF0)->no0) +#define TAU1EN (((volatile __near __bitf_T *)0xF0)->no1) #define SAU0EN (((volatile __near __bitf_T *)0xF0)->no2) +#define SAU1EN (((volatile __near __bitf_T *)0xF0)->no3) +#define IICA0EN (((volatile __near __bitf_T *)0xF0)->no4) #define ADCEN (((volatile __near __bitf_T *)0xF0)->no5) #define RTCEN (((volatile __near __bitf_T *)0xF0)->no7) #define OSMC (*(volatile __near unsigned char *)0xF3) @@ -184,6 +195,37 @@ typedef struct #define SOL0L (*(volatile __near unsigned char *)0x120) #define SSE0 (*(volatile __near unsigned short *)0x122) #define SSE0L (*(volatile __near unsigned char *)0x122) +#define SSR10 (*(volatile __near unsigned short *)0x140) +#define SSR10L (*(volatile __near unsigned char *)0x140) +#define SSR11 (*(volatile __near unsigned short *)0x142) +#define SSR11L (*(volatile __near unsigned char *)0x142) +#define SIR10 (*(volatile __near unsigned short *)0x144) +#define SIR10L (*(volatile __near unsigned char *)0x144) +#define SIR11 (*(volatile __near unsigned short *)0x146) +#define SIR11L (*(volatile __near unsigned char *)0x146) +#define SMR10 (*(volatile __near unsigned short *)0x148) +#define SMR11 (*(volatile __near unsigned short *)0x14A) +#define SCR10 (*(volatile __near unsigned short *)0x14C) +#define SCR11 (*(volatile __near unsigned short *)0x14E) +#define SE1 (*(volatile __near unsigned short *)0x150) +#define SE1L (*(volatile __near unsigned char *)0x150) +#define SE1L_bit (*(volatile __near __bitf_T *)0x150) +#define SS1 (*(volatile __near unsigned short *)0x152) +#define SS1L (*(volatile __near unsigned char *)0x152) +#define SS1L_bit (*(volatile __near __bitf_T *)0x152) +#define ST1 (*(volatile __near unsigned short *)0x154) +#define ST1L (*(volatile __near unsigned char *)0x154) +#define ST1L_bit (*(volatile __near __bitf_T *)0x154) +#define SPS1 (*(volatile __near unsigned short *)0x156) +#define SPS1L (*(volatile __near unsigned char *)0x156) +#define SO1 (*(volatile __near unsigned short *)0x158) +#define SOE1 (*(volatile __near unsigned short *)0x15A) +#define SOE1L (*(volatile __near unsigned char *)0x15A) +#define SOE1L_bit (*(volatile __near __bitf_T *)0x15A) +#define SOL1 (*(volatile __near unsigned short *)0x160) +#define SOL1L (*(volatile __near unsigned char *)0x160) +#define SSE1 (*(volatile __near unsigned short *)0x162) +#define SSE1L (*(volatile __near unsigned char *)0x162) #define TCR00 (*(volatile __near unsigned short *)0x180) #define TCR01 (*(volatile __near unsigned short *)0x182) #define TCR02 (*(volatile __near unsigned short *)0x184) @@ -235,6 +277,41 @@ typedef struct #define TOL0L (*(volatile __near unsigned char *)0x1BC) #define TOM0 (*(volatile __near unsigned short *)0x1BE) #define TOM0L (*(volatile __near unsigned char *)0x1BE) +#define TCR10 (*(volatile __near unsigned short *)0x1C0) +#define TCR11 (*(volatile __near unsigned short *)0x1C2) +#define TCR12 (*(volatile __near unsigned short *)0x1C4) +#define TCR13 (*(volatile __near unsigned short *)0x1C6) +#define TMR10 (*(volatile __near unsigned short *)0x1D0) +#define TMR11 (*(volatile __near unsigned short *)0x1D2) +#define TMR12 (*(volatile __near unsigned short *)0x1D4) +#define TMR13 (*(volatile __near unsigned short *)0x1D6) +#define TSR10 (*(volatile __near unsigned short *)0x1E0) +#define TSR10L (*(volatile __near unsigned char *)0x1E0) +#define TSR11 (*(volatile __near unsigned short *)0x1E2) +#define TSR11L (*(volatile __near unsigned char *)0x1E2) +#define TSR12 (*(volatile __near unsigned short *)0x1E4) +#define TSR12L (*(volatile __near unsigned char *)0x1E4) +#define TSR13 (*(volatile __near unsigned short *)0x1E6) +#define TSR13L (*(volatile __near unsigned char *)0x1E6) +#define TE1 (*(volatile __near unsigned short *)0x1F0) +#define TE1L (*(volatile __near unsigned char *)0x1F0) +#define TE1L_bit (*(volatile __near __bitf_T *)0x1F0) +#define TS1 (*(volatile __near unsigned short *)0x1F2) +#define TS1L (*(volatile __near unsigned char *)0x1F2) +#define TS1L_bit (*(volatile __near __bitf_T *)0x1F2) +#define TT1 (*(volatile __near unsigned short *)0x1F4) +#define TT1L (*(volatile __near unsigned char *)0x1F4) +#define TT1L_bit (*(volatile __near __bitf_T *)0x1F4) +#define TPS1 (*(volatile __near unsigned short *)0x1F6) +#define TO1 (*(volatile __near unsigned short *)0x1F8) +#define TO1L (*(volatile __near unsigned char *)0x1F8) +#define TOE1 (*(volatile __near unsigned short *)0x1FA) +#define TOE1L (*(volatile __near unsigned char *)0x1FA) +#define TOE1L_bit (*(volatile __near __bitf_T *)0x1FA) +#define TOL1 (*(volatile __near unsigned short *)0x1FC) +#define TOL1L (*(volatile __near unsigned char *)0x1FC) +#define TOM1 (*(volatile __near unsigned short *)0x1FE) +#define TOM1L (*(volatile __near unsigned char *)0x1FE) #define ERADR (*(volatile __near unsigned short *)0x200) #define ECCIER (*(volatile __near unsigned char *)0x202) #define ECCER (*(volatile __near unsigned char *)0x203) @@ -253,6 +330,28 @@ typedef struct #define PSNZCNT3_bit (*(volatile __near __bitf_T *)0x225) #define PWMDLY0 (*(volatile __near unsigned short *)0x228) #define PWMDLY1 (*(volatile __near unsigned short *)0x22A) +#define PWMDLY2 (*(volatile __near unsigned short *)0x22C) +#define IICCTL00 (*(volatile __near unsigned char *)0x230) +#define IICCTL00_bit (*(volatile __near __bitf_T *)0x230) +#define SPT0 (((volatile __near __bitf_T *)0x230)->no0) +#define STT0 (((volatile __near __bitf_T *)0x230)->no1) +#define ACKE0 (((volatile __near __bitf_T *)0x230)->no2) +#define WTIM0 (((volatile __near __bitf_T *)0x230)->no3) +#define SPIE0 (((volatile __near __bitf_T *)0x230)->no4) +#define WREL0 (((volatile __near __bitf_T *)0x230)->no5) +#define LREL0 (((volatile __near __bitf_T *)0x230)->no6) +#define IICE0 (((volatile __near __bitf_T *)0x230)->no7) +#define IICCTL01 (*(volatile __near unsigned char *)0x231) +#define IICCTL01_bit (*(volatile __near __bitf_T *)0x231) +#define PRS0 (((volatile __near __bitf_T *)0x231)->no0) +#define DFC0 (((volatile __near __bitf_T *)0x231)->no2) +#define SMC0 (((volatile __near __bitf_T *)0x231)->no3) +#define DAD0 (((volatile __near __bitf_T *)0x231)->no4) +#define CLD0 (((volatile __near __bitf_T *)0x231)->no5) +#define WUP0 (((volatile __near __bitf_T *)0x231)->no7) +#define IICWL0 (*(volatile __near unsigned char *)0x232) +#define IICWH0 (*(volatile __near unsigned char *)0x233) +#define SVA0 (*(volatile __near unsigned char *)0x234) #define TRJCR0 (*(volatile __near unsigned char *)0x240) #define TRJIOC0 (*(volatile __near unsigned char *)0x241) #define TRJIOC0_bit (*(volatile __near __bitf_T *)0x241) @@ -408,6 +507,8 @@ typedef struct #define DTCEN1_bit (*(volatile __near __bitf_T *)0x2E9) #define DTCEN10 (((volatile __near __bitf_T *)0x2E9)->no0) #define DTCEN11 (((volatile __near __bitf_T *)0x2E9)->no1) +#define DTCEN12 (((volatile __near __bitf_T *)0x2E9)->no2) +#define DTCEN13 (((volatile __near __bitf_T *)0x2E9)->no3) #define DTCEN14 (((volatile __near __bitf_T *)0x2E9)->no4) #define DTCEN15 (((volatile __near __bitf_T *)0x2E9)->no5) #define DTCEN16 (((volatile __near __bitf_T *)0x2E9)->no6) @@ -432,6 +533,10 @@ typedef struct #define DTCEN37 (((volatile __near __bitf_T *)0x2EB)->no7) #define DTCEN4 (*(volatile __near unsigned char *)0x2EC) #define DTCEN4_bit (*(volatile __near __bitf_T *)0x2EC) +#define DTCEN40 (((volatile __near __bitf_T *)0x2EC)->no0) +#define DTCEN41 (((volatile __near __bitf_T *)0x2EC)->no1) +#define DTCEN42 (((volatile __near __bitf_T *)0x2EC)->no2) +#define DTCEN43 (((volatile __near __bitf_T *)0x2EC)->no3) #define DTCEN45 (((volatile __near __bitf_T *)0x2EC)->no5) #define DTCEN46 (((volatile __near __bitf_T *)0x2EC)->no6) #define DTCEN47 (((volatile __near __bitf_T *)0x2EC)->no7) @@ -556,6 +661,27 @@ typedef struct #define EGP1_bit (*(volatile __near __bitf_T *)0xFF3A) #define EGN1 (*(volatile __near unsigned char *)0xFF3B) #define EGN1_bit (*(volatile __near __bitf_T *)0xFF3B) +#define SDR10 (*(volatile __near unsigned short *)0xFF48) +#define SDR10L (*(volatile __near unsigned char *)0xFF48) +#define SDR11 (*(volatile __near unsigned short *)0xFF4A) +#define SDR11L (*(volatile __near unsigned char *)0xFF4A) +#define IICA0 (*(volatile __near unsigned char *)0xFF50) +#define IICS0 (*(volatile __near unsigned char *)0xFF51) +#define IICS0_bit (*(volatile __near __bitf_T *)0xFF51) +#define SPD0 (((volatile __near __bitf_T *)0xFF51)->no0) +#define STD0 (((volatile __near __bitf_T *)0xFF51)->no1) +#define ACKD0 (((volatile __near __bitf_T *)0xFF51)->no2) +#define TRC0 (((volatile __near __bitf_T *)0xFF51)->no3) +#define COI0 (((volatile __near __bitf_T *)0xFF51)->no4) +#define EXC0 (((volatile __near __bitf_T *)0xFF51)->no5) +#define ALD0 (((volatile __near __bitf_T *)0xFF51)->no6) +#define MSTS0 (((volatile __near __bitf_T *)0xFF51)->no7) +#define IICF0 (*(volatile __near unsigned char *)0xFF52) +#define IICF0_bit (*(volatile __near __bitf_T *)0xFF52) +#define IICRSV0 (((volatile __near __bitf_T *)0xFF52)->no0) +#define STCEN0 (((volatile __near __bitf_T *)0xFF52)->no1) +#define IICBSY0 (((volatile __near __bitf_T *)0xFF52)->no6) +#define STCF0 (((volatile __near __bitf_T *)0xFF52)->no7) #define SUBCUDW (*(volatile __near unsigned short *)0xFF54) #define TRDGRC0 (*(volatile __near unsigned short *)0xFF58) #define TRDGRD0 (*(volatile __near unsigned short *)0xFF5A) @@ -569,6 +695,14 @@ typedef struct #define TDR05 (*(volatile __near unsigned short *)0xFF6A) #define TDR06 (*(volatile __near unsigned short *)0xFF6C) #define TDR07 (*(volatile __near unsigned short *)0xFF6E) +#define TDR10 (*(volatile __near unsigned short *)0xFF70) +#define TDR11 (*(volatile __near unsigned short *)0xFF72) +#define TDR11L (*(volatile __near unsigned char *)0xFF72) +#define TDR11H (*(volatile __near unsigned char *)0xFF73) +#define TDR12 (*(volatile __near unsigned short *)0xFF74) +#define TDR13 (*(volatile __near unsigned short *)0xFF76) +#define TDR13L (*(volatile __near unsigned char *)0xFF76) +#define TDR13H (*(volatile __near unsigned char *)0xFF77) #define SEC (*(volatile __near unsigned char *)0xFF92) #define MIN (*(volatile __near unsigned char *)0xFF93) #define HOUR (*(volatile __near unsigned char *)0xFF94) @@ -632,6 +766,10 @@ typedef struct #define TMIF07 (((volatile __near __bitf_T *)0xFFD0)->no2) #define LIN0WUPIF (((volatile __near __bitf_T *)0xFFD0)->no3) #define KRIF (((volatile __near __bitf_T *)0xFFD0)->no4) +#define TMIF10 (((volatile __near __bitf_T *)0xFFD1)->no3) +#define TMIF11 (((volatile __near __bitf_T *)0xFFD1)->no4) +#define TMIF12 (((volatile __near __bitf_T *)0xFFD1)->no5) +#define TMIF13 (((volatile __near __bitf_T *)0xFFD1)->no6) #define FLIF (((volatile __near __bitf_T *)0xFFD1)->no7) #define MK2 (*(volatile __near unsigned short *)0xFFD4) #define MK2L (*(volatile __near unsigned char *)0xFFD4) @@ -643,6 +781,10 @@ typedef struct #define TMMK07 (((volatile __near __bitf_T *)0xFFD4)->no2) #define LIN0WUPMK (((volatile __near __bitf_T *)0xFFD4)->no3) #define KRMK (((volatile __near __bitf_T *)0xFFD4)->no4) +#define TMMK10 (((volatile __near __bitf_T *)0xFFD5)->no3) +#define TMMK11 (((volatile __near __bitf_T *)0xFFD5)->no4) +#define TMMK12 (((volatile __near __bitf_T *)0xFFD5)->no5) +#define TMMK13 (((volatile __near __bitf_T *)0xFFD5)->no6) #define FLMK (((volatile __near __bitf_T *)0xFFD5)->no7) #define PR02 (*(volatile __near unsigned short *)0xFFD8) #define PR02L (*(volatile __near unsigned char *)0xFFD8) @@ -654,6 +796,10 @@ typedef struct #define TMPR007 (((volatile __near __bitf_T *)0xFFD8)->no2) #define LIN0WUPPR0 (((volatile __near __bitf_T *)0xFFD8)->no3) #define KRPR0 (((volatile __near __bitf_T *)0xFFD8)->no4) +#define TMPR010 (((volatile __near __bitf_T *)0xFFD9)->no3) +#define TMPR011 (((volatile __near __bitf_T *)0xFFD9)->no4) +#define TMPR012 (((volatile __near __bitf_T *)0xFFD9)->no5) +#define TMPR013 (((volatile __near __bitf_T *)0xFFD9)->no6) #define FLPR0 (((volatile __near __bitf_T *)0xFFD9)->no7) #define PR12 (*(volatile __near unsigned short *)0xFFDC) #define PR12L (*(volatile __near unsigned char *)0xFFDC) @@ -665,6 +811,10 @@ typedef struct #define TMPR107 (((volatile __near __bitf_T *)0xFFDC)->no2) #define LIN0WUPPR1 (((volatile __near __bitf_T *)0xFFDC)->no3) #define KRPR1 (((volatile __near __bitf_T *)0xFFDC)->no4) +#define TMPR110 (((volatile __near __bitf_T *)0xFFDD)->no3) +#define TMPR111 (((volatile __near __bitf_T *)0xFFDD)->no4) +#define TMPR112 (((volatile __near __bitf_T *)0xFFDD)->no5) +#define TMPR113 (((volatile __near __bitf_T *)0xFFDD)->no6) #define FLPR1 (((volatile __near __bitf_T *)0xFFDD)->no7) #define IF0 (*(volatile __near unsigned short *)0xFFE0) #define IF0L (*(volatile __near unsigned char *)0xFFE0) @@ -700,6 +850,8 @@ typedef struct #define LIN0RVCIF (((volatile __near __bitf_T *)0xFFE2)->no0) #define LIN0IF (((volatile __near __bitf_T *)0xFFE2)->no1) #define LIN0STAIF (((volatile __near __bitf_T *)0xFFE2)->no1) +#define IICAIF0 (((volatile __near __bitf_T *)0xFFE2)->no2) +#define PIF8 (((volatile __near __bitf_T *)0xFFE2)->no3) #define RTCIF (((volatile __near __bitf_T *)0xFFE2)->no3) #define TMIF00 (((volatile __near __bitf_T *)0xFFE2)->no4) #define TMIF01 (((volatile __near __bitf_T *)0xFFE2)->no5) @@ -707,9 +859,18 @@ typedef struct #define TMIF03 (((volatile __near __bitf_T *)0xFFE2)->no7) #define ADIF (((volatile __near __bitf_T *)0xFFE3)->no0) #define PIF6 (((volatile __near __bitf_T *)0xFFE3)->no1) +#define TMIF11H (((volatile __near __bitf_T *)0xFFE3)->no1) #define PIF7 (((volatile __near __bitf_T *)0xFFE3)->no2) +#define TMIF13H (((volatile __near __bitf_T *)0xFFE3)->no2) +#define PIF9 (((volatile __near __bitf_T *)0xFFE3)->no3) #define TMIF01H (((volatile __near __bitf_T *)0xFFE3)->no3) #define TMIF03H (((volatile __near __bitf_T *)0xFFE3)->no4) +#define CSIIF10 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define IICIF10 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define STIF1 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define CSIIF11 (((volatile __near __bitf_T *)0xFFE3)->no6) +#define IICIF11 (((volatile __near __bitf_T *)0xFFE3)->no6) +#define SRIF1 (((volatile __near __bitf_T *)0xFFE3)->no6) #define TMIF04 (((volatile __near __bitf_T *)0xFFE3)->no7) #define MK0 (*(volatile __near unsigned short *)0xFFE4) #define MK0L (*(volatile __near unsigned char *)0xFFE4) @@ -745,6 +906,8 @@ typedef struct #define LIN0RVCMK (((volatile __near __bitf_T *)0xFFE6)->no0) #define LIN0MK (((volatile __near __bitf_T *)0xFFE6)->no1) #define LIN0STAMK (((volatile __near __bitf_T *)0xFFE6)->no1) +#define IICAMK0 (((volatile __near __bitf_T *)0xFFE6)->no2) +#define PMK8 (((volatile __near __bitf_T *)0xFFE6)->no3) #define RTCMK (((volatile __near __bitf_T *)0xFFE6)->no3) #define TMMK00 (((volatile __near __bitf_T *)0xFFE6)->no4) #define TMMK01 (((volatile __near __bitf_T *)0xFFE6)->no5) @@ -752,9 +915,18 @@ typedef struct #define TMMK03 (((volatile __near __bitf_T *)0xFFE6)->no7) #define ADMK (((volatile __near __bitf_T *)0xFFE7)->no0) #define PMK6 (((volatile __near __bitf_T *)0xFFE7)->no1) +#define TMMK11H (((volatile __near __bitf_T *)0xFFE7)->no1) #define PMK7 (((volatile __near __bitf_T *)0xFFE7)->no2) +#define TMMK13H (((volatile __near __bitf_T *)0xFFE7)->no2) +#define PMK9 (((volatile __near __bitf_T *)0xFFE7)->no3) #define TMMK01H (((volatile __near __bitf_T *)0xFFE7)->no3) #define TMMK03H (((volatile __near __bitf_T *)0xFFE7)->no4) +#define CSIMK10 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define IICMK10 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define STMK1 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define CSIMK11 (((volatile __near __bitf_T *)0xFFE7)->no6) +#define IICMK11 (((volatile __near __bitf_T *)0xFFE7)->no6) +#define SRMK1 (((volatile __near __bitf_T *)0xFFE7)->no6) #define TMMK04 (((volatile __near __bitf_T *)0xFFE7)->no7) #define PR00 (*(volatile __near unsigned short *)0xFFE8) #define PR00L (*(volatile __near unsigned char *)0xFFE8) @@ -790,6 +962,8 @@ typedef struct #define LIN0RVCPR0 (((volatile __near __bitf_T *)0xFFEA)->no0) #define LIN0PR0 (((volatile __near __bitf_T *)0xFFEA)->no1) #define LIN0STAPR0 (((volatile __near __bitf_T *)0xFFEA)->no1) +#define IICAPR00 (((volatile __near __bitf_T *)0xFFEA)->no2) +#define PPR08 (((volatile __near __bitf_T *)0xFFEA)->no3) #define RTCPR0 (((volatile __near __bitf_T *)0xFFEA)->no3) #define TMPR000 (((volatile __near __bitf_T *)0xFFEA)->no4) #define TMPR001 (((volatile __near __bitf_T *)0xFFEA)->no5) @@ -797,9 +971,18 @@ typedef struct #define TMPR003 (((volatile __near __bitf_T *)0xFFEA)->no7) #define ADPR0 (((volatile __near __bitf_T *)0xFFEB)->no0) #define PPR06 (((volatile __near __bitf_T *)0xFFEB)->no1) +#define TMPR011H (((volatile __near __bitf_T *)0xFFEB)->no1) #define PPR07 (((volatile __near __bitf_T *)0xFFEB)->no2) +#define TMPR013H (((volatile __near __bitf_T *)0xFFEB)->no2) +#define PPR09 (((volatile __near __bitf_T *)0xFFEB)->no3) #define TMPR001H (((volatile __near __bitf_T *)0xFFEB)->no3) #define TMPR003H (((volatile __near __bitf_T *)0xFFEB)->no4) +#define CSIPR010 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define IICPR010 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define STPR01 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define CSIPR011 (((volatile __near __bitf_T *)0xFFEB)->no6) +#define IICPR011 (((volatile __near __bitf_T *)0xFFEB)->no6) +#define SRPR01 (((volatile __near __bitf_T *)0xFFEB)->no6) #define TMPR004 (((volatile __near __bitf_T *)0xFFEB)->no7) #define PR10 (*(volatile __near unsigned short *)0xFFEC) #define PR10L (*(volatile __near unsigned char *)0xFFEC) @@ -835,6 +1018,8 @@ typedef struct #define LIN0RVCPR1 (((volatile __near __bitf_T *)0xFFEE)->no0) #define LIN0PR1 (((volatile __near __bitf_T *)0xFFEE)->no1) #define LIN0STAPR1 (((volatile __near __bitf_T *)0xFFEE)->no1) +#define IICAPR10 (((volatile __near __bitf_T *)0xFFEE)->no2) +#define PPR18 (((volatile __near __bitf_T *)0xFFEE)->no3) #define RTCPR1 (((volatile __near __bitf_T *)0xFFEE)->no3) #define TMPR100 (((volatile __near __bitf_T *)0xFFEE)->no4) #define TMPR101 (((volatile __near __bitf_T *)0xFFEE)->no5) @@ -842,9 +1027,18 @@ typedef struct #define TMPR103 (((volatile __near __bitf_T *)0xFFEE)->no7) #define ADPR1 (((volatile __near __bitf_T *)0xFFEF)->no0) #define PPR16 (((volatile __near __bitf_T *)0xFFEF)->no1) +#define TMPR111H (((volatile __near __bitf_T *)0xFFEF)->no1) #define PPR17 (((volatile __near __bitf_T *)0xFFEF)->no2) +#define TMPR113H (((volatile __near __bitf_T *)0xFFEF)->no2) +#define PPR19 (((volatile __near __bitf_T *)0xFFEF)->no3) #define TMPR101H (((volatile __near __bitf_T *)0xFFEF)->no3) #define TMPR103H (((volatile __near __bitf_T *)0xFFEF)->no4) +#define CSIPR110 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define IICPR110 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define STPR11 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define CSIPR111 (((volatile __near __bitf_T *)0xFFEF)->no6) +#define IICPR111 (((volatile __near __bitf_T *)0xFFEF)->no6) +#define SRPR11 (((volatile __near __bitf_T *)0xFFEF)->no6) #define TMPR104 (((volatile __near __bitf_T *)0xFFEF)->no7) #define MACRL (*(volatile __near unsigned short *)0xFFF0) #define MACRH (*(volatile __near unsigned short *)0xFFF2) @@ -878,6 +1072,8 @@ typedef struct #define INTLIN0RVC 0x0024 #define INTLIN0 0x0026 #define INTLIN0STA 0x0026 +#define INTIICA0 0x0028 +#define INTP8 0x002A #define INTRTC 0x002A #define INTTM00 0x002C #define INTTM01 0x002E @@ -885,15 +1081,28 @@ typedef struct #define INTTM03 0x0032 #define INTAD 0x0034 #define INTP6 0x0036 +#define INTTM11H 0x0036 #define INTP7 0x0038 +#define INTTM13H 0x0038 +#define INTP9 0x003A #define INTTM01H 0x003A #define INTTM03H 0x003C +#define INTCSI10 0x003E +#define INTIIC10 0x003E +#define INTST1 0x003E +#define INTCSI11 0x0040 +#define INTIIC11 0x0040 +#define INTSR1 0x0040 #define INTTM04 0x0042 #define INTTM05 0x0044 #define INTTM06 0x0046 #define INTTM07 0x0048 #define INTLIN0WUP 0x004A #define INTKR 0x004C +#define INTTM10 0x005A +#define INTTM11 0x005C +#define INTTM12 0x005E +#define INTTM13 0x0060 #define INTFL 0x0062 #endif diff --git a/BCZT/r_cg_adc.c b/BCZT/r_cg_adc.c index 4bf5f54..0454862 100644 --- a/BCZT/r_cg_adc.c +++ b/BCZT/r_cg_adc.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_adc.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for ADC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_adc.h b/BCZT/r_cg_adc.h index 247fabb..86f086b 100644 --- a/BCZT/r_cg_adc.h +++ b/BCZT/r_cg_adc.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_adc.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for ADC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef ADC_H @@ -82,6 +82,9 @@ Macro definitions (Register bit) #define _09_AD_INPUT_CHANNEL_9 (0x09U) /* ANI9 */ #define _0A_AD_INPUT_CHANNEL_10 (0x0AU) /* ANI10 */ #define _0B_AD_INPUT_CHANNEL_11 (0x0BU) /* ANI11 */ +#define _0C_AD_INPUT_CHANNEL_12 (0x0CU) /* ANI12 */ +#define _18_AD_INPUT_CHANNEL_24 (0x18U) /* ANI24 */ +#define _19_AD_INPUT_CHANNEL_25 (0x19U) /* ANI25 */ #define _80_AD_INPUT_TEMPERSENSOR_0 (0x80U) /* temperature sensor 0 output is used to be the input channel */ #define _81_AD_INPUT_INTERREFVOLT (0x81U) /* internal reference voltage output is used to be the input channel */ /* Scan mode */ @@ -94,6 +97,7 @@ Macro definitions (Register bit) #define _06_AD_INPUT_CHANNEL_6_9 (0x06U) /* ANI6 - ANI9 */ #define _07_AD_INPUT_CHANNEL_7_10 (0x07U) /* ANI7 - ANI10 */ #define _08_AD_INPUT_CHANNEL_8_11 (0x08U) /* ANI8 - ANI11 */ +#define _09_AD_INPUT_CHANNEL_9_12 (0x09U) /* ANI9 - ANI12 */ /* AD converter mode register 1 (ADM1) @@ -164,8 +168,8 @@ Typedef definitions typedef enum { ADCHANNEL0, ADCHANNEL1, ADCHANNEL2, ADCHANNEL3, ADCHANNEL4, ADCHANNEL5, ADCHANNEL6, - ADCHANNEL7, ADCHANNEL8, ADCHANNEL9, ADCHANNEL10, ADCHANNEL11, ADTEMPERSENSOR0 = 128U, - ADINTERREFVOLT + ADCHANNEL7, ADCHANNEL8, ADCHANNEL9, ADCHANNEL10, ADCHANNEL11, ADCHANNEL12, + ADCHANNEL24 = 24U, ADCHANNEL25, ADTEMPERSENSOR0 = 128U, ADINTERREFVOLT } ad_channel_t; typedef enum { diff --git a/BCZT/r_cg_adc_user.c b/BCZT/r_cg_adc_user.c index 5fe7708..bba3e76 100644 --- a/BCZT/r_cg_adc_user.c +++ b/BCZT/r_cg_adc_user.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_adc_user.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for ADC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_cgc.c b/BCZT/r_cg_cgc.c index 3b1a347..ef36369 100644 --- a/BCZT/r_cg_cgc.c +++ b/BCZT/r_cg_cgc.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_cgc.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for CGC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_cgc.h b/BCZT/r_cg_cgc.h index 483e93d..6a94524 100644 --- a/BCZT/r_cg_cgc.h +++ b/BCZT/r_cg_cgc.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_cgc.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for CGC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef CGC_H @@ -220,7 +220,6 @@ typedef enum Global functions ***********************************************************************************************************************/ void R_CGC_Create(void); -void R_CGC_Get_ResetSource(void); /* Start user code for function. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ diff --git a/BCZT/r_cg_cgc_user.c b/BCZT/r_cg_cgc_user.c index ca36f50..b3eff47 100644 --- a/BCZT/r_cg_cgc_user.c +++ b/BCZT/r_cg_cgc_user.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_cgc_user.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for CGC module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** @@ -47,18 +47,5 @@ Global variables and functions /* Start user code for global. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ -/*********************************************************************************************************************** -* Function Name: R_CGC_Get_ResetSource -* Description : This function process of Reset. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -void R_CGC_Get_ResetSource(void) -{ - uint8_t reset_flag = RESF; - /* Start user code. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - /* Start user code for adding. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ diff --git a/BCZT/r_cg_macrodriver.h b/BCZT/r_cg_macrodriver.h index c2fd0b9..bb7a1da 100644 --- a/BCZT/r_cg_macrodriver.h +++ b/BCZT/r_cg_macrodriver.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_macrodriver.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements general head file. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef STATUS_H diff --git a/BCZT/r_cg_port.c b/BCZT/r_cg_port.c index b576134..419b455 100644 --- a/BCZT/r_cg_port.c +++ b/BCZT/r_cg_port.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_port.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for PORT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_port.h b/BCZT/r_cg_port.h index c96b9f6..f0f54cf 100644 --- a/BCZT/r_cg_port.h +++ b/BCZT/r_cg_port.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_port.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for PORT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef PORT_H @@ -240,6 +240,7 @@ Macro definitions #define _F8_PM9_DEFAULT (0xF8U) /* PM9 default value */ #define _DE_PM12_DEFAULT (0xDEU) /* PM12 default value */ #define _FE_PM14_DEFAULT (0xFEU) /* PM14 default value */ +#define _DE_PMC12_DEFAULT (0xDEU) /* PMC12 default value */ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_port_user.c b/BCZT/r_cg_port_user.c index f082842..cff7647 100644 --- a/BCZT/r_cg_port_user.c +++ b/BCZT/r_cg_port_user.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_port_user.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for PORT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_timer.c b/BCZT/r_cg_timer.c index ca341f5..70b7606 100644 --- a/BCZT/r_cg_timer.c +++ b/BCZT/r_cg_timer.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_timer.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for TAU module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_timer.h b/BCZT/r_cg_timer.h index 8f821df..b36a117 100644 --- a/BCZT/r_cg_timer.h +++ b/BCZT/r_cg_timer.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_timer.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for TAU module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef TAU_H diff --git a/BCZT/r_cg_timer_user.c b/BCZT/r_cg_timer_user.c index e0f9d2b..0574484 100644 --- a/BCZT/r_cg_timer_user.c +++ b/BCZT/r_cg_timer_user.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_timer_user.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for TAU module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_userdefine.h b/BCZT/r_cg_userdefine.h index 3af661c..2a83077 100644 --- a/BCZT/r_cg_userdefine.h +++ b/BCZT/r_cg_userdefine.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_userdefine.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file includes user definition. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef _USER_DEF_H diff --git a/BCZT/r_cg_wdt.c b/BCZT/r_cg_wdt.c index 3e0604f..430e620 100644 --- a/BCZT/r_cg_wdt.c +++ b/BCZT/r_cg_wdt.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_wdt.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for WDT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_cg_wdt.h b/BCZT/r_cg_wdt.h index ed86b6c..c90bdb5 100644 --- a/BCZT/r_cg_wdt.h +++ b/BCZT/r_cg_wdt.h @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_wdt.h * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for WDT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ #ifndef WDT_H diff --git a/BCZT/r_cg_wdt_user.c b/BCZT/r_cg_wdt_user.c index cede0fe..59bcb49 100644 --- a/BCZT/r_cg_wdt_user.c +++ b/BCZT/r_cg_wdt_user.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_cg_wdt_user.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements device driver for WDT module. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/BCZT/r_main.c b/BCZT/r_main.c index 936ed32..c2e69a5 100644 --- a/BCZT/r_main.c +++ b/BCZT/r_main.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_main.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements main function. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** @@ -34,7 +34,6 @@ Includes #include "r_cg_port.h" #include "r_cg_adc.h" #include "r_cg_timer.h" -#include "r_cg_wdt.h" /* Start user code for include. Do not edit comment generated here */ #include "appTask.h" /* End user code. Do not edit comment generated here */ diff --git a/BCZT/r_systeminit.c b/BCZT/r_systeminit.c index bb5c674..fe25a86 100644 --- a/BCZT/r_systeminit.c +++ b/BCZT/r_systeminit.c @@ -20,10 +20,10 @@ /*********************************************************************************************************************** * File Name : r_systeminit.c * Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021] -* Device(s) : R5F10AGC +* Device(s) : R5F10AGF * Tool-Chain : CCRL * Description : This file implements system initializing function. -* Creation Date: 2023-11-22 +* Creation Date: 2023-11-24 ***********************************************************************************************************************/ /*********************************************************************************************************************** @@ -34,7 +34,6 @@ Includes #include "r_cg_port.h" #include "r_cg_adc.h" #include "r_cg_timer.h" -#include "r_cg_wdt.h" /* Start user code for include. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ #include "r_cg_userdefine.h" @@ -65,12 +64,10 @@ void R_Systeminit(void) PIOR4 = 0x00U; PIOR5 = 0x00U; PIOR7 = 0x02U; - R_CGC_Get_ResetSource(); R_CGC_Create(); R_PORT_Create(); R_ADC_Create(); R_TAU0_Create(); - R_WDT_Create(); R_TMR_RJ0_Create(); /* Set invalid memory access detection control */ diff --git a/BCZT/user/MotorCtrl.c b/BCZT/user/MotorCtrl.c index d488807..b172af8 100644 --- a/BCZT/user/MotorCtrl.c +++ b/BCZT/user/MotorCtrl.c @@ -127,7 +127,7 @@ void MotorValueInit(void) MotorHallLoc[i] = 0x8000; MotorErr[i] = 0; } - ReadMotorMemory(); + //ReadMotorMemory(); } void setMotorState(uint8_t motorid,uint8_t act) @@ -138,7 +138,7 @@ void setMotorState(uint8_t motorid,uint8_t act) MotorState[motorid] = act; } } -uint16_t MotorTarget[6] = 0; +uint16_t MotorTarget[6] = {0}; void setMotorTarget(uint8_t motorid,uint16_t target) { diff --git a/BCZT/user/appTask.c b/BCZT/user/appTask.c index ca5114c..a06b41c 100644 --- a/BCZT/user/appTask.c +++ b/BCZT/user/appTask.c @@ -17,6 +17,7 @@ #include "MotorCtrl.h" #include "RLIN_driver.h" #include "r_cg_wdt.h" +#include "r_cg_timer.h" static uint8_t EEL_BUF[50]; @@ -43,11 +44,11 @@ void LIN_Task(void); void TfJr_CtrlTask(void); extern uint8_t OC1flag,OC2flag,OC3flag; uint8_t TfState,JrState; - +unsigned char keybyte1,keybyte2,keybyte3; void Apply_task(void) { - static uint8_t temp; + //static uint8_t temp; if (Timer_1ms_flag == 1) { @@ -70,13 +71,13 @@ void Apply_task(void) if (Timer_10ms_flag == 1) { Timer_10ms_flag = 0; - //MotorCtrl(); + MotorCtrl(); LIN_Task(); } if (Timer_20ms_flag == 1) { Timer_20ms_flag = 0; - R_WDT_Restart(); + //R_WDT_Restart(); } if (Timer_50ms_flag == 1) { @@ -91,20 +92,24 @@ void Apply_task(void) } } - +extern uint8_t Master_TxData1[]; void LIN_Task(void) { - static lin_sch_count=0; + static uint8_t lin_sch_count=0; switch (lin_sch_count) { case 0: - RLIN_Master_HeaderTransmit(0x00); + Master_TxData1[0] = (JrState<<4)|(TfState<<6); + Master_TxData1[1] = keybyte3; + RLIN_Master_HeaderTransmit(0x80); break; case 1: - RLIN_Master_HeaderTransmit(0x01); + RLIN_Master_HeaderTransmit(0x99); break; case 2: - RLIN_Master_HeaderTransmit(0x21); + RLIN_Master_HeaderTransmit(0x61); + break; + case 3: break; default: lin_sch_count = 0; @@ -117,16 +122,17 @@ void LIN_Task(void) } } -unsigned char keybyte1,keybyte2,keybyte3; + void LIN_Rx_Handle(uint8_t pid,uint8_t *data) { uint8_t id = pid & 0x3f; switch (id) { case 0x21: - /* code */ + keybyte3 = data[4]; break; - case 0x01: + case 0x19: + //MOTOR1Ctrl(1); keybyte1 = data[0]; keybyte2 = data[1]; break; @@ -185,6 +191,27 @@ void KeyPressLogic(uint8_t keyid) break; case KEYID_M3: break; + case KEYID_K4: + JrState++; + TfState = 0; + if (JrState > 3) + { + JrState = 0; + } + + break; + case KEYID_K3: + TfState++; + JrState = 0; + if (TfState > 3) + { + TfState = 0; + } + break; + case KEYID_K2: + break; + case KEYID_K1: + break; default: break; } @@ -251,7 +278,7 @@ void KeyReleaseLogic(uint8_t keyid) void KeyPro(void) { uint8_t keyid; - for (keyid = 0; keyid < 16; keyid++) + for (keyid = 0; keyid < KEY_NUM; keyid++) { if (getKeyPressFlag(keyid)) { @@ -295,7 +322,7 @@ uint16_t SupplyVoltage; void IGN_Voltage_Detect(void) { uint32_t adval; - //adval = getAdval(ADCH_IGN); + adval = getAdval(ADCH_BAT); SupplyVoltage = (adval*57*5)>>10; if (adval <= 305 ) { @@ -378,13 +405,13 @@ void Timer_Pro(void) } -const uint8_t TfDutyTable[4] = {0,100,80,50}; -const uint8_t JrDutyTable[4] = {0,100,80,50}; +const uint8_t TfDutyTable[4] = {0,100,80,50};//{0,100,80,50}; +const uint8_t JrDutyTable[4] = {0,100,80,50};//{0,100,80,50}; void TfJr_CtrlTask(void) { if (JrState < 4) { - SetJrDuty(TfDutyTable[JrState]); + SetJrDuty(JrDutyTable[JrState]); } if (TfState < 4) { diff --git a/BCZT/user/hwCtrl.c b/BCZT/user/hwCtrl.c index cc76aec..ee50548 100644 --- a/BCZT/user/hwCtrl.c +++ b/BCZT/user/hwCtrl.c @@ -73,7 +73,7 @@ void KeyScan(void) } else { - key = (keybyte2 & 0x01<<(i-16))?1:0; + key = (keybyte3 & 0x01<<(i-16))?1:0; } //key = GetIOState(i+1); if (key == KEY_PRESSED && keystate[i] == KEY_NOPRESSED) @@ -263,7 +263,7 @@ void MOTOR6Ctrl(uint8_t act) uint16_t getAdval(uint8_t ch) { - if (ch < 3) + if (ch < 4) { return g_adval[ch]; } @@ -298,6 +298,6 @@ void SetJrDuty(uint8_t duty) reg = TDR00; reg = (reg + 1U) * duty / 100U; TDR03 = (uint16_t)reg; - TDR07 = (uint16_t)reg; + //TDR07 = (uint16_t)reg; }