2023-11-18 11:46:58 +08:00
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/***********************************************************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
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* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
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* applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
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* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
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* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
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* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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*
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* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
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***********************************************************************************************************************/
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/***********************************************************************************************************************
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* File Name : r_cg_port.c
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* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
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2023-11-26 11:43:55 +08:00
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* Device(s) : R5F10AGF
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2023-11-18 11:46:58 +08:00
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* Tool-Chain : CCRL
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* Description : This file implements device driver for PORT module.
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2024-03-08 15:51:51 +08:00
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* Creation Date: 2024-01-20
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2023-11-18 11:46:58 +08:00
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***********************************************************************************************************************/
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/***********************************************************************************************************************
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Includes
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***********************************************************************************************************************/
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#include "r_cg_macrodriver.h"
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#include "r_cg_port.h"
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/* Start user code for include. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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#include "r_cg_userdefine.h"
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/***********************************************************************************************************************
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Pragma directive
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***********************************************************************************************************************/
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/* Start user code for pragma. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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/***********************************************************************************************************************
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Global variables and functions
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***********************************************************************************************************************/
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/* Start user code for global. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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/***********************************************************************************************************************
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* Function Name: R_PORT_Create
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* Description : This function initializes the Port I/O.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_PORT_Create(void)
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{
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P0 = _00_Pn0_OUTPUT_0;
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2023-11-22 20:34:48 +08:00
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P1 = _00_Pn0_OUTPUT_0 | _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0 | _08_Pn3_OUTPUT_1 | _00_Pn5_OUTPUT_0 |
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_00_Pn6_OUTPUT_0 | _00_Pn7_OUTPUT_0;
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P3 = _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0;
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2023-11-26 21:40:14 +08:00
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P4 = _00_Pn1_OUTPUT_0;
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2023-11-18 11:46:58 +08:00
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P7 = _00_Pn0_OUTPUT_0 | _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0 | _00_Pn3_OUTPUT_0;
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P9 = _00_Pn2_OUTPUT_0;
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P13 = _00_Pn0_OUTPUT_0;
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P14 = _00_Pn0_OUTPUT_0;
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2023-11-26 21:40:14 +08:00
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PMC12 = _00_PMCn0_DI_ON | _00_PMCn5_DI_ON | _DE_PMC12_DEFAULT;
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PSRSEL = _00_PSR140_NORMAL | _00_PSR14_NORMAL | _00_PSR120_NORMAL | _00_PSR12_NORMAL | _00_PSR10_NORMAL;
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ADPC = _05_ADPC_DI_ON;
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PM0 = _00_PMn0_MODE_OUTPUT | _FE_PM0_DEFAULT;
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2023-11-22 20:34:48 +08:00
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PM1 = _00_PMn0_MODE_OUTPUT | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _00_PMn3_MODE_OUTPUT |
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_10_PMn4_MODE_INPUT | _00_PMn5_MODE_OUTPUT | _00_PMn6_MODE_OUTPUT | _00_PMn7_MODE_OUTPUT;
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PM3 = _01_PMn0_NOT_USE | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _08_PMn3_NOT_USE | _10_PMn4_NOT_USE |
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_E0_PM3_DEFAULT;
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PM4 = _01_PMn0_NOT_USE | _00_PMn1_MODE_OUTPUT | _FC_PM4_DEFAULT;
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PM7 = _00_PMn0_MODE_OUTPUT | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _00_PMn3_MODE_OUTPUT | _F0_PM7_DEFAULT;
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PM8 = _01_PMn0_NOT_USE | _02_PMn1_NOT_USE | _04_PMn2_MODE_INPUT | _08_PMn3_MODE_INPUT | _10_PMn4_MODE_INPUT |
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_20_PMn5_MODE_INPUT | _40_PMn6_NOT_USE | _80_PMn7_NOT_USE;
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PM9 = _01_PMn0_MODE_INPUT | _02_PMn1_MODE_INPUT | _00_PMn2_MODE_OUTPUT | _F8_PM9_DEFAULT;
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PM12 = _01_PMn0_MODE_INPUT | _20_PMn5_MODE_INPUT | _DE_PM12_DEFAULT;
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PM14 = _00_PMn0_MODE_OUTPUT | _FE_PM14_DEFAULT;
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}
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/* Start user code for adding. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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